[AKD4425A-SA] AKD4425A-SA AK4425A Evaluation Board Rev.0 General Description AKD4425A-SA is an evaluation board for AK4425A (192kHz sampling 24Bit StereoΔΣDAC with 2Vrms Output). AKD4425A-SA has a digital audio interface (AK4118) of Optical input and can easily achieve the interface with digital audio system. Therefore, it is easy to evaluate the sound quality of AK4425A. Ordering Guide AKD4425A-SA ---- AK4425A Evaluation Board Function • Compatible with 2 types of interface DIR with optical input and BNC input Direct interface with 10pin header • BNC connector for Analog Output VDD GND AVDD 5V +15V Regulator LOUT 3.3V Opt In BNC In AK4118 (DIR) AK4425A ROUT DSP CTRL 10pin Header Figure 1. AKD4425A-SA Block diagram (* Circuit diagram are attached at the end of this manual.) <KM100600> -1- 2009/09 [AKD4425A-SA] Operation sequence 1) Set up the power supply lines. Each supply line should be distributed from the power supply unit. Name of jack Color of jack Voltage Range Using Default Setting Default Regulator : VDD and AVDD for AK4425A. The power supply for AK4118, 74LVC541 and other logic circuit. Should be connected. +15V +15V Red +7∼+20V VDD Orange +4.5∼+5.5V VDD of AK4425A Should be connected. (Default, Note1) +5V AVDD Orange +4.5∼+5.5V AVDD of AK4425A Should be connected. (Default, Note2) +5V GND Black 0V Should be connected. 0V Ground Table 1. Set up of power supply lines Note 1 ) VDD for AK4425A can supply to connect Regulator. In this case, should be to “short” of R58 and no connected “VDD” of jack. Note 2 ) AVDD for AK4425A can supply to connect Regulator. In this case, should be to “short” of R59 and no connected “AVDD” of jack. 2) DIP Switch setting: Refer to Table 2, Table 3 and Table 4. 3) Power Down: The AK4118 should be reset once by bringing SW2 (AK4118 PDN) “L” upon power-up. Evaluation mode 1. Using DIR (COAX) (Default) The DIR generates MCLK, BICK, LRCK and SDATA from the received data through BNC connector (J3). It is possible to evaluate the AK4425A by using CD disk. Should be no connected to PORT1 (DSP). Setting: R41: short (0Ω) ; R42: open ＊ COAX is recommended for an evaluation of the Sound quality. 2. Using DIR (Optical Link) The DIR generates MCLK, BICK, LRCK and SDATA from the received data through optical connector (PORT2: TORX141). It is possible to evaluate the AK4425A by using CD disk. Should be no connected to PORT1 (DSP). Setting: R41: open ; R42: short (0Ω) 3. Supply all interface signals that includ master clock via PORT1 from external equipments.. Setting: R43, R44, R45, R46: open R47, R48, R49, R50: short (0Ω) Note) The above work of removing (open) or shorting resistors need to modify the connection by soldering. <KM100600> -2- 2009/09 [AKD4425A-SA] Setting of DIP switch [S1]: AK4118 setting (ON = “H”, OFF = “L”) No. Pin 1 2 3 4 DIF1 DIF0 OCKS1 OCKS0 Mode 4 5 OCKS1 L H H DIF2 H OFF ON Default AK4118’s Audio Data Format setting Refer to Table 3 AK4118’s Master Clock setting Refer to Table 4 Table 2. S1 setting DIF1 DIF0 SDTO L L 24bit, Left justified L H 24bit, I2S Table 3. Audio Data Format setting OCKS0 L L H MCKO1 fs (max.) 256fs 96kHz 512fs 48kHz 128fs 192kHz Table 4. MCLK clock setting L L H L Default Default Setting of SW1 and SW2 switch [SW1](SMUTE): Don’t use. SW1 must be always “L”. [SW2](PDN): Reset of AK4118. Keep “H” during normal operation. <KM100600> -3- 2009/09 [AKD4425A-SA] Serial Control (I2C-bus Control Mode) The AK4425A can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3 (CTRL) with PC by 10 wire flat cable packed with the AKD4425A-SA PORT3 CTRL 10 wire flat Cable 10 9 Connect PC Red CSN CCLK/SCL AKD4425A-SA CDTI/SDA CDTO/SDA(ACK) 2 ▲ 10pin Header 10pin Connector Figure 2. Connect of 10 wire flat cable Analog Output Circuit AOUTL and AOUTR pins are outputted from J1 (LOUT) and J2 (ROUT). C24 (short) R16 470 R17 (short) 1 + AOUTL J1 BNC-R-PC R18 (open) C28 (short) R20 470 C27 2.2n R21 (short) R22 (open) C29 2.2n LOUT J2 BNC-R-PC 1 + AOUTR R1 (open) 2 3 4 5 R2 (open) 2 3 4 5 ROUT Figure 3. AOUTL / AOUTR Output Circuit ∗ AKM assumes no responsibility for the trouble when using the above circuit examples. <KM100600> -4- 2009/09 [AKD4425A-SA] Control Soft Manual ■ Evaluation Board and Control Soft Settings 1. Set an evaluation board properly. 2. Connect the evaluation board to an IBM PC/AT compatible PC by a 10wire flat cable. Be aware of the direction of the 10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing the driver. When running this control soft on the windows 95/98/ME, driver installing is not necessary. This control soft does not support the Windows NT. 3. Proceed evaluation by following the process below. ■ Operation Screen 1. Start up the control program following the process above. The operation screen is shown below. Figure 4. Window of [ FUNCTION] <KM100600> -5- 2009/09 [AKD4425A-SA] ■ Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs. Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting. 1. [Port Reset]: For when connecting to USB I/F board (AKDUSBIF-A) Click this button after the control soft starts up when connecting USB I/F board (AKDUSBIF-A). 2. [Write Default]: Register Initializing When the device is reset by a hardware reset, use this button to initialize the registers. 3. [All Write]: Executing write commands for all registers displayed. 4. [Save]: Saving current register settings to a file. 5. [Load]: Executing data write from a saved file. 6. [Data R/W]: “Data R/W” dialog box is popped up. ■ Tab Functions [Data R/W] Click the [Data R/W] button in the main window for data read/write dialog box. Data write is available to specified address. Figure 5. Window of [ Data R/W ] Address Box Data Box Mask Box [Write] [Close] : Input data address in hexadecimal numbers for data writing. : Input data in hexadecimal numbers. : Input mask data in hexadecimal numbers. This is “AND” processed input data. : Writing to the address specified by “Address” box. : Closing the dialog box and finish the process. Data writing can be cancelled by this button instead of [Write] button. *The register map will be updated after executing [Write] or [Read] commands. <KM100600> -6- 2009/09 [AKD4425A-SA] [REG]: Register Map This tab is for a register writing and reading. Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red). Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray) Grayout registers are Read Only registers. They can not be controlled. The registers which is not defined in the datasheet are indicated as “---”. Figure 6. Window of [ REG] <KM100600> -7- 2009/09 [AKD4425A-SA] [Write]: Data Writing Dialog It is for when changing two or more bits on the same address at the same time. Click [Write] button located on the right of the each corresponded address for a pop-up dialog box. When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”. Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting. Figure 7. Window of [ Register Set ] <KM100600> -8- 2009/09 [AKD4425A-SA] [Tool]: Testing Tools This tab screen is for evaluation testing tool. Click buttons for each testing tool. Figure 8. Window of [ Tool] <KM100600> -9- 2009/09 [AKD4425A-SA] [Repeat Test]: Repeat Test Dialog Click [Repeat Test] button to open repeat test setting dialog box. Figure 9. Window of [ Repeat Test] <KM100600> - 10 - 2009/09 [AKD4425A-SA] [Loop Setting]: Loop Setting Dialog Click [Loop Setting] button to open loop setting dialog box. Figure 10. Window of [ Loop] <KM100600> - 11 - 2009/09 [AKD4425A-SA] Measurement Results [Measurement condition] • Measurement unit • MCLK • BICK • fs • Bit • Power Supply • Interface • Temperature : Audio Precision System two Cascade (AP2) : 512fs (fs = 44.1kHz), 256fs (fs = 96kHz), 128fs (fs = 192kHz) : 64fs : 44.1kHz, 96kHz, 192kHz : 24bit : VDD=AVDD=5V : DIR : Room Table Data fs=44.1kHz Parameter Input signal S/(N+D) 1kHz, 0dB DR S/N 1kHz, -60dB “0” data fs=96kHz Parameter Input signal S/(N+D) 1kHz, 0dB DR S/N 1kHz, -60dB “0” data fs=192kHz Parameter Input signal S/(N+D) 1kHz, 0dB DR S/N 1kHz, -60dB “0” data <KM100600> Filter condition 20kHz SPCL, 20kHz Brick-wall LPF 20kHz SPCL, A-weighted 20kHz SPCL, A-weighted Filter condition 40kHz SPCL, 40kHz Brick-wall LPF 40kHz SPCL, A-weighted 40kHz SPCL, A-weighted Filter condition 40kHz SPCL, 40kHz Brick-wall LPF 40kHz SPCL, A-weighted 40kHz SPCL, A-weighted - 12 - Lch 91.6 Rch 91.1 Unit dB 106.1 106.5 106.0 106.3 dB dB Lch 91.6 Rch 91.1 Unit dB 106.2 106.4 106.0 106.3 dB dB Lch 91.5 Rch 91.0 Unit dB 106.3 106.4 106.1 106.3 dB dB 2009/09 [AKD4425A-SA] Plot Data (1) fs = 44.1kHz (MCLK=512fs) 0dBFS FFT@fs=44.1kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 11. FFT (fin=1kHz, Input Level=0dBFS) -60dBFS FFT@fs=44.1kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 12. <KM100600> FFT (fin=1kHz, Input Level=-60dBFS) - 13 - 2009/09 [AKD4425A-SA] No Signal FFT@fs=44.1kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 13. FFT (No Signal) Out of band Noise@fs=44.1kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k Hz Figure 14. FFT (Out of band noise) <KM100600> - 14 - 2009/09 [AKD4425A-SA] THD+N vs. Input Level@fs=44.1kHz [Blue:LOUT, Red:ROUT] -60 -65 -70 -75 -80 d B r A -85 -90 -95 -100 -105 -110 -115 -120 -140 -120 -100 -80 -60 -40 -20 +0 dBFS Figure 15. THD+N vs. Input level (fin=1kHz, 20kHz SPCL) THD+N vs. Input Frequency@fs=44.1kHz [Blue:LOUT, Red:ROUT] -60 -65 -70 -75 -80 d B r A -85 -90 -95 -100 -105 -110 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 16. THD+N vs. Input Frequency (Input level=0dBFS, 20kHz SPCL) <KM100600> - 15 - 2009/09 [AKD4425A-SA] Linearity@fs=44.1kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 d B r A -60 -80 -100 -120 -140 -140 -120 -100 -80 -60 -40 -20 +0 dBFS Figure 17. Linearity (fin=1kHz) Frequency Response@fs=44.1kHz [Blue:LOUT, Red:ROUT] +1 +0.8 +0.6 +0.4 d B r +0.2 A -0.2 +0 -0.4 -0.6 -0.8 -1 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Hz Figure 18. Frequency Response (Input level=0dBFS) <KM100600> - 16 - 2009/09 [AKD4425A-SA] Crosstalk@fs=44.1kHz -80 -85 -90 -95 -100 -105 d B -110 -115 -120 -125 -130 -135 -140 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Hz Figure 19. Crosstalk (Input level=0dBFS) Red: Lch Å Rch, Blue: Rch Å Lch <KM100600> - 17 - 2009/09 [AKD4425A-SA] (2) fs = 96kHz (MCLK=256fs) 0dBFS FFT@fs=96kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k 40k 5k 10k 20k 40k Hz Figure 20. FFT (fin=1kHz, Input Level=0dBFS) -60dBFS FFT@fs=96kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k Hz Figure 21. FFT (fin=1kHz, Input Level=-60dBFS) <KM100600> - 18 - 2009/09 [AKD4425A-SA] No Signal FFT@fs=96kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k 40k Hz Figure 22. FFT (No Signal) Out of band Noise@fs=96kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k Hz Figure 23. FFT (Out of band noise) <KM100600> - 19 - 2009/09 [AKD4425A-SA] THD+N vs. Input Level@fs=96kHz [Blue:LOUT, Red:ROUT] -60 -65 -70 -75 -80 d B r A -85 -90 -95 -100 -105 -110 -115 -120 -140 -120 -100 -80 -60 -40 -20 +0 dBFS Figure 24. THD+N vs. Input level (fin=1kHz) THD+N vs. Input Frequency@fs=96kHz [Blue:LOUT, Red:ROUT] -60 -65 -70 -75 -80 d B r A -85 -90 -95 -100 -105 -110 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k 40k Hz Figure 25. THD+N vs. Input Frequency (Input level=0dBFS) <KM100600> - 20 - 2009/09 [AKD4425A-SA] Linearity@fs=96kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 d B r A -60 -80 -100 -120 -140 -140 -120 -100 -80 -60 -40 -20 +0 dBFS Figure 26. Linearity (fin=1kHz) Frequency Response@fs=96kHz [Blue:LOUT, Red:ROUT] +1 +0.8 +0.6 +0.4 d B r +0.2 A -0.2 +0 -0.4 -0.6 -0.8 -1 5k 10k 15k 20k 25k 30k 35k 40k Hz Figure 27. Frequency Response (Input level=0dBFS) <KM100600> - 21 - 2009/09 [AKD4425A-SA] Crosstalk@fs=96kHz -80 -85 -90 -95 -100 -105 d B -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k 2k 5k 10k 20k 40k Hz Figure 28. Crosstalk (Input level=0dBFS) Red: Lch Å Rch, Blue: Rch Å Lch <KM100600> - 22 - 2009/09 [AKD4425A-SA] (3) fs = 192kHz (MCLK=128fs) 0dBFS FFT@fs=192kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k 10k 20k 50k 80k Hz Figure 29. FFT (fin=1kHz, Input Level=0dBFS) -60dBFS FFT@fs=192kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k Hz Figure 30. FFT (fin=1kHz, Input Level=-60dBFS) <KM100600> - 23 - 2009/09 [AKD4425A-SA] No Signal FFT@fs=192kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k Hz Figure 31. FFT (No Signal) Out of band Noise@fs=192kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 -60 d B r -80 -100 A -120 -140 -160 -180 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k Hz Figure 32. FFT (Out of band noise) <KM100600> - 24 - 2009/09 [AKD4425A-SA] THD+N vs. Input Level@fs=192kHz [Blue:LOUT, Red:ROUT] -60 -65 -70 -75 -80 d B r A -85 -90 -95 -100 -105 -110 -115 -120 -140 -120 -100 -80 -60 -40 -20 +0 dBFS Figure 33. THD+N vs. Input level (fin=1kHz) THD+N vs. Input Frequency@fs=192kHz [Blue:LOUT, Red:ROUT] -60 -65 -70 -75 -80 d B r A -85 -90 -95 -100 -105 -110 -115 -120 20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k Hz Figure 34. THD+N vs. Input Frequency (Input level=0dBFS) <KM100600> - 25 - 2009/09 [AKD4425A-SA] Linearity@fs=192kHz [Blue:LOUT, Red:ROUT] +0 -20 -40 d B r A -60 -80 -100 -120 -140 -140 -120 -100 -80 -60 -40 -20 +0 dBFS Figure 35. Linearity (fin=1kHz) Frequency Response@fs=192kHz [Blue:LOUT, Red:ROUT] +1 +0.5 +0 d B r -0.5 A -1 -1.5 -2 10k 20k 30k 40k 50k 60k 70k 80k Hz Figure 36. Frequency Response (Input level=0dBFS) <KM100600> - 26 - 2009/09 [AKD4425A-SA] Crosstalk@fs=192kHz -80 -85 -90 -95 -100 -105 d B -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k Hz Figure 37. Crosstalk (Input level=0dBFS) Red: Lch Å Rch, Blue: Rch Å Lch <KM100600> - 27 - 2009/09 [AKD4425A-SA] REVISION HISTORY Date Manual (yy/mm/dd) Revision 09/09/02 KM100600 Board Revision 0 Reason Page Contents First Edition IMPORTANT NOTICE z These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. z AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein. z Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. <KM100600> - 28 - 2009/09 5 4 3 2 1 D D 442x-VDD C1 0.1u 1 2 442x-MCLK VDD VSS1 MCLK CP 442x-BICK 3 BICK 442x-SDATA 4 SDTI 442x-LRCK 5 LRCK 6 CSN U1 R60 (open) 16 R54 (open) 15 R55 (open) C3 1u C + C2 10u CN 14 VEE 13 C4 1u R56 (open) C AK4425A AOUTL 12 VSS2 11 AOUTL R53(short) 442x-CCLK/SCL R33(short) 4425/6 C5 0.1u 7 CCLK 8 CDTI AVDD + 442x-CSN/CAD0/SMUTE C6 10u R57 (open) 10 442x-AVDD R34(open) MANUAL B D5V 442x-CDTI/SDA R35(open) AUTO AOUTR 9 B AOUTR R36(short) 4425/6 ON R37(open) R38(open) OFF A A Title Size 5 4 3 AKD4425A-SA Document Number A4 AK4425A Date: Wednesday, August 19, 2009 Sheet 2 Rev 0 1 1 of 4 5 4 3 2 1 D3.3V D5V R61 (open) R62 (open) + 4118-VCC + R10 51 C9 10u R47(open) 4118-VCC R48(open) C13 10u A1-10PA-2.54DSA R49(open) MCLK 1 BICK LRCK 3 SDATA 5 D R50(open) LRCK SDTO 25 BICK 26 R43(short) 9 10 XTL0 MCKO2 27 9 P/SN DAUX 28 8 IPS1/IIC 7 DIF2/RX7 U3 DIF1/RX6 4 TEST2 XTO 29 XTI 30 PDN 31 CM0/CDTO/CAD1 32 CM1/CDTI/SDA 33 OCKS1/CCLK/SCL 34 2 NC OCKS0/CSN/CAD0 35 A7 Y7 12 7 A6 Y6 13 R9 10k + R11 (open) C11 10u 6 A5 5 A4 74LVC541A Y3 16 LRCK 3 A2 Y2 17 CSN 2 A1 Y1 18 19 G2 GND 10 1 G1 VCC 20 51 442x-SDATA 442x-LRCK 442x-CSN/CAD0/SMUTE R8 CCLK/SCL 51 442x-CCLK/SCL LVC INT1 R51(short) CSN/CAD0 CSN/CAD0 SMUTE R52(open) U4 1 2 3 4 5 6 7 1A 1Y 2A 2Y 3A 3Y GND VCC 6A 6Y 5A 5Y 4A 4Y 14 13 12 11 10 9 8 D3.3V C22 0.1u D1 HSU119 3 A K R14 10k D2 HSU119 C23 0.1u L SW1 ATE1D-2M3 SMUTE 74HC14 R12 10k A H Title 2 H 1 K D3.3V C21 0.1u Size A3 Date: 4 R6 CCLK/SCL 47k 5 51 C14 0.1u C8 0.1u L SW2 ATE1D-2M3 AK4118-PDN 4 3 2 1 R5 TEST1 AK4118-INT0 A RP1 SDATA A3 C7 10u OCKS0 OCKS1 DIF0 DIF1 15 B 1 SW DIP-4 L OCKS0 OCKS1 DIF0 DIF1 Y4 C U2 3 H 5 6 7 8 14 OCKS0 2 S1 4 3 2 1 Y5 OCKS1 D3.3V 4118-VCC 51 442x-BICK 4 4118-VCC A R4 BICK + R13 (open) 442x-MCLK C16 (open) TEST2 AK4118-INT1 RX-OUT 5.1 36 37 AVDD 38 R 39 VCOM 40 VSS3 41 RX0 42 43 RX1 44 47 48 RX3 VSS4 B NC INT0 TEST1 IPS0/RX4 45 1 8 R45(short) DIF0/RX5 R3 MCLK 11 R46(short) 3 RX2 DIF0 5 46 DIF1 Y8 R44(short) AK4118 VSS1 A8 C15 (open) C 6 D DSP PORT1 24 23 22 MCKO1 DVDD VOUT/GP7 VSS2 21 20 19 18 17 16 15 TX1/GP3 UOUT/GP6 XTL1 COUT/GP5 11 BOUT/GP4 VIN/GP0 TX0/GP2 NC/GP1 13 TVDD 12 7 9 C12 0.1u 14 C10 0.1u 2 4 6 8 10 3 2 AKD4425A-SA Document Number Rev 0 CLOCK & DIR Wednesday, August 19, 2009 Sheet 1 2 of 4 5 4 3 2 1 L1 47u 1 2 D3.3V PORT2 RX VCC 3 GND OUT 2 1 1 + C26 10u C25 0.1u R18 (open) R19 51 C C28 (short) C30 0.1u R20 470 + R22 (open) R41(short) C29 2.2n 1 LOUT 2 3 4 5 D J2 BNC-R-PC 1 R2 (open) ROUT 2 3 4 5 BNC R23 75 C D5V D5V PORT3 10 8 6 4 2 B R1 (open) R21 (short) AOUTR RX-OUT J3 BNC-R-PC C27 2.2n R42(open) OPT 2 3 4 5 J1 BNC-R-PC R17 (short) AOUTL TORX141 COAX R16 470 + D C24 (short) 9 7 5 3 1 R24 10k R25 470 R26 10k R27 470 R28 10k R29 470 D3.3V U5 CSN CCLK/SCL CDTI/SDA CDTO/SDA(ACK) 2 3 5 6 11 10 14 13 1A 1B 2A 2B 3A 3B 4A 4B 1 15 A/B G 1Y 4 CSN/CAD0 2Y 7 CCLK/SCL 3Y 9 4Y 12 VCC GND 16 8 74HCT157 C31 0.1u D5V CTRL U6 1 3 5 9 11 13 1A 2A 3A 4A 5A 6A 14 VCC C32 0.1u 7 GND R30 1.8k 1Y 2Y 3Y 4Y 5Y 6Y 2 4 6 8 10 12 442x-CDTI/SDA B 74LS07 R39 (open) R40 (open) CAD0 3-wire A A Title Size A4 Date: 5 4 3 2 AKD4425A-SA Document Number Rev Input, Output Wednesday, August 19, 2009 Sheet 0 1 3 of 4 2 1 +15V VDD AVDD T45_R T45_O T45_O T1 +15V-->+3.3V uPC3533HF +15V 1 IN D +3.3V 3 GND D OUT +15V-IN C35 0.1u VDD-IN AVDD-IN D3.3V 2 C34 + 470u 1 3 1 4 1 5 + C36 0.1u +3.3V C37 47u GND R31 (short) T45_BLACK T2 +15V-->+5V NJM78M05FA +15V 1 C GND +15V-IN IN OUT +5V 3 1 LVC R32 (open) +5V D5V C 1 + 2 C38 470u C39 0.1u C40 0.1u C41 47u + 2 1 2 VDD-IN R58(open) 442x-VDD B 2 1 B +C42 47u AVDD-IN R59(open) 1 442x-AVDD 2 A +C43 47u A Title Size A4 Date: 5 4 3 2 AKD4425A-SA Document Number Rev Power Supply Wednesday, August 19, 2009 Sheet 0 1 4 of 4