AKM AKD4629-A

[AKD4629-A]
AKD4629-A
Evaluation board Rev.1 for AK4629
GENERAL DESCRIPTION
The AKD4629-A is an evaluation board for the AK4629, a single chip CODEC that includes four channels
of ADC and six channels of DAC. The AKD4629-A also has the digital audio interface and can achieve the
interface with digital audio systems via opt-connector or BNC connector.
„ Ordering guide
AKD4629-A
--- AK4629 Evaluation Board
(Cable for connecting with printer port of IBM-AT compatible PC
and control software are packed with this.) This control software can’t operate
on Windows NT.
FUNCTION
• On-board analog output buffer circuit
• Compatible with 2 types of interface
- AK4118 (DIT&DIR) with optical output/input and BNC output/input
- Direct interface with AC3 decoder by 10pin header
• 10pin header for serial control interface
-12V +12V
Regulator AVDD DVDD TVDD GND
Regulator
+5V
LOUT1
ROUT1
+3.3V
LOUT2
ROUT2
Output
Buffer
BNC In
AK4118
LOUT3
ROUT3
AK4629
Opt In
(DIT&DIR)
Opt Out
BNC Out
LOUT4
ROUT4
AC3
10pin Header
LIN1+/LIN1
Control Data
LIN1-
10pin Header
LIN2+/LIN2
LIN2-
Figure 1 AKD4629-A Block Diagram
*Circuit diagram and PCB layout are attached at the end of this manual.
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[AKD4629-A]
Evaluation Board Manual
„ Operation sequence
1) Set up the power supply lines.
(1-1) In case of using separate power supply lines <Default>
Set up the jumper pins.
JP82
JP83
JP84
AVDD
DVDD
TVDD
REG JACK REG JACK REG JACK
Set up the power supply lines.
Name
+12V
-12V
AVDD
DVDD
TVDD
AGND
DGND
Color
Red
Red
Orange
Orange
Orange
Black
Black
Voltage
+12V
-12V
+5V
+5V
+5V
0V
0V
Comments
Regulator, Power Supply for Op-amp
Power Supply for Op-amp
Power supply for AVDD of the AK4629
Power supply for DVDD of the AK4629
Power supply for TVDD of the AK4629
Analog ground
Digital ground
Table 1 Set up of power supply lines
Attention
Should be connected.
Should be connected.
Should be connected.
Should be connected.
Should be connected.
Should be connected.
Should be connected.
(1-2) In case of using the regulator
Set up the jumper pins.
JP82
AVDD
JP83
DVDD
JP84
TVDD
REG JACK REG JACK REG JACK
Set up the power supply lines.
Name
+12V
-12V
AVDD
DVDD
TVDD
AGND
DGND
Color
Red
Red
Orange
Orange
Orange
Black
Black
Voltage
+12V
-12V
+5V
+5V
+5V
0V
0V
Comments
Regulator, Power Supply for Op-amp
Power Supply for Op-amp
Power supply for AVDD of the AK4629
Power supply for DVDD of the AK4629
Power supply for TVDD of the AK4629
Analog ground
Digital ground
Attention
Should be connected.
Should be connected.
Should be open.
Should be open.
Should be open.
Should be connected.
Should be connected.
Table 2 Set up of power supply lines
2) Set up the evaluation mode, jumper pins. (See the followings)
3) Power on.
The AK4629 and AK4118 should be reset once bringing SW1 “L” upon power-up.
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[AKD4629-A]
„ Control mode
(1) Parallel control mode <Default>
(1-1) Set up Parallel/Serial select pin
Set up SW2-6 (PS) to “H”. (See Table 3)
(1-2) Set up the jumper pins
JP61
SEL1
CSN
JP63
SEL2
DIF0
SCL/CCLK DIF1
JP62
SEL3
SDA/CDTI TDM0
(2) Serial control mode
(1-1) Set up Parallel/Serial select pin
Set up SW2-6 (PS) to “L”. (See Table 3)
(1-2) Set up the jumper pins
JP61
SEL1
CSN
JP63
SEL2
DIF0
SCL/CCLK DIF1
JP62
SEL3
SDA/CDTI TDM0
„ Audio I/F evaluation mode
(1) Evaluation of ADC using DIT of AK4118
(1-1) Set up analog inputs
(1-1-1) Evaluation of ADC using DIT of AK4118 when single-ended inputs
PORT2 (DIT) or J2 (BNC_TX) is used. Nothing should be connected to PORT4 (AC3).
Set up SW2-2 (SGL) to H (See Table 3).
Set up the jumper pins.
JP33
JP34
JP37
JP38
LIN1+
LIN1-
RIN1+
RIN1-
Canon RCA
Canon GND
CanonRCA
<KM101901>
CanonGND
2011/01
-3-
[AKD4629-A]
JP31
JP32
JP35
JP36
LIN2+
LIN2-
RIN2+
RIN2-
Canon RCA
Canon GND
CanonRCA
CanonGND
(1-1-2) Evaluation of ADC using DIT of AK4118 when differential inputs <Default>
PORT2 (DIT) or J2 (BNC_TX) is used. Nothing should be connected to PORT4 (AC3).
Set up SW2-2 (SGL) to L (See Table 3).
Set up the jumper pins.
JP33
JP34
JP37
JP38
LIN1+
LIN1-
RIN1+
RIN1-
Canon RCA
Canon GND
CanonRCA
JP31
LIN2+
JP32
LIN2-
JP35
RIN2+
Canon RCA
Canon GND
CanonRCA
CanonGND
JP36
RIN2-
CanonGND
(1-2) Set up the digital output
(1-2-1) In case of selecting SDTO1 <Default>
Set up the jumper pin.
JP13
SDTO-SEL
SDTO1 SDTO2
(1-2-2) In case of selecting SDTO2
Set up the jumper pin.
JP13
SDTO-SEL
SDTO1 SDTO2
(1-3) Set up the audio interface.
Set up the jumper pins.
JP14
JP16
JP17
SDTO-SEL
BICK-SEL
LRCK-SEL
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[AKD4629-A]
(2) Evaluation of DAC using DIR of AK4118 <Default>
J1 (BNC_RX) or PORT1 (DIR) is used. Nothing should be connected to PORT4 (AC3).
(2-1) Set up the digital inputs
Set up the jumper pins (When SDTI1, SDTI2, SDTI3, SDTI4 are selected at the same time).
JP66
JP67
JP68
JP65
SDTI1
SDTI2
SDTI3
SDTI4
(2-2) Set up the audio interface
Set up the jumper pins.
JP16
JP17
BICK-SEL
LRCK-SEL
(2-3) Set up the SMUTE pin
Set up the jumper pin.
JP64
SMUTE
When JP64 (SMUTE) is open, soft mute cycle is initialized.
When JP64 (SMUTE) is short, the output mute releases.
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[AKD4629-A]
„ DIP Switch set up
[SW2] (MODE1): Mode settings for AK4629.
About the TDM mode of AK4629, please refer to Page 18 of AK4629’s datasheet.
No.
1
Name
TDM0
2
SGL
3
4
I2C
DFS0
5
DZFE
6
7
8
PS
CAD1
CAD0
“H”
“L”
TDM Mode
Normal Mode
ADC Single-ended
ADC Differential
Input Mode
Input Mode
I2C Bus
3-wire Serial
Double Speed
Normal Speed
Zero Input Detect.
Refer to the datasheet P23 of the AK4629.
Parallel Control mode Serial Control mode
Chip Address Select. Refer to Table 9
Default
L
L
L
L
L
H
L
L
Table 3 Mode Setting for AK4629
[SW3] (AK4118 Mode_setting): Mode setting for AK4118.
No.
1
2
3
4
5
6
7
Name
DIF2
DIF1
DIF0
OCKS1
OCKS0
CM1
CM0
“H”
“L”
AK4118’s Audio Data Format Settings, and
AK4629’s Audio Data Format Settings when
Parallel Control Mode. See Table 5 and Table 6
AK4118’s Master Clock Settings.
See Table 7
AK4118’s Clock Operation Mode Select.
See Table 8
Default
H
L
L
H
L
L
L
Table 4 Mode Setting for AK4118
AK4118’s audio data format and AK4629’s audio data format are set up at the same time by settings of SW3-1
(DIF2), SW3-2 (DIF1) and SW3-3 (DIF0) when AK4629 is on Parallel Control Mode.
SW3-1
DIF2
0
SW3-2
DIF1
1
SW3-3
DIF0
0
AK4629
DIF1
0
AK4629
DIF0
0
0
1
1
0
1
1
0
0
1
0
1
0
1
1
1
AK4118
DAUX
24bit, Left
justified
24bit, Left
justified
24bit, Left
justified
24bit, I2S
AK4118
SDTO
20bit, Right
justified
24bit, Right
justified
24bit, Left
justified
24bit, I2S
LRCK
BICK
H/L
O
64fs
O
H/L
O
64fs
O
H/L
O
64fs
O
L/H
O
64fs
O
Table 5 AK4114’s Audio Data Format (Parallel control mode <Default>)
Both of settings of DIF1-0 bits of AK4629’s registers and settings of SW3-1 (DIF2), SW3-2 (DIF1), SW3-3
(DIF0) are necessary when AK4629 is on Serial Control Mode.
DIF1
DIF0
Mode
SDTO1-2
SDTI1-3
bit
bit
0
0
0
24bit, Left justified 20bit, Right justified
1
0
1
24bit, Left justified 24bit, Right justified
2
1
0
24bit, Left justified
24bit, Left justified (Default)
3
1
1
24bit, I2S
24bit, I2S
Table 6 AK4629’s Audio data formats (Serial control mode)
<KM101901>
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(Default)
[AKD4629-A]
AK4118 supplies AK4629’s Master Clock with MCKO1.
No.
0
1
2
3
OCKS1
0
0
1
1
OCKS0
0
1
0
1
MCKO1
256fs
256fs
512fs
128fs
MCKO2
256fs
128fs
256fs
64fs
X’tal
256fs
256fs
512fs
128fs
fs (max)
96 kHz
96 kHz
48 kHz
192 kHz
(default)
Table 7 AK4118’s Master Clock Frequency Select (Stereo mode)
Mode
0
1
2
3
CM1
0
0
CM0
0
1
PLL
X'tal
Clock source SDTO
ON
ON
PLL
RX
OFF
ON
X'tal
DAUX
ON
ON
PLL
RX
1
0
ON
ON
X'tal
DAUX
1
1
ON
ON
X'tal
DAUX
ON: Oscillation (Power-up), OFF: STOP (Power-Down)
(default)
Table 8 AK4118’s Clock Operation Mode select
„ Other jumper pins set up
1. JP81 (GND) : Connection between AGND and DGND.
OPEN : AGND and DGND are separated on the board.
SHORT : AGND and DGND are connected on the board. <Default>
2. JP11 (RX3) : Digital input connector selection for AK4118.
OPT
: Optical connector (PORT1) is used, except when Quad Speed Mode for DAC evaluation.
BNC : BNC Jack (J1) is used. <Default>
3. JP12 (TX)
OPT
BNC
: Digital output connector selection for AK4118.
: Optical connector (PORT2) is used.
: BNC Jack (J2) is used. <Default>
4. JP15 (MCLK_SEL): This jumper pin is fixed to SHORT. <Default>
„ The function of the toggle SW
[SW1] (PDN): Power down of AK4629 and AK4118. Keep “H” during normal operation.
„ The indication content for LED
[LE1] Monitor DZF1 pin of the AK4629.
[LE2] Monitor DZF2 pin of the AK4629.
About zero detection of AK4629, please refer to Page 23 of AK4629’s datasheet.
<KM101901>
2011/01
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[AKD4629-A]
„ Serial Control
The AK4629 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3
(CTRL) with PC by 10 wire flat cable packed with the AKD4629-A.
PORT3
CTRL
10 wire
flat Cable
10
CSN
CCLK/SCL
AKD4627-A
CDTI/SDA
CDTO/SDA(ACK)
Connect
PC
Red
9
2 ▲
10pin Header
10pin Connector
Figure 2 Connect of 10 wire flat cable
The AK4629 supports 3-wire serial control mode and I2C-bus control mode (fast-mode, max : 400kHz).
Please set the jump pins: JP61 (SEL1), JP63 (SEL2) and JP62 (SEL3), referred to (2) Serial Control Mode.
Mode
3-wire
I2C
Chip Address
00
01
10
11
00
01
10
11
SW2-7
(CAD1)
0
0
1
1
0
0
1
1
SW2-8
(CAD0)
0
1
0
1
0
1
0
1
R/W
Write only
Write only
Write only
Write only
R/W
R/W
R/W
R/W
(default)
Table 9 Select Interface and Chip Address
<KM101901>
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[AKD4629-A]
„ Analog Input/Output Circuits
1. Analog Input Circuits
J5
LINA1
2
LIN1+
2
3
3
RCA
1
LIN1+/LIN1
1
JP33 canon
JP34 canon
LIN1-
LIN1-
2
3
1
GND
J9 LINB1
MR-552LS
J6
RINA1
2
RIN1+
2
3
3
1
JP37 canon
RCA
1
RIN1+/RIN1
JP38 canon
RIN1-
RIN1-
2
3
1
GND
J10 RINB1
MR-552LS
J3
LINA2
2
LIN2+
2
3
3
1
JP31 canon
RCA
1
LIN2+/LIN2
JP32 canon
LIN2-
LIN2-
2
3
1
GND
J7 LINB2
MR-552LS
J4
RINA2
2
3
3
RCA
1
RIN2+
2
1
JP35 canon
RIN2+/RIN2
JP36 canon
RIN2-
RIN2-
2
3
1
GND
J8 RINB2
MR-552LS
Figure 3 AKD4629-A Analog Input Circuits
<KM101901>
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[AKD4629-A]
2. Analog Output Circuits
ROUT1
U4B
R44
OP275GPZ 220
7
5 +
6 -
8
+
ROUT2
J11
ROUT1
5 +
6 -
R45
10k
R115
(open)
-12V
4
R41
10k
C101
(short)
+12V
J14
LOUT1
LOUT2
8
4
-12V
R94
4.7K
R91
4.7k
5 +
6 -
ROUT4
R17
10k
-12V
330p C46
R15
4.7K
3 +
2 -
-12V
+12V
J16
LOUT3
LOUT4
8
C55
22u
U6A
R113 C106
OP275GPZ 220
(short)
1
4
R97
10k
3 +
2 -
R19
10k
R120
(open)
U7A
R18 C108
OP275GPZ 220 (short)
1
-12V
J18
LOUT4
R122
(open)
330p C56
330p C52
R98
4.7K
R121
(open)
R16
4.7k
4
8
+
LOUT3
R87
4.7k
+12V
C51
22u
J17
ROUT4
330p C54
+
R50
4.7K
U7B
R114 C107
OP275GPZ 220
(short)
7
4
-12V
+12V
C53
22u
8
J13
ROUT3
R117
(open)
4
R49
10k
U6B
R88 C103
OP275GPZ 220 (short)
7
+
8
+
5 +
6 -
ROUT3
R119
(open)
R95
4.7k
+12V
C45
22u
J15
LOUT2
330p C50
C48
330p
R90
4.7K
U5A
R96 C105
OP275GPZ 220 (short)
1
3 +
2 -
R93
10k
R118
(open)
-12V
+
8
U4A
R92 C104
OP275GPZ 220 (short)
1
4
R89
10k
R47
4.7k
C49
22u
+12V
+
LOUT1
R46
4.7K
3 +
2 -
R116
(open)
-12V
R43
4.7k
C47
22u
J12
ROUT2
330p C44
330p C42
R42
4.7K
U5B
R48 C102
OP275GPZ 220 (short)
7
4
+
8
C41
22u
+12V
C43
22u
+12V
R31
4.7K
R99
4.7k
R29
4.7k
Figure 4 AKD4629-A Analog Output Circuits
<KM101901>
2011/01
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[AKD4629-A]
Control Soft Manual
■ Evaluation Board and Control Soft Settings
1. Set an evaluation board properly.
2. Connect the evaluation board to an IBM PC/AT compatible PC by a 10 wire flat cable. Be aware of the direction of
the 10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD
must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing the
driver. When running this control soft via an AKDUSBIF-B interface board, driver installing is not necessary.
3. Continue the evaluation by following the process below.
■ Operation Screen
1. Start up the control program following the process above.
The operation screen is shown below.
<KM101901>
2011/01
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[AKD4629-A]
■ Operation Overview
Register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs.
Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching
tab window. Refer to the “Dialog Boxes” for details of each dialog box setting.
1. [Port Reset]: For when connecting to USB I/F board (AKDUSBIF-A/B)
Click this button after the control soft starts up when connecting USB I/F board (AKDUSBIF-A/B).
2. [Write Default]: Register Initializing
When the device is reset by a hardware reset, use this button to initialize the registers.
3. [All Write]: Executing write commands for all registers displayed.
4. [All Read]: Executing read commands for all registers displayed.
5. [Save]: Saving current register settings to a file.
6. [Load]: Executing data write from a saved file.
7. [All Reg Write]: “All Reg Write” dialog box is popped up.
8. [Data R/W]: “Data R/W” dialog box is popped up.
9. [Sequence]: “Sequence” dialog box is popped up.
10.
[Sequence(File)]: “Sequence(File)” dialog box is popped up.
11.
[Read]: Reading current register settings and display on to the Register area (on the right of the main window).
This is different from [All Read] button, it does not reflect to a register map, only displaying
hexadecimal.
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[AKD4629-A]
1. [REG]: Register Map
This tab is for a register writing and reading.
Each bit on the register map is a push-button switch.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
The registers which is not defined in the datasheet are indicated as “---”.
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[AKD4629-A]
[Write]: Data Writing Dialog
It is for when changing two or more bits on the same address at the same time.
Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.
When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”.
Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting.
[Read]: Data Read
Click [Read] button located on the right of the each corresponded address to execute register reading.
After register reading, the display will be updated regarding to the register status.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
Please be aware that button statuses will be changed by Read command.
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[AKD4629-A]
2. [Tool]: Testing Tools
This tab screen is for evaluation testing tool.
Click buttons for each testing tool.
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[AKD4629-A]
2-1. [Repeat Test]: Repeat Test Dialog
Click [Repeat Test] button in the Test tab to open the repeat test dialog shown below.
Repeat writing test can be executed by this dialog.
[Start] Button
: Starts the repeat test.
A dialog for saving a file of the test result will open when clicking this button.
Name the file.
Test will start after specifying a saving file.
[Close] Button
: Closes this dialog and finishes the process.
[Address] Box
: Data writing address in hexadecimal numbers.
[Start Data] Box
: Start data in hexadecimal numbers.
[End Data] Box
: End data in hexadecimal numbers.
[Step] Box
: Data write step interval.
[Repeat Count] Box : Repeat count of the test writing.
[Up and Down] Box : Data write flow is changed as below.
• Checked: Writes in step interval from the start data to the end data and turn back from the end data to
the start data.
[Example]
Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.
Data flow:
[00→01→02→03→04→05→05→04→03→02→01→00] x Repeat Count Number
• Not checked: Writes in step interval from the start data to the end data and finishes writing.
[Example]
Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.
Data flow:
[00→01→02→03→04→05] x Repeat Count Number
[Sampling Frequency] Box: Selects sampling frequency 44.1kHz/48kHz
[Count] Box
: Indicates the count number during a repeat test.
[Lch Level] Box : Indicates the Lch Level during a repeat test.
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[AKD4629-A]
2-2. [Loop Setting]: Loop Dialog
Click [Loop Setting] button in the Tool tab to open the loop setting dialog as shown below.
Writing test can be executed.
[ OK ] Button
[ Cancel ] Button
[ Address ] Box
[ Start Data ] Box
[ End Data ] Box
[ Interval ] Box
[ Step ] Box
[ Mode Select ] Box
: Starts the test.
: Closes the dialog and finishes the process.
: Data writing address in hexadecimal numbers.
: Start data in hexadecimal numbers.
: End data in hexadecimal numbers.
: Data write interval time.
: Data write step interval.
: Mode select check box.
• Checked:
Writes in step interval from the start data to the end data and turn back from the end data to
the start data.
[Example]
Start Data = 00, End Data = 05, Step = 1
Data flow: 00→01→02→03→04→05→05→04→03→02→01→00
• Not Checked: Writes in step interval from the start data to the end data and finishes writing.
[Example]
Start Data = 00, End Data = 05, Step = 1
Data flow: 00→01→02→03→04→05
<KM101901>
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[AKD4629-A]
„ Dialog Boxes
1. [All Reg Write]: All Register Write dialog box
Click [All Reg Write] button in the main window to open register setting files.
Register setting files saved by [SAVE] button can be applied.
[Open (left)]: Selecting a register setting file (*.akr).
[Write]: Executing register writing.
[Write All]: Executing all register writings.
Writings are executed in descending order.
[Help]: Help window is popped up.
[Save]: Saving the register setting file assignment. The file name is “*.mar”.
[Open (right)]: Opening a saved register setting file assignment “*. mar”.
[Close]: Closing the dialog box and finish the process.
*Operating Suggestions
(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be
stored in the same folder.
(2) When register settings are changed by [Save] button in the main window, re-read the file to reflect new register
settings.
<KM101901>
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[AKD4629-A]
2. [Data R/W]: Data R/W Dialog Box
Click the [Data R/W] button in the main window for data read/write dialog box.
Data write is available to specified address.
Address Box: Input data address in hexadecimal numbers for data writing.
Data Box: Input data in hexadecimal numbers.
Mask Box: Input mask data in hexadecimal numbers.
This is “AND” processed input data.
[Write]: Writing to the address specified by “Address” box.
[Read]: Reading from the address specified by “Address” box.
The result will be shown in the Read Data Box in hexadecimal numbers.
[Close]: Closing the dialog box and finish the process.
Data writing can be cancelled by this button instead of [Write] button.
*The register map will be updated after executing [Write] or [Read] commands.
<KM101901>
2011/01
-19-
[AKD4629-A]
3. [Sequence]: Sequence Dialog Box
Click [Sequence] button to open register sequence setting dialog box.
Register sequence can be set in this dialog box.
Sequence Setting
Set register sequence by following process bellow.
(1)Select a command
Use [Select] pull-down box to choose commands.
Corresponding boxes will be valid.
< Select Pull-down menu >
· No_use: Not using this address
· Register: Register writing
· Reg(Mask): Register writing (Masked)
· Interval: Taking an interval
· Stop: Pausing the sequence
· End: Finishing the sequence
(1) Input sequence
[Address]: Data address
[Data]: Writing data
[Mask]: Mask
[Data] box data is ANDed with [Mask] box data. This is the actual writing data.
When Mask = 0x00, current setting is hold.
When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.
When Mask =0x0F, lower 4bit data which is set in the [Data] box is written.
Upper 4bit is hold to current setting.
<KM101901>
2011/01
-20-
[AKD4629-A]
[ Interval ]: Interval time
Valid boxes for each process command are shown bellow.
· No_use: None
· Register: [Address], [Data], [Interval]
· Reg(Mask): [Address], [Data], [Mask], [Interval]
· Interval: [Interval]
· Stop: None
· End: None
Control Buttons
The function of Control Button is shown bellow.
[Start]: Executing the sequence
[Help]: Opening a help window
[Save]: Saving sequence settings as a file. The file name is “*.aks”.
[Open]: Opening a sequence setting file “*.aks”.
[Close]: Closing the dialog box and finish the process.
Stop of the sequence
When “Stop” is selected in the sequence, processing is paused and it starts again when [Start] button is clicked.
Restarting step number is shown in the “Start Step” box. When finishing the process until the end of sequence, “Start
Step” will return to “1”.
The sequence can be started from any step by writing the step number to the “Start Step” box.
Write “1” to the “Start Step” box and click [Start] button, when restarting the process from the beginning.
<KM101901>
2011/01
-21-
[AKD4629-A]
4. [Sequence(File)]: Sequence Setting File Dialog Box
Click [Sequence(File)] button to open sequence setting file dialog box.
Those files saved in the “Sequence setting dialog” can be applied in this dialog.
[Open (left)]: Opening a sequence setting file (*.aks).
[Start]: Executing the sequence setting.
[Start All]: Executing all sequence settings.
Sequences are executed in descending order.
[Help]: Pop up the help window.
[Save]: Saving sequence setting file assignment. The file name is “*.mas”.
[Open(right)]: Opening a saved sequence setting file assignment “*. mas”.
[Close]: Closing the dialog box and finish the process.
*Operating Suggestions
(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mas” should be
stored in the same folder.
(2) When “Stop” is selected in the sequence the process will be paused and a pop-up message will appear. Click “OK”
to continue the process.
<KM101901>
2011/01
-22-
[AKD4629-A]
MEASUREMENT RESULTS
1) ADC part
[Measurement condition]
• Measurement unit : Audio Precision, System two, Cascade
• MCLK
: 512fs at 48kHz, 256fs at 96kHz
• BICK
: 64fs
• fs
: 48kHz, 96kHz
• BW
: 20Hz∼20kHz at fs=48kHz, 20Hz∼40kHz at 96kHz
• Bit
: 24bit
• Power Supply
: AVDD=DVDD= TVDD=5V
• Interface
: DIT (AK4118)
• Temperature
: Room
a)
Single-ended Inputs
fs=48kHz
Parameter
S/(N+D)
DR
S/N
fs=96kHz
Parameter
S/(N+D)
DR
S/N
Input signal
1kHz,
-0.5dBFS
1kHz,
-60dBFS
Measurement filter
LIN1
RIN1
Units
20kHz LPF
95.7
96.3
dB
20kHz LPF+A-weighted
102.7
102.6
dB
No signal
20kHz LPF+A-weighted
103.0
103.0
dB
Input signal
1kHz,
-0.5dBFS
1kHz,
-60dBFS
Measurement filter
LIN1
RIN1
Units
40kHz LPF
91.6
92.3
dB
40kHz LPF+A-weighted
105.0
105.0
dB
40kHz LPF+A-weighted
105.2
105.2
dB
Measurement filter
LIN1
RIN1
Units
20kHz LPF
96.9
96.7
dB
20kHz LPF+A-weighted
103.2
103.1
dB
No signal
20kHz LPF+A-weighted
103.5
103.5
dB
Input signal
1kHz,
-0.5dBFS
1kHz,
-60dBFS
Measurement filter
LIN1
RIN1
Units
40kHz LPF
93.5
94.5
dB
40kHz LPF+A-weighted
105.9
105.7
dB
40kHz LPF+A-weighted
106.2
106.2
dB
No signal
b) Differential Inputs
fs=48kHz
Parameter
S/(N+D)
DR
S/N
fs=96kHz
Parameter
S/(N+D)
DR
S/N
Input signal
1kHz,
-0.5dBFS
1kHz,
-60dBFS
No signal
<KM101901>
2011/01
-23-
[AKD4629-A]
2) DAC part
[Measurement condition]
• Measurement unit : Audio Precision, System two, Cascade
• MCLK
: 512fs at 48kHz, 256fs at 96kHz, 128fs at 192kHz
• BICK
: 64fs
• fs
: 48kHz, 96kHz, 192kHz
• BW
: 20Hz∼20kHz at fs=48kHz, 20Hz∼40kHz at 96kHz, 20Hz~40kHz at 192kHz
• Bit
: 24bit
• Power Supply
: AVDD=DVDD= TVDD=5V
• Interface
: DIR (AK4118)
• Temperature
: Room
fs=48kHz
Parameter
S/(N+D)
DR
S/N
fs=96kHz
Parameter
S/(N+D)
DR
S/N
fs=192kHz
Parameter
S/(N+D)
DR
S/N
Input signal
1kHz,
0dBFS
1kHz,
-60dBFS
No signal
Input signal
1kHz,
0dBFS
1kHz,
-60dBFS
No signal
Input signal
1kHz,
0dBFS
1kHz,
-60dBFS
No signal
Measurement filter
LOUT1
ROUT1
Units
20kHz Brick-wall LPF
100.5
97.0
dB
20kHz Brick-wall LPF
A-weighted
105.5
105.5
dB
20kHz Brick-wall LPF
A-weighted
105.5
105.6
dB
Measurement filter
LOUT1
ROUT1
Units
40kHz Brick-wall LPF
98.6
95.9
dB
40kHz Brick-wall LPF
A-weighted
105.3
105.4
dB
40kHz Brick-wall LPF
A-weighted
105.3
105.4
dB
Measurement filter
LOUT1
ROUT1
Units
40kHz Brick-wall LPF
97.6
95.8
dB
40kHz Brick-wall LPF
A-weighted
105.3
105.4
dB
40kHz Brick-wall LPF
A-weighted
105.4
105.5
dB
<KM101901>
2011/01
-24-
[AKD4629-A]
1.1.1 ADC (fs=48kHz, Single-ended Inputs)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Hz
FFT (Input=-0.5dBr, fin=1kHz)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
Hz
FFT (Input=-60dBr, fin=1kHz)
<KM101901>
2011/01
-25-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT (noise floor)
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
THD + N vs. Input Level (fin=1kHz)
<KM101901>
2011/01
-26-
[AKD4629-A]
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
THD + N vs. Input Frequency (Input=-0.5dBr)
+0
-10
T
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
Linearity (fin=1kHz)
<KM101901>
2011/01
-27-
[AKD4629-A]
+1
+0.75
+0.5
+0.25
+0
d
B
F
S
-0.25
-0.5
-0.75
-1
-1.25
-1.5
-1.75
-2
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Frequency Response (Input Level=-0.5dBr)
-80
T
-85
-90
-95
-100
-105
d
B
-110
-115
-120
-125
-130
-135
-140
20
50
100
200
500
1k
2k
Hz
Crosstalk (Input Level=-0.5dBr)
<KM101901>
2011/01
-28-
[AKD4629-A]
1.1.2 ADC (fs=96kHz, Single-ended Inputs)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k 40k
5k
10k
20k 40k
Hz
FFT (Input=-0.5dBr, fin=1kHz)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
Hz
FFT (Input=-60dBr, fin=1kHz)
<KM101901>
2011/01
-29-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
FFT (Noise floor)
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
THD + N vs. Input Level (fin=1kHz)
<KM101901>
2011/01
-30-
[AKD4629-A]
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
THD + N vs. Input Frequency (Input Level=-0.5dBr)
+0
-10
T
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
Linearity (fin=1kHz)
<KM101901>
2011/01
-31-
[AKD4629-A]
+1
+0.5
+0
d
B
F
S
-0.5
-1
-1.5
-2
20
50
100
200
500
1k
2k
5k
10k
20k 40k
5k
10k
20k 40k
Hz
Frequency Response (Input Level=-0.5dBr)
-80
-90
-100
-110
d
B
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Crosstalk
<KM101901>
2011/01
-32-
[AKD4629-A]
1.2.1 ADC (fs=48kHz, Differential Inputs)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT (Input=-0.5dBr, fin=1kHz)
+0
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT
(Input=-60dBr, fin=1kHz)
<KM101901>
2011/01
-33-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT (noise floor)
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
THD + N vs. Input Level (fin=1kHz)
<KM101901>
2011/01
-34-
[AKD4629-A]
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
THD + N vs. Input Frequency (Input=-0.5dBr)
+0
-10
TT T T
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
Linearity (fin=1kHz)
<KM101901>
2011/01
-35-
[AKD4629-A]
+1
+0.75
+0.5
+0.25
+0
d
B
F
S
-0.25
-0.5
-0.75
-1
-1.25
-1.5
-1.75
-2
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Frequency Response (Input Level=-0.5dBr)
-80
-90
-100
-110
d
B
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Crosstalk (Input Level=-0.5dBr)
<KM101901>
2011/01
-36-
[AKD4629-A]
1.2.2 ADC (fs=96kHz, Differential Inputs)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k 40k
5k
10k
20k 40k
Hz
FFT (Input=-0.5dBr, fin=1kHz)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
Hz
FFT (Input=-60dBr, fin=1kHz)
<KM101901>
2011/01
-37-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
FFT (Noise floor)
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
THD + N vs. Input Level (fin=1kHz)
<KM101901>
2011/01
-38-
[AKD4629-A]
-60
-65
-70
-75
-80
-85
d
B
F
S
-90
-95
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
THD + N vs. Input Frequency (Input Level=-0.5dBr)
+0
-10
TT T T
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBr
Linearity (fin=1kHz)
<KM101901>
2011/01
-39-
[AKD4629-A]
+1
+0.75
+0.5
+0.25
+0
d
B
F
S
-0.25
-0.5
-0.75
-1
-1.25
-1.5
-1.75
-2
20
50
100
200
500
1k
2k
5k
10k
20k 40k
5k
10k
20k 40k
Hz
Frequency Response (Input Level=-0.5dBr)
-80
-90
-100
-110
d
B
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Crosstalk (Input Level=-0.5dBr)
<KM101901>
2011/01
-40-
[AKD4629-A]
2.1 DAC (fs=48kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Hz
FFT (Input=0dBFS, fin=1kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
Hz
FFT (Input=-60dBFS, fin=1kHz)
<KM101901>
2011/01
-41-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT (Noise floor)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
FFT (Out-of-band noise)
<KM101901>
2011/01
-42-
[AKD4629-A]
-60
-65
-70
-75
-80
d
B
r
-85
A
-95
-90
-100
-105
-110
-115
-120
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBFS
THD + N vs. Input Level (fin=1kHz)
-60
T
T
T
T
-65
-70
-75
-80
d
B
r
-85
A
-95
-90
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
THD + N vs. Input Frequency (Input=0dBFS)
<KM101901>
2011/01
-43-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBFS
Linearity (fin=1kHz)
+1
+0.8
+0.6
+0.4
d
B
r
+0.2
A
-0.2
+0
-0.4
-0.6
-0.8
-1
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Frequency Response (Including external RC filter)
<KM101901>
2011/01
-44-
[AKD4629-A]
-60
-70
-80
-90
d
B
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Crosstalk
<KM101901>
2011/01
-45-
[AKD4629-A]
2.2 DAC (fs=96kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k 40k
5k
10k
20k 40k
Hz
FFT (Input=0dBFS, fin=1kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
Hz
FFT (Input=-60dBFS,fin=1kHz)
<KM101901>
2011/01
-46-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
FFT (Noise floor)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
FFT (Out-of-band noise)
<KM101901>
2011/01
-47-
[AKD4629-A]
-60
-65
-70
-75
-80
d
B
r
-85
A
-95
-90
-100
-105
-110
-115
-120
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBFS
THD + N vs. Input Level (fin=1kHz)
-60
-65
-70
-75
-80
d
B
r
-85
A
-95
-90
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
THD + N vs. Input Frequency (Input=0dBFS)
<KM101901>
2011/01
-48-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBFS
Linearity (fin=1kHz)
+2
+1.5
+1
d
B
r
+0.5
A
+0
-0.5
-1
-1.5
-2
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
Frequency Response (Including external RC filter)
<KM101901>
2011/01
-49-
[AKD4629-A]
-60
-70
-80
-90
d
B
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k 40k
Hz
Crosstalk (Input=0dBFS)
<KM101901>
2011/01
-50-
[AKD4629-A]
2.3 DAC (fs=192kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
80k
5k
10k
20k
80k
Hz
FFT (Input=0dBFS, fin=1kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
Hz
FFT (Input=-60dBFS,fin=1kHz)
<KM101901>
2011/01
-51-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
80k
Hz
FFT (Noise floor)
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
FFT (Out-of-band noise)
<KM101901>
2011/01
-52-
[AKD4629-A]
-60
-65
-70
-75
-80
d
B
r
-85
A
-95
-90
-100
-105
-110
-115
-120
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBFS
THD + N vs. Input Level (fin=1kHz)
-60
-65
-70
-75
-80
d
B
r
-85
A
-95
-90
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k
80k
Hz
THD + N vs. Input Frequency (Input=0dBFS)
<KM101901>
2011/01
-53-
[AKD4629-A]
+0
-10
-20
-30
-40
-50
d
B
r
-60
-70
-80
A
-90
-100
-110
-120
-130
-140
-140 -130 -120 -110 -100
-90
-80
-70
-60
-50
-40
-30
-20
-10 +0
dBFS
Linearity (fin=1kHz)
+3
+2.5
+2
+1.5
+1
d
B
r
+0.5
A
-0.5
+0
-1
-1.5
-2
-2.5
-3
20
50
100
200
500
1k
2k
5k
10k
20k
80k
Hz
Frequency Response (Including external RC filter)
<KM101901>
2011/01
-54-
[AKD4629-A]
-60
-70
-80
-90
d
B
-100
-110
-120
-130
-140
20
50
100
200
500
1k
2k
5k
10k
20k
80k
Hz
Crosstalk (Input=0dBFS)
<KM101901>
2011/01
-55-
[AKD4629-A]
Revision History
Date
Manual
Board
(YY/MM/DD) Revision Revision
2010/08/09
KM101900
0
2010/01/26
KM101901
1
Reason
First Edition
Device Rev.
Changed
Contents
AKD4629 Rev.A → Rev.B
Measurement results were updated.
Contorl Soft P11, P15: Control soft’s plots were updated;
Rev. updated P11: The explanation about AKDUSBIF-B interface board
was added.
P16, P17: Explanations of the “Tool” tab were added.
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei
Microdevices Corporation (AKM) or authorized distributors as to current status of the products.
z Descriptions of external circuits, application circuits, software and other related information contained in this
document are provided only to illustrate the operation and application examples of the semiconductor products. You
are fully responsible for the incorporation of these external circuits, application circuits, software and other related
information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third
parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent,
intellectual property, or other rights in the application or use of such information contained herein.
z Any export of these products, or devices or systems containing them, may require an export license or other official
approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange,
or strategic materials.
z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or
other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use
approved with the express written consent by Representative Director of AKM. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and
which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places
the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer
or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all
claims arising from the use of said product in the absence of such notification.
<KM101901>
2011/01
-56-
1
RIN2-
RIN2+/RIN2
LIN2-
RIN1-
SGL
LIN1-
SMUTE DZFE
2
LIN2+/LIN2
3
RIN1+/RIN1
4
LIN1+/LIN1
5
37
38
39
TP4
TP3
RIN2-
LIN2-
TP5
RIN2+
LIN2+
SGL
TP7
RIN1-
DZFE
TP9
RIN1+
SMUTE
TP10
40
LIN1-
TP8
TP11
41
42
D
LIN1+
D
43
44
45
46
47
48
CN4
48pin_4
TP6
TP2 TP1
R2 100
37
2.2u
C9
C10
RIN2-
DIF0/CSN
ROUT3
26
PDN
LOUT3
25
31
TP40
ROUT1
ROUT1
30
TP39
LOUT1
29
LOUT1
TP38
TP37
24
23
0.1u
TP36
R12
R11
TP29
28
ROUT2
B
ROUT2
27
LOUT2
LOUT2
26
ROUT3
ROUT3
25
LOUT3
LOUT3
48pin_3
TP32
TP33
TP34
I2C
LOUT4
ROUT4
SDTI4
TP31
DFS0
TP30
SDTI2
SDTI3
P28
LRCK
SDTI1
MCLK
BICK
TP24
TP26
48pin_1
C7
32
2.2u
TP35
TP27
TP23
C8
100 100 100 100
100 100
R6
100
R10
R7 R8
I2C
100 12
22
R5
C6
10u
ROUT4
11
LOUT4
100
LOUT2
27
R4
DIF1/SCL/CCLK
NC
ROUT2
10
AVDD1
33
+
C11
2.2u
40
38
RIN2+/RIN2
LIN2-
LIN2+/LIN2
RIN1-
39
2.2u
C12
2.2u
C13
C14
2.2u
41
2.2u
C15
2.2u
42
43
LIN1-
LIN1+/LIN1
TST1
44
45
TDM0/SDA/CDTI
28
100
TP25
PDN
46
9
R3
TP22
DIF0/CSN
DZFE
29
R9
11
SGL
48
LOUT1
TP21
DIF1/SCL/CCLK
PDN
ROUT1
DVSS
21
10
12
DVDD
TP20
TDM0/SDA/CDTI
35
31
DFS0
9
TP19
DZF1
30
MCLK
DVSS
8
DZF2
VCOM
13
8
B
7
AK4629
20
DVDD
TVDD
SDTI4
TP18
SDTO2
6
SDTI3
DVDD
VREFH
32
0.1u
19
7
0.1u
C3
C5
18
10u
33
SDTI2
C4
34
AVDD
SDTI1
+
AVSS
SDTO1
17
TP17
PS
4
16
TVDD
3
LRCK
6
RIN1+/RIN1
2.2u
0.1u
34
36
TP42
AVDD
CAD1
BICK
10u
47
SMUTE
+
5
TVDD
C
TP43
AVSS
CAD0
5
DZF1
35
2
15
SDTO2 TP16
C1
TP44
DZF1
1
14
C2
R13 100
SDTO1 TP15
4
SDTO2
R14 100
3
DZF2
36
+
TP14
+
SDTO1
PS
+
2
CAD1
+
TP13
CAD1
PS
U1
+
CAD0
1
+
CAD0
C
+
TP12
+
CN1
+
C16
CN3
TP45
DZF2
24
23
22
21
20
19
18
17
16
15
CN2
14
A
13
A
48pin_2
Title
AKD4629-A-MAIN
-57MCLK
5
4
BICK
LRCK SDTI1
SDTI2 SDTI3 SDTI4 DFS0
3
Size
A3
I2C
LOUT4 ROUT4
Date:
2
Document Number
Rev
AK4629
Thursday, July 01, 2010
Sheet
1
0
1
of
6
5
D
4
1
C20
0.1u
2
L1 (short)
2
+3.3V
C21
+
10u
R20
OPT
470
J1
BNC_RX
1
+3.3V
+
PORT1
VCC 3
GND 2
OUT 1
TORX141
3
C18
0.1u
JP11
RX3
BNC
C22
D
C19
10u
R25
10k
C17
0.47u
+
0.1u
48
47
46
45
44
43
42
41
40
39
38
37
R21
75
1
2
3
4
5
6
7
8
9
10
11
12
+3.3V
C23
5p
2
DIF0
XTI
DIF1
X1
C24
DIF2
1
XTO
24.576MHz
DIF2-0="100"; MSB justified; Master Mode
PORT2
IN 3
VCC 2
GND 1
B
INT0
OCKS0/CSN/CAD0
OCKS1/CCLK/SCL
CM1/CDTI/SDA
U2CM0/CDTO/CAD1
PDN
AK4118
XTI
XTO
DAUX
MCKO2
BICK
SDTO
36
35
34
33
32
31
30
29
28
27
26
25
C
XTI
XTO
OCKS0
OCKS1
CM1
CM0
PDN
JP14
DAUX
SDTO_SEL
JP15
4114_SDTO
JP16
+3.3V
Jp12 OPT
T3
DA02
1:1
R22
150
C27
0.1u
B
LRCK_SEL
C28
0.1u
C29
10u
+3.3V
BNC
TX
4114_LRCK
4114_MCKO1
R24
TX
R23
C26 +
10u
4114_BICK
BICK_SEL
JP17
13
14
15
16
17
18
19
20
21
22
23
24
C25
0.1u
4114_MCKO2
MCLK_SEL
+3.3V
TOTX141
J2
BNC_TX
IPS0/RX4
NC
DIF0/RX5
TEST2
DIF1/RX6
VSS1
DIF2/RX7
IPS1/IIC
P/SN
XTL0
XTL1
VIN/GP0
+
5p
RX3
VSS4
RX2
TEST1
RX1
NC
RX0
VSS3
VCOM
R
AVDD
INT1
C
INT0
TVDD
GP1
TX0/GP2
TX1/GP3
BOUT/GP4
COUT/GP5
UOUT/GP6
VOUT/GP7
DVDD
VSS2
MCKO1
LRCK
RX
5.1
240
A
A
Title
-58-
Size
A4
Date:
5
4
3
2
AKD4629-A-Main
Document Number
Rev
0
AK4114
Monday, December 21, 2009 Sheet
1
1
of
6
5
4
3
2
1
J3
LINA2
2
2
RCA
JP35 canon
RIN2+/RIN2
1
LIN2+
3
3
2
2
RIN2+
JP32
LIN2-
LIN2-
canon
GND
JP36 canon
J7 LINB2
2
3
1
RIN2-
RIN2-
2
3
1
GND
MR-552LS
J6
RINA1
2
3
JP37 canon
RIN1+/RIN1
2
RCA
1
RCA
2
RIN1+
1
LIN1+
3
JP38 canon
JP34 canon
LIN1-
LIN1-
2
3
1
GND
3
3
C
1
LIN1+/LIN1
2
1
JP33 canon
J8 RINB2
MR-552LS
J5
LINA1
C
D
1
1
RCA
D
3
3
1
JP31 canon
LIN2+/LIN2
J4
RINA2
J9 LINB1
RIN1-
RIN1-
2
3
1
GND
J10 RINB1
MR-552LS
MR-552LS
B
B
A
A
Title
<Title>
-59-
Size
A4
Date:
5
4
3
AKD4629-A-MAIN
Document Number
2
<Doc>
Rev
0
Analog Input
Tuesday, December 01, 2009Sheet
3
1
of
6
2
+12V
8
J11
ROUT1
5 +
ROUT2
R45
10k
R115
(open)
-12V
4
6 -
C101
(short)
6 -
U5B
R48 C102
OP275GPZ 220 (short)
7
330p C42
J12
ROUT2
5 +
ROUT3
R49
10k
R116
(open)
-12V
+12V
C45
22u
6 -
R47
4.7k
R50
4.7K
+12V
R89
10k
+12V
LOUT2
3 +
R93
10k
C48
330p
-12V
3 +
R97
10k
2 -
R94
4.7K
C
U6A
R113 C106
OP275GPZ 220
(short)
1
J16
LOUT3
R120
(open)
-12V
330p C50
R91
4.7k
R90
4.7K
+12V
C51
22u
J15
LOUT2
LOUT3
R119
(open)
4
2 -
U5A
R96 C105
OP275GPZ 220 (short)
1
8
C49
22u
R118
(open)
-12V
4
2 -
R87
4.7k
4
LOUT1
J14
LOUT1
8
3 +
U4A
R92 C104
OP275GPZ 220 (short)
1
+
+
8
C47
22u
C
R46
4.7K
D
330p C46
+
R43
4.7k
J13
ROUT3
R117
(open)
-12V
330p C44
R42
4.7K
U6B
R88 C103
OP275GPZ 220 (short)
7
4
R41
10k
U4B
R44
OP275GPZ 220
7
4
5 +
ROUT1
1
+12V
C43
22u
+
+
8
C41
22u
D
3
8
4
+
5
330p C52
R95
4.7k
R98
4.7K
R99
4.7k
B
B
+12V
6 -
-12V
8
3 +
LOUT4
R121
(open)
4
R17
10k
+12V
C55
22u
J17
ROUT4
R19
10k
2 -
-12V
330p C54
A
R15
4.7K
U7A
R18 C108
OP275GPZ 220 (short)
1
4
5 +
ROUT4
U7B
R114 C107
OP275GPZ 220 (short)
7
+
+
8
C53
22u
J18
LOUT4
R122
(open)
330p C56
R16
4.7k
R31
4.7K
R29
4.7k
A
Title
<Title>
-60-
Size
A4
Date:
5
4
3
2
AKD4629-A-MAIN
Document Number
<Doc>
Rev
0
Analog Output
Monday, December 21, 2009 Sheet
4
1
of
6
5
L5V
D
10
8
6
4
2
PORT3
9
7
5
3
1
4
R51
10k
R52
10k
R53
10k
R54
R55
R56
CSN
SCL/CCLK
SDA/CDTI
SDA(ACK)/CDTO
R139 51
3
100
100
100
U3
A1
A2
A3
A4
A5
A6
A7
A8
2
3
4
5
6
7
8
9
1
19
SDA(ACK)/CDTO
R33
51
R57
18
17
16
15
14
13
12
11
SDTI1
SDTI2
SDTI3
SDTI4
JP61
DIF0/CSN
DIF0
R58
R140
L5V
10k
R34
51
U10A
2
74LS07
4
U10B
3
74LS07
TVDD
SEL1
100
1
1
CSN
100
DIF0
G1
G2
74HCT541
R32
51
CTRL
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
2
SCL/CCLK
R59
100
TDM0
SGL
I2C
DFS0
DZFE
PS
CAD1
CAD0
SDA/CDTI
R141
L5V
1
2
3
4
5
6
7
8
10k
SDA(ACK)/CDTO
SW2
16
15
14
13
12
11
10
9
D
MODE1
RP1
1
2
3
4
5
6
7
8
9
R35
51
TDM0
SGL
I2C
DFS0
DZFE
PS
CAD1
CAD0
47k
5
9
C
11
13
U10C
6
74LS07
U10D
8
74LS07
U10E
10
74LS07
U10F
12
74LS07
R61 100
4114_MCKO1
MCKO1
BICK
LRCK
SDTO
SDTI4
R62 100
4114_BICK
R63 100
4114_LRCK
1
3
5
7
9
R64 100
PORT4
10 MCKO2
8 GND
6 SDTI1
4 SDTI2
2 SDTI3
R66 100
4114_MCKO2
C
AK4114 Mode_setting
SW3
1
14
2
13
3
12
4
11
5
10
6
9
7
8
AC3
JP65
SDTI4
JP66
SDTI1
JP67
SDTI2
JP68
SDTI3
R65 100
4114_SDTO
RP2
1
2
3
4
5
6
7
MCLK
4114_MCKO1
R39
R38
R37
4114_BICK
100
100
100
4114_LRCK
B
SDTO1
SDTO2
U9
A1
A2
A3
A4
A5
A6
A7
A8
2
3
4
5
6
7
8
9
JP13
1
19
DIF2
DIF1
DIF0
OCKS1
OCKS0
CM1
CM0
+3.3V
DIF2
DIF1
DIF0
OCKS1
OCKS0
CM1
CM0
BICK
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
13
12
11
47K
LRCK
R36
100
DAUX
B
G1
G2
74HCT541
SDTO-SEL
TVDD
D1
1S1588
R67
10k
13
H
SDA/CDTI
SDA/CDTI
JP62
TDM0/SDA/CDTI
TDM0
SEL3
TDM0
SMUTE
SCL/CCLK
JP63
SCL/CCLK
DIF1/SCL/CCLK
DIF2
DIF1
SEL2
R60
SW1
PDN
L
U8F
12
11
74HCT14
U8E
10
PDN
74HCT14
C61
0.1u
TVDD
100k
JP64
SMUTE
A
A
Title
<Title>
Size
-61-
A3
Date:
5
4
3
2
AKD4629-A-MAIN
Document Number
<Doc>
Rev
0
Digital I/F
Wednesday, August 04, 2010 Sheet
1
5
of
6
5
4
3
2
C73
+
0.1u
L2
1
L5V
(Short)
C74
47u
-12V
for OP275GPZ x4
D
2
1
AVDD2
-12V
(short)
C84
47u
+
L3
1
+
2
L10
+
D
C72
0.1u
2
3
OUT
+
+
C71
47u
IN
1
+
1
+12V
GND
T1
NJM78M05FA
2
(Short)
C86
0.1u
L4
REG
JP82
JACK
AVDD
(short)
JP81
C91
10u
C92
0.1u
C93
10u
+12V
+
+
+
TVDD1
T-45(O)
+
R81
1k
DVDD1
T-45(O)
1
1
1
REG
JP83
(short)
JACK
DVDD
TVDD
C96
0.1u
C97
10u
C98
0.1u
C99
10u
C69
0.1u
C68
10u
C
L6
AVDD
C95
10u
LE1
2
AVDD1
T-45(O)
C94
0.1u
(short)
R85
DZF1
DVDD
DVDD
3
5.1
1
12V2
T-45(R)
1
C90
0.1u
1
+ (short)
L5
C
1
C89
10u
DGND
C75
+
47u
-12V
C88
0.1u
for OP275GPZ x4
L11
2
C85
47u
GND
+12V
+12V
AVDD1
AVDD
AGND
12V1
T-45(R)
R86
(Short)
C87
10u
AVDD2
TR1
RN1202
(10k,10k)
DZF1
DVDD
AGND1
T-45(B)
DGND1
T-45(B)
1
1
L7
C76
+
47u
(short)
L8
AGND
REG
JP84
JACK
TVDD
(short)
DGND
TVDD
B
R83
TVDD
(Short)
B
R82
1k
(short)
C78
0.1u
IN
GND
C77
47u
OUT
2
3
+
+3.3V
C79
0.1u
+
C80
47u
(Short)
AVDD2
TR2
RN1202
(10k,10k)
DZF2
for 74HCT14,
74HCT541x2, 74LS07
R84
1
3
1
DZF2
T2 LP2950A
L5V
LE2
2
L9
C81
+
47u
L5V
C82
0.1u
C83
0.1u
C109
0.1u
C110
0.1u
A
A
Title
<Title>
-62-
Size
A3
Date:
5
4
3
2
AKD4629-A-MAIN
Document Number
<Doc>
Rev
0
Power Supply
Thursday, July 01, 2010
Sheet
1
6
of
6
-63-
-64-
-65-
-66-
-67-
-68-