ASAHI KASEI [AKD4709-A] AKD4709-A AK4709 Evaluation Board Rev.2 GENERAL DESCRIPTION AKD4709 is an evaluation board for quickly evaluating the AK4709, AV SCART switch. Evaluation requires audio/video analog analyzers/generators and a power supply. Ordering guide AKD4709-A --- AK4709 Evaluation Board (Cable for connecting with printer port of IBM-AT, compatible PC and control software are packed with this.) FUNCTION • RCA connectors for analog audio input/output • XLR connectors for analog audio input • RCA connectors for analog video input/output • 10pin header for serial control interface VP +12V → +3.3V Regulator VD1 VD2 VVD AGND VSS2 TVINL TVINR VCRINL VCRINR AINL+ AINL (AINL+-) AINR+ AINR (AINR+-) VCRFB ENCB ENCC ENCG ENCV ENCY ENCRC TVOUTL TVOUTR VCROUTL VCROUTR VVD1 VVD2 TVFB TVSB VCRSB AK4709 TVVOUT TVB TVG TVRC VCRVOUT VCRC TVVIN VCRVIN VCRB VCRG Buffer 10pin header VCRRC Figure 1. AKD4709 Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual. <KM103002> 2011/06 -1- ASAHI KASEI [AKD4709-A] EVALUATION BOARD MANUAL Operation sequence 1) Set up the power supply lines. Name of Jack VP Color of Jack Orange Voltage Used for Comment and attention +10.8∼+13.2V VP of AK4709 VD1 Red +3.13∼+3.47 VD1 of AK4709 VD2 Red +3.13∼+3.47V VD2 of AK4709 VVD Red +3.13∼+3.47V VVD1 of AK4709 VVD2 of AK4709 VCC Red +3.13 ∼ VVD1+0.3V Power supply of logic AGND VSS2 Black Black 0V 0V Analog Ground Analog Ground DGND Black 0V Digital Ground Should be always connected Should be connected when jp5 (VD1_SEL) is set to REG side. Should be open when JP5 (VD1_SEL) is set to VD1 side. Should be connected when R 56(VD2_SEL) is set to REG side. Should be open when R56 (VD2_SEL) is set to VD2 side. Should be connected when JP8 (VVD_SEL) is set to REG side. Should be open when JP8 (VVD_SEL) is set to VVD side. Should be connected when JP7 (VCC_SEL) is set to REG side. Should be open when JP7 (VCC_SEL) is set to VCC side. Should be always connected Should be always connected Should be connected when JP4 (GND_SEL) is set to AGND side. Should be open when JP4 (GND_SEL) is set to DGND side. Default of Jack +12V open open open open 0V 0V open Table 1. Power supply lines Each supply line should be distributed from the power supply unit. 2) Set-up jumper pins. (See the followings.) 3) Power on. The AK4709 should be reset once bringing SW1 “L” upon power-up. Jumper pins set up [JP1] (GND): AINL- pin input select OPEN: J20 (AINL): 3pin <Default> SHORT: GND (Not use) [JP2] (GND): AINR- pin input select OPEN: J29 (AINR): 3pin <Default> SHORT: GND (Not use) [JP3] (VCRRC): VCRRC pin input select I: J30 (VCRRC) <Default> I/O: J23 (VCRCOUT) [JP4] (GND): Analog ground and Digital ground OPEN: Separated SHORT: Common. (The connector “DGND” can be open.) <Default> [JP5] (VD1): Regulator +3.3V or VD1 connector <KM103002> 2011/06 -2- ASAHI KASEI [AKD4709-A] OPEN: VD1 pin is supplied from VD1 connector. SHORT: VD1 pin is supplied to regulator +3.3V. (The connector “VD1” can be open.) <Default> [JP7] (VCC): VVD connector or VCC connector OPEN: Logic voltage is supplied from VCC connector. SHORT: Logic voltage is supplied form VVD connector. (The connector “VCC” can be open.) <Default> [JP8] (VVD): VD1 connector or VVD connector OPEN: VVD1 and VVD2 pins are supplied from VVD connector. SHORT: VVD1 and VVD2 pins are supplied from VD connector. (The connector “VVD” can be open.) <Default> The regulator can be supplied 3.3V to all circuits by shorting JP5, JP7 and JP8 and supplying 12V to VP connector. The function of the toggle SW [SW1] (PDN): Resets the AK4709. Keep “H” during normal operation. The indication content for INT pin Changes of the 08H status can be monitored via the TEST1 (INT). The INT pin is the open drain output and goes “L” for 2μs (typ.) when the status of 08H is changed. Serial Control The AK4709 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT1 (CTRL) with PC by 10-line flat cable packed with the AKD4709-A. The control software packed with this evaluation board supports I2C control only. Connect PC 10 wire flat cable 10pin Connector SCL SDA ACK AKD4709-A AKD4708-A 10pin Header Figure 2. Connect of 10-line flat cable <KM103002> 2011/06 -3- ASAHI KASEI [AKD4709-A] Analog Input/Output List Input Audio Output Input Video Output Slow Blanking Fast Blanking Input Output Input Output Signal Name J3 (VCRINL), J7 (VCRINR), J11 (TVINL), J15 (TVINR) J19 (AINL+), J27 (AINR+) J20 (AINL+, AINL-), J27 (AINR+, AINR-), J4 (TVOUTL), J8 (TVOUTR), J12 (VCROUTL), J12 (VCROUTR) J1 (ENCV), J5 (ENCY), J9 (ENCRC), J13 (ENCC), J17 (ENCG) J22 (ENCB), J25 (TVVIN), J28 (VCRVIN), J30 (VCRRC) J31 (VCRG), J33 (VCRB) J2 (TVVOUT), J6 (TVRC), J10 (TVG), J14 (TVB) J18 (VCRVOUT), J23 (VCRCOUT) J26 (VCRSB) J24 (TVSB), J26 (VCRSB) J32 (VCRFB) J21 (TVFB) Table 1. Analog Input/Output List <KM103002> Note Max. 2Vrms Max. 2Vrms Max. 2.15Vrms Max. 1.25Vpp Max. 2.5Vpp Max. VP+0.3V Max. VP Max. VVD1+0.3V Max. VVD2 2011/06 -4- ASAHI KASEI [AKD4709-A] Control Soft Manual ■ Evaluation Board and Control Soft Settings 1. Set an evaluation board properly. 2. Connect the evaluation board to an IBM PC/AT compatible PC by a 10wire flat cable. Be aware of the direction of the 10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing the driver. When running this control soft on the windows 95/98/ME, driver installing is not necessary. This control soft does not support the Windows NT. 3. Proceed evaluation by following the process below. ■ Operation Screen 1. Start up the control program following the process above. The operation screen is shown below. <KM103002> 2011/06 -5- ASAHI KASEI [AKD4709-A] ■ Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs. Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting. 1. [Port Reset]: For when connecting to USB I/F board (AKDUSBIF-A) Click this button after the control soft starts up when connecting USB I/F board (AKDUSBIF-A). 2. [Write Default]: Register Initializing When the device is reset by a hardware reset, use this button to initialize the registers. 3. [All Write]: Executing write commands for all registers displayed. 4. [All Read]: Executing read commands for all registers displayed. 5. [Save]: Saving current register settings to a file. 6. [Load]: Executing data write from a saved file. 7. [All Reg Write]: [All Reg Write] dialog box is popped up. 8. [Data R/W]: [Data R/W] dialog box is popped up. 9. [Read]: Reading current register settings and display on to the Register area (on the right of the main window). This is different from [All Read] button, it does not reflect to a register map, only displaying hexadecimal. <KM103002> 2011/06 -6- ASAHI KASEI [AKD4709-A] ■ Tab Functions [REG 0H～DH]: Register Map This tab is for a register writing and reading. Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red). Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray) Grayout registers are [Read Only] registers. They can not be controlled. The registers which is not defined in the datasheet are indicated as “---”. <KM103002> 2011/06 -7- ASAHI KASEI [AKD4709-A] [Write]: Data Writing Dialog It is for when changing two or more bits on the same address at the same time. Click [Write] button located on the right of the each corresponded address for a pop-up dialog box. When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”. Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting. [Read]: Data Read Click [Read] button located on the right of the each corresponded address to execute register reading. After register reading, the display will be updated regarding to the register status. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red). Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray) Please be aware that button statuses will be changed by Read command. <KM103002> 2011/06 -8- ASAHI KASEI [AKD4709-A] [Tool]: Testing Tools This tab screen is for evaluation testing tool. Click buttons for each testing tool. <KM103002> 2011/06 -9- ASAHI KASEI [AKD4709-A] ■ Dialog Boxes 1. [All Req Write]: All Req Write dialog box Click [All Reg Write] button in the main window to open register setting files. Register setting files saved by [SAVE] button can be applied. [Open (left)]: Selecting a register setting file (*.akr). [Write]: Executing register writing. [Write All]: Executing all register writings. Writings are executed in descending order. [Help]: Help window is popped up. [Save]: Saving the register setting file assignment. The file name is “*.mar”. [Open (right)]: Opening a saved register setting file assignment “*. mar”. [Close]: Closing the dialog box and finish the process. *Operating Suggestions (1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be stored in the same folder. (2) When register settings are changed by [Save] button in the main window, re-read the file to reflect new register settings. <KM103002> 2011/06 - 10 - ASAHI KASEI [AKD4709-A] 2. [Data R/W]: Data R/W Dialog Box Click the [Data R/W] button in the main window for data read/write dialog box. Data write is available to specified address. Address Box: Input data address in hexadecimal numbers for data writing. Data Box: Input data in hexadecimal numbers. Mask Box: Input mask data in hexadecimal numbers. This is “AND” processed input data. [Write]: Writing to the address specified by “Address” box. [Read]: Reading from the address specified by “Address” box. The result will be shown in the Read Data Box in hexadecimal numbers. [Close]: Closing the dialog box and finish the process. Data writing can be cancelled by this button instead of [Write] button. *The register map will be updated after executing [Write] or [Read] commands. <KM103002> 2011/06 - 11 - ASAHI KASEI [AKD4709-A] MEASUREMENT RESULTS Audio [Measurement condition] • Measurement unit : Audio Precision SYS-2722 • BW : 20Hz∼20kHz • Power Supply : VP=12V, VD1=3.3V, VD2=3.3V, VDD1=3.3V, VDD2=3.3V • Interface : Input: Cannon, Output: BNC • Temperature : Room • Volume#0 Gain : 0dB • Measurement signal line path: AINL/AINR → Volume#0 → Volume#1 → TVOUTL/TVOUTR Parameter Input signal Measurement filter 20kLPF Results Lch [dB] 95.0 Results Rch [dB] 94.9 S/(N+D) (At 2Vrms Output) DR S/N 1kHz, 0dBFS 1kHz, -60dBFS “no-input 22kLPF, A-weighted 22kLPF, A-weighted 99.0 99.0 99.2 99.2 Plots Figure 1-1. FFT (1kHz, 0dBFS input) at 2Vrms output Figure 1-2. FFT (1kHz, -60dBFS input) Figure 1-3. FFT (Noise floor) Figure 1-4. THD+N vs. Input Level (fin=1kHz) Figure 1-5. THD+N vs. fin (Input Level=0dBFS) Figure 1-6. Linearity (fin=1kHz) Figure 1-7. Frequency Response (Input Level=0dBFS) Figure 1-8. Crosstalk (Input Level=0dBFS) <KM103002> 2011/06 - 12 - ASAHI KASEI [AKD4709-A] Video [Measurement condition] • Signal Generator : Sony Tectronix TG2000 • Measurement unit : Sony Tectronix VM700T • Power Supply : VP=12V, VD1=3.3V, VD2=3.3V, VDD1=3.3V, VDD2=3.3V • Interface : Input: BNC, Output: BNC • Temperature : Room • Measurement signal line path: S/N: ENCV → TVVOUT Y/C Crosstalk: ENCV → TVVOUT, ENCRC → TVRC DG, DP: ENCV → TVVOUT Parameter S/N Input Signal 0% Flat Field Y/C Crosstalk (Measured at TVVOUT) DG 100% Red Field (YÆENCV, CÆENCRC) Modulated 5 step DP Modulated 5 step Measurement Filter BW=15kHz to 5MHz Filter=Uni-Weighted BW=15kHz to Full Results 76.2 -59.5 (Note1) Min: -0.36 Max: 0.00 Min: -0.95 Max: 0.28 Unit dB dB % deg. Plots Figure 2-1. Noise spectrum (Input=0% Flat Field, BW=15kHz to 5MHz, Filter=Uni-Weighted) Figure 2-2. Y/C Crosstalk (Measured at TVVOUT, Input= 100% Red, ENCV=Y, ENCRC=C), BW=15kHz to Full) Figure 2-3. DG, DP (Input= Modulated 5 step) (Note1) Y/C Crosstalk: Reference Measurement: Results: 1.7dB (p-p) Composite signalÆENCV, no inputÆENCRC, TVRC is terminated by 75Ohm. Y/C Crosstalk: Measurement: Results: -57.8dB (p-p) YÆENCV, CÆENCRC, TVRC is terminated by 75Ohm. Y/C Crosstalk calculation: -57.8dB (p-p) – 1.7dB (p-p) = -59.5dB (p-p) <KM103002> 2011/06 - 13 - ASAHI KASEI [AKD4709-A] Plots (Audio) AK4709 AINL/AINR Æ TVOUTL/TVOUTR: FFT: fin=1KHz, Input Level=0dB +0 -10 -20 -30 -40 -50 -60 -70 d B r -80 A -100 -90 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100 200 500 1k 2k 5k 10k 20k 10k 20k Hz Figure1-1. FFT (fin=1kHz, Input Level=0dB) AK4709 AINL/AINR Æ TVOUTL/TVOUTR: FFT: fin=1KHz, Input Level=-60dB +0 -10 -20 -30 -40 -50 -60 -70 d B r -80 A -100 -90 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100 200 500 1k 2k 5k Hz Figure-1-2. FFT (fin=1kHz Input Level=-60dB) <KM103002> 2011/06 - 14 - ASAHI KASEI [AKD4709-A] AK4709 AINL/AINR Æ TVOUTL/TVOUTR: FFT: No-input +0 -10 -20 -30 -40 -50 -60 -70 d B r -80 A -100 -90 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-3. FFT (Noise Floor) AK4709 AINL/AINR Æ TVOUTL/TVOUTR: THD+N Amplitude vs Input Amplitude: fin=1KHz -80 -82 -84 -86 -88 -90 -92 d B r -94 -96 A -98 -100 -102 -104 -106 -108 -110 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBr Figure1-4. THD+N vs. Input level (fin=1kHz) <KM103002> 2011/06 - 15 - ASAHI KASEI [AKD4709-A] AK4709 AINL/AINR Æ TVOUTL/TVOUTR: THD+N Amplitude vs Input Frequency: Input Level=0dB -80 -82 -84 -86 -88 -90 -92 d B r -94 -96 A -98 -100 -102 -104 -106 -108 -110 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-5. THD+N vs. Input Frequency (Input level=0dB) AK4709 AINL/AINR Æ TVOUTL/TVOUTR: Linearity: fin=1KHz +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBr Figure1-6.Linearity (fin=1kHz) <KM103002> 2011/06 - 16 - ASAHI KASEI [AKD4709-A] AK4709 AINL/AINR Æ TVOUTL/TVOUTR: Frequency Response: Input Level=0dBr +1 +0.8 +0.6 +0.4 +0.2 +0 -0.2 -0.4 -0.6 d B r A -0.8 -1 -1.2 -1.4 -1.6 -1.8 -2 -2.2 -2.4 -2.6 -2.8 -3 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-7. Frequency Response (Input level=0dB) AK4709 AINL/AINR Æ TVOUTL/TVOUTR: Crosstalk: fin=1KHz, Input Level=0dBr / No-input -70 TT TTT -75 -80 -85 -90 -95 -100 d B -105 -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-8. Crosstalk (Input level=0dB) <KM103002> 2011/06 - 17 - ASAHI KASEI [AKD4709-A] Plots(Video) AK4709 ENCV Æ TVVOUT: S/N: Input Signal=0% Flat Field, BW=15kHz to 5MHz, Filter=Uni-Weighted Figure 2-1. Noise spectrum (Input=0% Flat Field, BW=15kHz to 5MHz, Filter=Uni-Weighted) <KM103002> 2011/06 - 18 - ASAHI KASEI [AKD4709-A] AK4709 ENCV Æ TVVOUT / ENCRCÆTVRC: Y/C Crosstalk: Input Signal=100% Red Field, YÆENCV, CÆENCRC, BW=15kHz to Full Figure 2-2 Crosstalk (Measured at TVVOUT, Input= 100% Red Field, YÆENCV, CÆENCRC, BW=15kHz to Full) <KM103002> 2011/06 - 19 - ASAHI KASEI [AKD4709-A] AK4709 ENCV Æ TVVOUT: DG, DP: Input Signal=Modulated 5 step Figure 2-3 DG, DP (Input Signal= Modulated 5 step) <KM103002> 2011/06 - 20 - ASAHI KASEI [AKD4709-A] Revision History Date (YY/MM/DD) 10/05/24 Manual Revision KM103000 10/09/07 KM103001 11/06/21 KM103002 Board Reason Revision First Edition 0 Modification 1 2 Modification Contents Update of measurement results and Plots Update of measurement results and Plots IMPORTANT NOTICE z These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. z Descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. z Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. <KM103002> 2011/06 - 21 - A B VCC R3 470 10k R4 470 2 3 5 6 11 10 14 13 1A 1B 2A 2B 3A 3B 4A 4B PORT1 A1-10PA-2.54DSA 1 15 A/B G 4 2Y 7 3Y 9 4Y 12 VCC GND 16 8 U2A 74LS07 1 R57 0 R58 0 R59 0 D E R2 1.8K 2 VCC A C1 0.1u AINL+ INT VD2 VCRVOUT 47 CTRL TVFB 74HCT157 SCL SDA ACK 48 9 7 5 3 1 1Y 14 10k R5 7 R1 A 10 8 6 4 2 VCC VCC U4 C VCC 7 74HCT14 37 38 39 40 41 42 43 44 45 4.7u U3B 3 1 4 2 + 2 C3 74HCT14 0.1u 1 H 3 L 14 14 U3A 1 7 2 1 R6 10k D1 HSU119 48pin_4 VCC 46 CN1 VCC SW1 PDN C4 0.1u C5 C2 B 1.0u C6 2 B VCRC 2 2 3 37 AINL+ 38 CN VEE 39 40 CP 42 41 VSS2 INT VD2 43 44 SCL 45 SDA 46 PDN AINL- 36 36 AINL- VSS3 AINR+ 35 35 AINR+ 3 TVVOUT AINR- 34 34 AINR- 4 VVD2 TVOUTL 33 33 TVOUTL TVOUTR 32 32 TVOUTR VCROUTL 31 31 VCROUTL VCROUTR 30 30 VCROUTR TVINL 29 29 TVINL U3C TVVOUT 6 7 1 CN3 48pin_3 1 5 74LS07 1 VCRVOUT 48 TVFB 14 14 U2B 4 7 3 VCRC VCC VCC 47 1.0u CN2 48pin_1 74HCT14 4 C8 0.1u 2 VVD2 C7 + 4.7u U2C 6 9 74LS07 U3D TVRC 5 5 TVG 6 6 TVB 7 7 TVB VVD1 8 8 VVD1 TVRC TVG U1 AK4709 8 74HCT14 C 7 C10 0.1u VSS3 C11 0.1u ENCB 9 9 ENCB TVINR 28 ENCG 10 10 28 TVINR ENCG VCRINL 27 27 ENCRC 11 11 VCRINL VCRINR 26 ENCRC 26 VCRINR ENCC 12 12 ENCC VD1 25 VD1 25 1 2 VSS1 C12 0.1u + C13 4.7u 24 TVSB VCRSB 23 22 21 VP VCRB 20 VCRRC VCRG 19 18 VCRFB 17 VCRVIN 16 13 12 TVVIN C14 0.1u 15 74HCT14 ENCY 12 ENCV 74LS07 13 74HCT14 U3F C9 + 4.7u 14 U2F 13 7 7 14 10 74LS07 10 14 14 U2E 7 11 11 74LS07 U3E 2 8 7 9 U2D 14 14 1 7 C 7 5 14 14 VSS3 D D C15 C16 1.0u 2 + 1 0.1u 18 19 20 21 VCRRC VCRG VCRB VP 24 17 VCRFB 23 16 VCRVIN 22 15 TVSB 14 ENCY TVVIN VCRSB 13 CN4 ENCV R50 10 48pin_2 E E Title A B - 22 C Size A2 Date: D AKD4709-A AK4709 Logic 1 Document Number Thursday, April 01, 2010 E Sheet Rev 0 of 3 B Video Intput J1 ENCV Video Output C17 0.1u ENCV 1 TVVOUT R10 75 J3 VCRINL 2 3 4 5 2 3 4 5 C18 0.47u R8 300 C19 (short) 1 VCRINL 1 R11 10k C26 0.1u 1 TVB R25 75 C29 0.1u ENCG 1 VCRVOUT C24 0.47u R18 300 TVINL C27 0.47u 1 R23 300 C28 (short) 1 TVINR J19 AINL+ C30 0.47u R29 300 1 1 AINL+ 1 3 J23 VCRCOUT R31 75 1 ENCB 1 VCRC R33 75 VCRCOUT 1 TVFB C32 0.47u 2 3 4 5 R32 300 JP1 GND J24 TVSB R34 470 1 TVSB C J25 TVVIN 2 3 4 5 C33 0.1u 1 2 3 4 5 C TVVIN R35 75 J26 VCRSB R36 470 J27 AINR+ C35 0.1u 1 J29 AINR AINR+ 2 3 4 5 2 VCRVIN 1 VCRSB R37 300 1 2 2 3 4 5 C34 0.47u + J28 VCRVIN 1 1 3 R38 75 3 2 3 4 5 2 3 4 5 AINL- + 2 3 4 5 C31 0.1u B J21 TVFB R30 75 1 3 J22 ENCB 2 3 4 5 Blanking Output 2 J20 AINL 2 3 4 5 J16 VCROUTR R24 300 VCROUTR R26 10k 2 3 4 5 2 3 4 5 J12 VCROUTL R19 300 VCROUTL R21 10k J15 TVINR 2 3 4 5 C25 (short) 1 + R28 75 1 + 2 3 4 5 J11 TVINL J18 VCRVOUT R27 75 1 2 3 4 5 J8 TVOUTR R14 300 TVOUTR R16 10k + ENCC 2 3 4 5 J14 TVB R22 75 1 2 3 4 5 C22 (short) VCRINR + R20 75 J17 ENCG 2 3 4 5 1 TVG R13 300 1 + 2 3 4 5 2 3 4 5 J10 TVG R17 75 ENCRC J7 C21 VCRINR 0.47u 2 3 4 5 + C23 0.1u 1 J13 ENCC B 1 TVRC R15 75 J9 ENCRC 2 3 4 5 J6 TVRC R12 75 ENCY 2 3 4 5 A + C20 0.1u 1 2 J5 ENCY J4 TVOUTL R9 300 TVOUTL A 2 3 4 5 E Audio Output Audio Intput J2 TVVOUT R7 75 1 D + 2 3 4 5 C + A C36 0.47u R39 300 AINR- + VCRCOUT D JP3 VCRRC I/O J30 VCRRC 2 3 4 5 R40 (Short) C37 0.1u D VCRRC I 1 JP2 GND VVD1 R41 75 R42 10k Blanking Input J31 VCRG 2 3 4 5 R44 (Short) C38 0.1u 1 VCRG R45 75 J32 VCRFB 2 3 4 5 J33 VCRB E 2 3 4 5 TEST1 INT R43 300 INT R48 (Short) 1 C39 0.1u R46 (Short) 1 VCRFB R47 75 E VCRB R49 75 Title A B - 23 C Size A2 Date: D AKD4709-A Document Number Rev Audio Video Input Output Tuesday, March 30, 2010 E Sheet 2 of 0 3 A B C D E VP L1 (short) 1 2 VP A A T1 (open) R51 (open) AGND JP4 GND DGND C40+ (open) 8 7 6 5 NC NC Vin Vout Vcont PCL NC GND 1 2 3 4 C42 + (open) TK73633AME C41 (open) C43 (open) R52 (open) R53 (open) VD1 1 T2 uPC3533HF R54 T45_O + VD2 OUT JP5 VD1 R55 C46 C45 47u 0.1u 1 (short) C47 0.1u + 1 VCC 1 (short) 2 T45_R C JP7 VCC 1 T45_BK VCC L4 (short) 1 2 VCC + C50 47u 1 T45_BK VSS2 + C49 47u 1 DGND VD2 L3 (short) 1 AGND 2 VD2 R56 T45_R C VD1 1 VVD VCC B 2 + C44 47u C48 47u T45_R VVD L2 (short) 3 2 1 T45_R VD2 (short) VD1 IN 2 VD1 1 1 VP VP GND B 1 T45_BK JP8 VVD VVD L5 (short) 1 1 D + VVD1 1 2 VVD2 D 2 C51 47u 2 L6 (short) E E Title Size - 24 A B C A3 Date: D Document Number AKD4709-A Power Supply Wednesday, March 31, 2010 Sheet E 3 Rev 0 of 3 - 25 - - 26 - - 27 - - 28 -