PA107DP PA107DP ® P r o PA107DP duct Innovation From Power Operational Amplifiers FEATURES GENERAL DESCRIPTION The PA107DP is a state of the art wideband high power operational amplifier designed to drive resistive, capacitive or inductive loads. For optimum linearity the output stage is biased for class A/B operation. Feed forward technology is used to obtain wide bandwidth and excellent DC performance, but constricts use to inverting mode only. External compensation allows the user to obtain both high gain and wide bandwidth. Use of a heatsink is required to realize the SOA. ♦ Power Bandwidth 170 VP-P, 2 MHz ♦ Output Voltage up to 180 Vp-p ♦ High Slew Rate 2500 V/µs Minimum with A CL = 20 ♦ High Gain Bandwidth Product 180 MHz ♦ High Output Current ±1.5 A Steady State Within SOA ♦ High Peak Output Current ±5 A APPLICATIONS This hybrid integrated circuit uses thick film resistors, ceramic capacitors, and semiconductors to maximize reliability, minimize size, and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 12 pin SIP package occupies only 2 square inches. The use of compressible insulation washers voids the warranty. ♦ Piezo Drive ♦ CRT Beam Intensity Control ♦ ATE Applications ♦ Line Driver EQUIVALENT SCHEMATIC +VAUX +VS R4 +VAUX 2 D9 8 R12 R6 +VS Q19 R16 Q10 +VAUX Q8 R18 Q4 Q14 Q17 Q11 12 Q20 Q5 D1 D IN R1 1 G C2 Q2 D5 Q1:1 D7 C4 R7 R10 -VAUX S R14 D G -VAUX S 3 -VAUX R2 D3 D6 4 R3 VEE D2 Q3 R8 Q21 R11 10 Q12 Q7 - C1 OUT Q6 + U1 GND 11 D8 C5 +VAUX Q16 R15 +VAUX Q1:2 +Vsp C3 D4 Q15 -VSP Q18 Q9 R19 Q13 R9 D10 R5 -VS R13 R17 Q22 9 -VS -VAUX PA107DPU www.cirrus.com Copyright © Cirrus Logic, Inc. 2010 (All Rights Reserved) APR 20101 APEX − PA107DPUREVD ® PA107DP Product Innovation From 1. CHARACTERISTICS AND SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Parameter Symbol Min Max Units SUPPLY VOLTAGE, +VS to −VS 40 200 V SUPPLY VOLTAGE, −VS -20 -100 V SUPPLY VOLTAGE, -VAUX to +VAUX 20 36 V SUPPLY VOLTAGE, -VAUX -10 -18 V 1.5 A OUTPUT CURRENT, Steady State, (Within SOA) OUTPUT CURRENT, peak, (Within SOA) 5 A 62.5 W +VAUX - 2 V 260 °C 150 °C POWER DISSIPATION, internal, DC INPUT VOLTAGE -VAUX + 2 TEMPERATURE, pin solder, 10s TEMPERATURE, junction (Note 2) TEMPERATURE RANGE, storage -40 +85 °C OPERATING TEMPERATURE, case -25 +85 °C SPECIFICATIONS Parameter Test Conditions Min Typ Max Units 5 10 mV VS = 100V, -VS = -100V, VAUX = 15V, -VAUX = -15V INPUT OFFSET VOLTAGE OFFSET VOLTAGE vs. temperature 10 µV/°C BIAS CURRENT, initial 300 pA (Note 3) INPUT RESISTANCE, DC 13 INPUT CAPACITANCE INPUT VOLTAGE RANGE NOISE, RTI GΩ 2 -VAUX + 2 1k source, 500 kHz BW, ACL 101 pF +VAUX - 2 V 13 nV/√Hz 140 dB GAIN OPEN LOOP GAIN @ DC OPEN LOOP GAIN @ 1MHz POWER BANDWIDTH, 170Vp-p 40 Full temperature range dB 2 MHz OUTPUT VOLTAGE SWING 10MΩ in parallel with 10 pf VOLTAGE SWING IO = 1.5A 187 V CURRENT, peak ±5 CURRENT, Steady State (within SOA) SLEW RATE, 25% to 75% SETTLING TIME to 0.1% 2 VP-P ±VS ±10 ±1.5 2500 A A 3000 V/µS 12 µS PA107DPU ® PA107DP Product Innovation From Parameter Test Conditions Min Typ Max Units 100 V POWER SUPPLY VOLTAGE, +VS 20 VOLTAGE, -VS -100 -20 V VOLTAGE, +VAUX 10 15 18 V VOLTAGE, -VAUX -18 -15 -10 V CURRENT, QUIESCENT, +VS 20 30 35 mA CURRENT, QUIESCENT, -VS 20 30 35 mA CURRENT, QUIESCENT, -VAUX 19 21 mA CURRENT, QUIESCENT, +VAUX 19 21 mA 1.5 °C/W RESISTANCE, DC junction to case 2 °C/W RESISTANCE, junction to air 30 °C/W 85 °C THERMAL RESISTANCE, AC, junction to case (Note 6) TEMPERATURE RANGE, case -25 NOTES: 1. All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at typical supply voltages and TC = 25°C. 2. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. 3. Doubles for every 10ºC of case temperature increase. 4. +VS and −VS denote the positive and negative supply voltages to the output stages. 5. +VAUX and –VAUX denote the positive and negative supply voltages to the input stages. 6. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. EXTERNAL CONNECTIONS IN +VAUX -VAUX GND OPEN OPEN OPEN +VS 1 2 C3 1uF 3 4 5 6 7 8 -VS 9 -VSP OUT +VSP 10 11 12 C4 1uF C5 1uF C6 1uF C1 + C1-2 = 10uF/A out (peak), electrolytic/tantalum, low frequency bypass. C3-4 = 1uF 25V X7R ceramic capacitor recomended. C5-6 = 1uF 200V X7R ceramic capacitor recomended. PA107DPU + C2 12-pin SIP Package Style DP Formed leads available See Package Style EE 3 ® PA107DP Product Innovation From 2. TYPICAL PERFORMANCE GRAPHS 120 Phase, (º) Amplitude -45 80 -90 40 Phase -135 0 45 160 0 120 Amplitude -45 -90 80 40 Phase -135 Amplitude, (dB) 0 LOW VOLTAGE SMALL SIGNAL RESPONSE 0 1.02 Normalized Supply Current, IQ (X) 160 Amplitude, (dB) 45 Phase, (º) HIGH VOLTAGE SMALL SIGNAL RESPONSE HIGH VOLTAGE SUPPLY CURRENT 1 0.98 0.96 0.94 0.92 0.9 0.88 0.86 0.84 -180 -40 10 100 1K 10K 100K 1M 10M 100M Frequency, (Hz) ±VS = ±100V, ±VAUX = ±15V -180 RESPONSE to 500KHz SQUARE WAVE 100 -40 10 100 1K 10K 100K 1M 10M 100M Frequency, (Hz) ±VS = ±20V, ±VAUX = ±10V 0.82 40 60 80 100 120 140 160 180 200 Rail to Rail Supply Voltage, VSS (V) ±VAUX = ±15V POSITIVE SLEW 100 NEGATIVE SLEW 100 80 60 20 0 -20 -40 Amplitude, (V) 60 40 Amplitude, (V) Amplitude, VO (V) 60 20 -20 -20 -60 -60 -60 20 -80 4 POWER DERATING 90 80 AC Power 70 60 20n 40n 60n 80n 100n Time, (ns) A = -22, ±VS = ±100V, ±VAUX = ±15V DC Power 40 30 20 0 25 50 75 100 125 150 Case Temperature, TC (°C) 40n 60n 80n 100n Time, (ns) A = -22, ±VS = ±100V, ±VAUX = ±15V 1.1 1 0.9 -40 -20 0 20 40 60 Case Temperature, TC (°C) 80 20n HIGH VOLTAGE CURRENT vs. FREQUENCY 350 1.15 0.95 10 -100 0.0n HIGH VOLTAGE CURRENT vs. TEMPERATURE 1.05 50 0 -100 0.0n HV Supply Current, IVS (mA) Internal Power Dissipation, PD (W) 2 0.8 1.2 1.6 Time, T (µs) A = -22, ±VS = ±100V, ±VAUX = ±15V 0.4 Normalized Quiescent Current, IQ(VS) (X) -100 0 300 250 ±VS = ±100V ±VAUX = ±15V 10pF Load VO = 170VP-P Sinewave 200 150 100 50 0 100 600 1100 1600 2100 2600 3100 Output Frequency, FOUT (KHz) PA107DPU ® PA107DP Product Innovation From PIN DESCRIPTIONS Pin # Pin name Description 1 IN 2 +VAUX Summing Junction Input for Inverting Operational Amplifier +10V to +18V Supply for Input Circuits 3 -VAUX -10V to -18V Supply for Input Circuits 4 GND Ground 5 Open Pin 6 Open Pin 7 Open Pin 8 +VS +20V to +100V Supply for Gain and Gate Driver Circuits 9 -VS -20V to -100V Supply for Gain and Gate Driver Circuits 10 -VSP -20V to -100V Supply for Output Source Follower 11 OUT High Power Output of Amplifier 12 +VSP +20V to +100V Supply for Output Source Follower 3. GENERAL Please read Application Note 1 “General Operating Considerations” which covers stability, power supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit, heat sink selection, complete Application Notes library, Technical Seminar Workbook and Evaluation Kits. CAUTION In order to achieve the highest speed with limited space short circuit protection and thermal protection were sacrificed. Do not short the output. Note that if current limiting at 1.5 A could be used, and the output was shorted, internal dissipation would be 150 W. This would still destroy the amplifier, albeit more slowly. 4. INTERNAL POWER DISSIPATION AND HEATSINK SELECTION With the unique combination of high voltage and speed of the PA107, traditional formulas for heatsink selection will falsely lower the apparent power handling capability of this amplifier. To more accurately predict operating temperatures use Power Design1 revision 10 or higher, or use the following procedure: Find internal dissipation (PD) resulting from driving the load. Use Power Design or refer to Apex Applications Note 1, General Operating Considerations, paragraph 7. Find total quiescent power (PDQ) by multiplying 0.035 A by VSS (total supply voltage), plus 0.021 times the total VAUX (+VAUX + |-VAUX|). Find output stage quiescent power (PDQOUT) by multiplying 0.001 by VSS. Calculate a heatsink rating which will maintain the case at 85°C or lower. RØSA = TC - TA -0.1°C/W PD + PDQ Where: TC = maximum case temperature allowed TA = maximum ambient temperature encountered RØSA = TJ - TA - (PD + PDQOUT) • RØJC -0.1°C/W PD + PDQ Calculate a heatsink rating which will maintain output transistor junctions at 150°C or lower. Where: TJ = maximum junction temperature allowed. RØJC = AC or DC thermal resistance from the specification table. Use the larger heatsink of these two calculations. Power Design is an Excel spreadsheet available free from www.cirrus.com PA107DPU 5 ® PA107DP Product Innovation From 5. REACTIVE LOADS The PA107DP is stable at a gain of 20 or above when driving either inductive or capacitive loads. However an inductor is essentially a short circuit at DC, therefore there must be enough resistance in series to keep low frequency power within ratings. When driving a 1nF capacitive load with a 180 VP-P square wave, the current peak is 1 A. Driving the same capacitor with a 2.3 MHz sine wave, the power bandwidth frequency, results in 2.6 AP-P. The power dissipated in the amplifier while driving a purely capacitive load is given by the formula: P = 2VPKVS/�XC P = 2IPKVS/� Where: VPK = Peak Voltage VS = Supply Voltage XC = Capacitive Reactance Notice that the power increases as VPK increases, such that the maximum internal dissipation occurs when VPK is maximum. The power dissipated in the amplifier while driving 1 nF at 2.3 MHz would be 82.76 W. This would not be a good thing to do! But driving 1 nF at 1 MHz at 180VP-P would result in 36.0 W, which could be within the AC power rating. This formula is optimistic; it is derived for an ideal class B amplifier output stage. 6. FEEDBACK CONSIDERATIONS The output voltage of an unloaded PA107DP can easily go as high as 95 V. All of this voltage can be applied across the feedback resistor, so the minimum value of a ½ W resistor in the feedback is 18050Ω. Practically, 20K is the minimum value for a un-derated ½ W feedback resistor. In order to provide the maximum slew rate, power bandwidth, and useable gain bandwidth; the PA107DP is not designed to be unity gain stable. It is necessary to add external compensation for gains less than 20. Often lower performance op-amps may be stabilized with a capacitor in parallel with the feedback resistor. This is because there is effectively one additional pole affecting the response. In the case of the PA107DP, however there are multiple poles clustered near 30 MHz, therefore this approach does not work. A method of compensation that works is to choose a feedback capacitor such that the time constant of the feedback capacitor times the feedback resistor is greater than 33 n-seconds. Also install a capacitor from pin 1 to ground, the summing junction, greater than 20 times as large as the feedback capacitor. The feedback capacitor or summing junction capacitor without the other will degrade stability and often cause oscillation. With the compensation described the closed loop bandwidth will be the reciprocal of 2�τFB. Alternatively, at the expense of noise and offset, the amplifier can be stabilized by a resistor across the summing junction such that the parallel combination of the input resistor and summing junction resistor is less than a twentieth of the value of the feedback resistor. Note that this will increase noise and offset by to 20 times the RTI values, but with 10 mV max offset and 13 nV/(Hz)1/2 noise, performance will be acceptable for many applications. As seen by the very small values of capacitance used in compensation for low gain, stray feedback capacitance and/or summing junction capacitance can have a VERY large effect on performance. Therefore stray capacitance must be minimized in the layout. The summing junction lead must be as short as possible, and ground plane must be kept away from the summing junction lead. 7. SLEW RATE AND FULL POWER BANDWIDTH In the PA107DP the slew rate is measured from the 25% point to the 75% point of a 180VP-P square wave. Slew rate is measured with no load and with auxiliary supplies at a nominal ±15 V and VS supplies at a maximum ±100V. Power bandwidth is defined as the highest frequency at which an unloaded amplifier can have an undistorted sine wave at full power as its output. This frequency can be calculated as the slew rate divided by � times the peak to peak amplitude; which would be 4.7 MHz for the PA107DP. Unfortunately running full output at this frequency causes internal dissipation of up to 107 W, well over the power limits for the PA107DP. Cutting the frequency to 2 MHz reduces internal dissipation to 34 W, acceptable with a good heatsink. 6 PA107DPU ® PA107DP Product Innovation From 8. SAFE OPERATING AREA (SOA) °C 85 °C 25 = TC OUTPUT CURRENT FROM +VS or -VS (A) = TC te ta ys te ta ys -VS 0.1 1 10 100 200 SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE, VS - VO (V) RF +VS +V AUX OUT PA107 -VSP ad GND +VSP ad IN e st RIN DAC +15V +VS 1 e st 10. TYPICAL APPLICATION s 0m The safe operating area curves define the maximum additional internal power dissipation the amplifier can tolerate when it produces the necessary output to drive an external load. This is not the same as the absolute maximum internal power dissipation listed elsewhere in the specification since the quiescent power dissipation is significant compared to the total. 10 9. SAFE OPERATING CURVES SOA 5 t= The MOSFET output stage of this power operational amplifier has two distinct limitations: 1. The current handling capability of the MOSFET geometry and the wire bonds. 2. The junction temperature of the output MOSFETs. NOTE: The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. -VS Piezo Drive -VAUX -15V CONTACTING CIRRUS LOGIC SUPPORT For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact [email protected]. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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