PA119CE • PA119CEA PA119CE • PA119CEA Product IPnr no od vuac t i oI nn n o v a t i o n F r o m PA119CE, PA119CEA From Video Power Operational Amplifier FEATURES • VERY FAST SLEW RATE — 900 V/µs • POWER MOS TECHNOLOGY — 4A peak rating • LOW INTERNAL LOSSES — 0.75V at 2A • PROTECTED OUTPUT STAGE — Thermal Shutoff • WIDE SUPPLY RANGE — ±15V TO ±40V APPLICATIONS 8-pin TO-3 PACKAGE STYLE CE • VIDEO DISTRIBUTION AND AMPLIFICATION • HIGH SPEED DEFLECTION CIRCUITS • POWER TRANSDUCERS UP TO 5 MHz • MODULATION OF RF POWER STAGES • POWER LED OR LASER DIODE EXCITATION TYPICAL APPLICATION DESCRIPTION The PA119 is a high voltage, high current operational amplifier optimized to drive a variety of loads from DC through the video frequency range. Excellent input accuracy is achieved with a dual monolithic FET input transistor which is cascoded by two high voltage transistors to provide outstanding common mode characteristics. All internal current and voltage levels are referenced to a zener diode biased on by a current source. As a result, the PA119 exhibits superior DC and AC stability over a wide supply and temperature range. High speed and freedom from second breakdown is assured by a complementary power MOS output stage. For optimum linearity, especially at low levels, the power MOS transistors are biased in a class A/B mode. Thermal shutoff provides full protection against overheating and limits the heatsink requirements to dissipate the internal power losses under normal operating conditions. A built-in current limit of 0.5A can be increased with the addition of two external resistors. Transient inductive load kickback protection is provided by two internal clamping diodes. External phase compensation allows the user maximum flexibility in obtaining the optimum slew rate and gain bandwidth product at all gain settings. A heatsink of proper rating is recommended. This hybrid circuit utilizes thick film (cermet) resistors, ceramic capacitors, and silicon semiconductor chips to maximize reliability, minimize size, and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3 package is hermetically sealed and electrically isolated. The use of compressible thermal washers and/or improper mounting torque will void the product warranty. Please see “General Operating Considerations”. TYPICAL APPLICATION +40V ±5mA 1K DAC 110Ω EQUIVALENT SCHEMATIC 3 Q1 Up to 4A Q5 Q9 Q11 Q15 Q13 Q12 Q16 1 D1 Q19 Q20 5 Q17B Q17A Q21 4 Q22 Q23 Q24 7 Q25 D2 6 EXTERNAL CONNECTIONS RCL+ +V 2 3 1 4 +IN 5.6pF TOP VIEW 5 –IN 8 6 –40V PA119 AS FAST POWER DRIVER www.cirrus.com Q8 Q10 –V PA119U 2 Q7 8 ±32.5V PA119 Q2 Q4 Q3 500Ω RCL+ RCL– This fast power driver utilizes the 900V/µs slew rate of the PA119 and provides a unique interface with a current output DAC. By using the DAC’s internal 1KΩ feedback resistor, temperature drift errors are minimized, since the temperature drift coefficients of the internal current source and the internal feedback resistor of the DAC are closely matched. Gain of VOUT to IIN is –6.5/mA. The DAC’s internal 1K resistor together with the external 500Ω and 110Ω form a “tee network” in the feedback path around the PA119. This effective resistance equals 6.5KΩ . Therefore the entire circuit can be modeled as 6.5KΩ feedback resistor from output to inverting input and a 5mA current source into the inverting input of the PA119. Now we see the familiar current to voltage conversion for a DAC where VOUT = –IIN x RFEEDBACK. Copyright © Cirrus Logic, Inc. 2010 (All Rights Reserved) PHASE COMPENSATION OUT GAIN CC CC 1 10 100 1000 330pF 22pF 2.2pF none 7 RCL– FEB 20101 APEX − PA119UREVC PA119CE • PA119CEA ABSOLUTE MAXIMUM RATINGS Product Innovation From SUPPLY VOLTAGE, +VS to –VS OUTPUT CURRENT, within SOA POWER DISSIPATION, internal INPUT VOLTAGE, differential INPUT VOLTAGE, common mode TEMPERATURE, pin solder — 10 sec TEMPERATURE, junction1 TEMPERATURE, storage OPERATING TEMPERATURE RANGE, case SPECIFICATIONS PARAMETER TEST CONDITIONS 2 INPUT OFFSET VOLTAGE, initial OFFSET VOLTAGE, vs. temperature OFFSET VOLTAGE, vs. supply OFFSET VOLTAGE, vs. power BIAS CURRENT, initial BIAS CURRENT, vs. supply OFFSET CURRENT, initial INPUT IMPEDANCE, DC INPUT CAPACITANCE COMMON MODE VOLTAGE RANGE3 COMMON MODE REJECTION, DC TC = 25°C TC = 25°C to +85°C TC = 25°C TC = 25°C to +85°C TC = 25°C TC = 25°C TC = 25°C TC = 25°C TC = 25°C TC = 25°C to +85°C TC = 25°C to +85°C, VCM = ±20V GAIN OPEN LOOP GAIN at 10Hz OPEN LOOP GAIN at 10Hz GAIN BANDWIDTH PRODUCT at 1MHz POWER BANDWIDTH, AV = 100 POWER BANDWIDTH, AV = 1 TC = 25°C, RL = 1KΩ TC = 25°C, RL = 15Ω TC = 25°C, CC = 2.2pF TC = 25°C, CC = 2.2pF TC = 25°C, CC = 330pF OUTPUT VOLTAGE SWING3 VOLTAGE SWING3 VOLTAGE SWING3 SETTLING TIME to .1% SETTLING TIME to .01% SLEW RATE, AV = 100 SLEW RATE, AV = 10 TC = 25°C, IO = 4A TC = 25°C to +85°C, IO = 2A TC = 25°C to +85°C, IO = 78mA TC = 25°C, 2V step TC = 25°C, 2V step TC = 25°C, CC = 2.2pF TC = 25°C, CC = 22pF POWER SUPPLY VOLTAGE CURRENT, quiescent TC = 25°C to +85°C TC = 25°C THERMAL RESISTANCE, AC, junction to case4 RESISTANCE, DC, junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case TC = 25°C to +85°C, F > 60Hz TC = 25°C to +85°C, F < 60Hz TC = 25°C to +85°C Meets full range specifications NOTES: * 1. 2. 3. 4. CAUTION 2 MIN PA119 TYP ±.5 10 10 20 10 .01 5 1011 6 ±VS–15 ±VS–12 70 104 74 111 88 100 3.5 250 ±VS–5 ±VS–1.5 ±VS–3 ±VS–.75 ±VS–1 ±VS–.5 .3 1.2 600 900 650 ±15 –25 80V 5A 75W 40V ±VS 300°C 175°C –65 to 150°C –55 to 125°C PA119A MAX MIN TYP MAX UNITS ±.35 ±.75 5 15 * * 5 50 * 3 25 * * * * mV µV/°C µV/V µV/W pA pA/V pA MΩ pF V dB * * * * * * dB dB MHz MHz kHz * * * 750 * * * * * * * V V V µs µs V/µs V/µs * * V mA ±3 30 200 100 * * ±35 100 ±40 * 120 * * 1.46 1.84 30 1.64 * * 2.0 * * * +85 * * °C/W °C/W °C/W °C The specification of PA119A is identical to the specification for PA119 in applicable column to the left. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. The power supply voltage for all specifications is the TYP rating unless noted as a test condition. +VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. PA119U PA119CE • PA119CEA POWER DERATING 70 CURRENT LIMIT, ILIM (A) CL 20 10 0 0 200 OUTPUT VOLTAGE, VO (V) SLEW RATE, (V/s) 400 100 80 60 40 10M 100M 10K 100K 1M FREQUENCY, F (Hz) POWER SUPPLY REJECTION, PSR (dB) COMMOM MODE REJECTION, CMR (dB) COMMON MODE REJECTION 120 PA119U 0 –30 –50 0 2 4 6 10 20 40 60 100 200 400 COMPENSATION CAPACITOR, CC (pF) 1K 10 –20 40 20 VIN = 2V AV = 10 tr = 10ns RL = 15W 20 –10 100 80 21 15 11 | +VS | + | –VS | = 80V 8 100K 200K 600K1M 2M 4M 8M FREQUENCY, F (Hz) 50 100 150 200 250 300 TIME, t (ns) POWER SUPPLY REJECTION 100 80 60 40 20 0 1K 10K 100K 1M 10M 100M FREQUENCY, F (Hz) 20M INPUT NOISE PULSE RESPONSE 30 RL = 15W 5 30 F SLEW RATE VS. COMP. 1000 800 600 1 2 3 4 OUTPUT CURRENT, IO (A) RL = 15W 41 2pF –V 58 .2p 1.0 0 POWER RESPONSE 80 +V 0.5 30 60 80 40 50 70 TOTAL SUPPLY VOLTAGE, VS (V) =2 100 1K 10K 100K 1M 10M 100M FREQUENCY, F (Hz) .6 =2 0 OUTPUT VOLTAGE SWING .8 CC F RCL = ∞ .5 0pF 0p F 1.0 1.0 = 33 33 20 2p pF RCL = 1.2W 1.2 CC 40 2. 22 1.5 1.4 CC 60 2.0 1.5 VOLTAGE DROP FROM SUPPLY (V) 80 .27 W 0 –50 –25 0 25 50 75 100 125 CASE TEMPERATURE, TC (C) 25 50 75 100 125 150 CASE TEMPERATURE, TC (C) SMALL SIGNAL RESPONSE 100 2.5 OUTPUT VOLTAGE, VO (VPP ) 30 =0 QUIESCENT CURRENT 1.6 INPUT NOISE VOLTAGE, VN (nV/ √ Hz) 50 40 OPEN LOOP GAIN, AOL (dB) R 3.0 60 –20 CURRENT LIMIT 3.5 30 COMMON MODE VOLTAGE, VCM (VP–P) INTERNAL POWER DISSIPATION, P(W) 80 NORMALIZED QUIESCENT CURRENT, IQ (X) Product Innovation From 70 20 15 10 7 5 3 10 1K 100 10K 100K FREQUENCY, F (Hz) 1M COMMON MODE VOLTAGE 65 60 55 50 45 40 10 100 1K 10K 100K 1M 10M FREQUENCY, F (Hz) 3 PA119CE • PA119CEA Product Innovation From GENERAL Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.Cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; Apex Precision Power’s complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits. CURRENT LIMIT Q2 (and Q25) limit output current by turning on and removing gate drive when voltage on pin 2 (pin 7) exceeds .65V differential from the positive (negative) supply rail. With internal resistors equal to 1.2Ω, current limits are approximately 0.5A with no external current limit resistors. With the addition of external resistors current limit will be: ILIM = .65V RCL +.54A To determine values of external current limit resistors: RCL = .65V ICL – .54A PHASE COMPENSATION At low gain settings, an external compensation capacitor is required to insure stability. In addition to the resistive feedback network, roll off or integrating capacitors must also be considered when determining gain settings. The capacitance values listed in the external connection diagram, along with good high frequency layout practice, will insure stability. Interpolate values for intermediate gain settings. 1. The current handling capability of the MOSFET geometry and the wire bonds. 2. The junction temperature of the output MOSFETs. The SOA curves combine the effect of these limits and allow for internal thermal delays. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. The following guidelines may save extensive analytical efforts: 1. Capacitive and inductive loads up to the following maximums are safe: ±VS CAPACITIVE LOAD 40V .1µF 11mH 30V 500µF 24mH 20V 2500µF 75mH 15V ∞ 100mH 2. Safe short circuit combinations of voltage and current are limited to a power level of 100W. 3. The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. SUPPLY CURRENT The PA119 features a class A/B driver stage to charge and discharge gate capacitance of Q7 and Q19. As these currents approach 0.5A, the savings of quiescent current over that of a class A driver stage is considerable. However, supply current drawn by the PA119, even with no load, varies with slew rate of the output signal as shown below. SAFE OPERATING AREA (SOA) SOA 10 5 4 3 ST DY t= 30 s s ST AT TC=25°C E 10 20 30 40 50 80 100 INTERNAL VOLTAGE DROP SUPPLY TO OUTPUT, VS-VO (V) 4 SUPPLY CURRENT VOUT = 60VP-P SINE RL = 500 Ω 300 200 100 0 30K 10 0m 0m EA 2 1 t= 400 SUPPLY CURRENT, IS (mA) OUTPUT CURRENT FROM +VS or -VS The MOSFET output stage of this power operational amplifier has two distinct limitations: INDUCTIVE LOAD 100K 300K 1M 3M FREQUENCY, F (Hz) 10M OUTPUT LEADS Keep the output leads as short as possible. In the video frequency range, even a few inches of wire have significant inductances, raising the interconnection impedance and limiting the output current slew rate. Furthermore, the skin effect increases the resistance of heavy wires at high frequencies. Multistrand Litz Wire is recommended to carry large video currents with low losses. PA119U PA119CE • PA119CEA Product Innovation From THERMAL SHUTDOWN STABILITY The thermal protection circuit shuts off the amplifier when the substrate temperature exceeds approximately 150°C. This allows the heatsink selection to be based on normal operating conditions while protecting the amplifier against excessive junction temperature during temporary fault conditions. Thermal protection is a fairly slow-acting circuit and therefore does not protect the amplifier against transient SOA violations (areas outside of the steady state boundary). It is designed to protect against short-term fault conditions that result in high power dissipation within the amplifier. If the conditions that cause thermal shutdown are not removed, the amplifier will oscillate in and out of shutdown. This will result in high peak power stresses, destroy signal integrity, and reduce the reliability of the device. Due to its large bandwidth, the PA119 is more likely to oscillate than lower bandwidth power operational amplifiers. To prevent oscillations a reasonable phrase margin must be maintained by: 1. Selection of the proper phase compensation capacitor. Use the values given in the table under external connections and interpolate if necessary.The phase margin can be increased by using a larger capacitor at the expense of slew rate. Total physical length (pins of the PA119, capacitor leads plus printed circuit traces) should be limited to a maximum of 3.5 inches. 2. Keep the external sumpoint stray capacitance to ground at a minimum and the sumpoint load resistance (input and feedback resistors in parallel) below 500Ω. Larger sumpoint load resistances can be used with increased phase compensation and/or by bypassing the feedback resistor. 3. Connect the case to any AC ground potential. CONTACTING CIRRUS LOGIC SUPPORT For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact [email protected]. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, Apex Precision Power, Apex and the Apex Precision Power logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. PA119U 5