TI LP2953AMGW/883

LP2953QML
LP2953QML Adjustable Micropower Low-Dropout Voltage Regulators
Literature Number: SNVS395A
LP2953QML
Adjustable Micropower Low-Dropout Voltage Regulators
General Description
Features
The LP2953A is a micropower voltage regulator with very low
quiescent current (130 μA typical at 1 mA load) and very low
dropout voltage (typ. 60 mV at light load and 470 mV at 250
mA load current). It is ideally suited for battery-powered systems. Furthermore, the quiescent current increases only
slightly at dropout, which prolongs battery life.
The LP2953A retains all the desirable characteristics of the
LP2951, but offers increased output current, additional features, and an improved shutdown function.
The internal crowbar pulls the output down quickly when the
shutdown is activated.
The error flag goes low if the output voltage drops out of regulation.
Reverse battery protection is provided.
The internal voltage reference is made available for external
use, providing a low-T.C. reference with very good line and
load regulation.
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■
■
■
■
■
■
■
Output voltage adjusts from 1.23V to 29V
Guaranteed 250 mA output current
Extremely low quiescent current
Low dropout voltage
Extremely tight line and load regulation
Very low temperature coefficient
Current and thermal limiting
Reverse battery protection
50 mA (typical) output pulldown crowbar
Auxiliary comparator included with CMOS/TTL compatible
output levels. Can be used for fault detection, low input line
detection, etc.
Applications
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High-efficiency linear regulator
Regulator with under-voltage shutdown
Low dropout battery-powered regulator
Snap-ON/Snap-OFF regulator
Ordering Information
NS Part Number
SMD Part Number
NS Package Number
LP2953AMWG/883
5962-9233601QXA
WG16A
16LD Ceramic SOIC
LP2953AMWG-QMLV
5962-9233601VXA
WG16A
16LD Ceramic SOIC
LP2953AMGW/883
5962-9233602QXA
WG16A
16LD Ceramic SOIC
LP2953AMGW-QMLV
5962-9233602VXA
WG16A
16LD Ceramic SOIC
(Note 1)
Bare Die
LP2953 MDS
Package Description
Note 1: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die
Connection Diagrams
LP2953
16-Pin Ceramic SOIC
20161114
© 2011 National Semiconductor Corporation
201611
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LP2953QML Adjustable Micropower Low-Dropout Voltage Regulators
September 1, 2011
LP2953QML
Schematic Diagram
20161106
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LP2953QML
Block Diagram
LP2953
20161102
3
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LP2953QML
Absolute Maximum Ratings (Note 2)
−65°C ≤ TA ≤ +150°C
Storage Temperature Range
−55°C ≤ TA ≤ +125°C
+150°C
260°C
Internally Limited
−20V to +30V
−0.3V to +5V
−0.3V to +30V
−0.3V to +30V
−0.3V to +30V
Operating Temperature Range
Maximum Junction Temperature
Lead Temp. (Soldering, 5 seconds)
Power Dissipation (Note 3)
Input Supply Voltage
Feedback Input Voltage (Note 5)
Comparator Input Voltage (Note 6)
Shutdown Input Voltage (Note 6)
Comparator Output Voltage (Note 6)
Thermal Resistance
θJA
16LD Ceramic SOIC (Still Air) “WG”
16LD Ceramic SOIC (500LF/Min Air flow) “WG”
16LD Ceramic SOIC (Still Air) “GW”
16LD Ceramic SOIC (500LF/Min Air flow) “GW”
134°C/W
81°C/W
140°C/W
90°C/W
θJC
16LD Ceramic SOIC “WG”(Note 4)
16LD Ceramic SOIC “GW”
Package Weight (Typical)
16LD Ceramic SOIC “WG”
16LD Ceramic SOIC “GW”
ESD Rating (Note 7)
7°C/W
15°C/W
360mg
410mg
2 KV
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Temp (°C)
1
Static tests at
+25
2
Static tests at
+125
3
Static tests at
-55
4
Dynamic tests at
+25
5
Dynamic tests at
+125
6
Dynamic tests at
-55
7
Functional tests at
+25
8A
Functional tests at
+125
8B
Functional tests at
-55
9
Switching tests at
+25
10
Switching tests at
+125
11
Switching tests at
-55
12
Settling time at
+25
13
Settling time at
+125
14
Settling time at
-55
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LP2953QML
LP2953A Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.
Symbol
Parameter
VO
Output Voltage
ΔVO / VO
Output Voltage Line
Regulation
ΔVO / VO
Conditions
1mA ≤ IL ≤ 250mA
Output Voltage Load
Regulation
IGnd
1
V
2, 3
4.93
5.07
V
1, 2, 3
0.1
%
1
2, 3
(Note 8)
IL = 250mA
(Note 8)
IL = 1mA
(Note 9)
IL = 50mA
(Note 9)
Ground Pin Current
Ground Pin Current at
Dropout
IGnd
Ground Pin Current at
Shutdown
ILimit
Current Limit
ΔVO / ΔPD
Thermal Regulation
ΔVRef / VRef
V
(Note 8)
IL = 100mA
IL = 100mA
(Note 9)
IL = 250mA
(Note 9)
VI = 4.5V, IL = 100µA
(Note 9)
(Note 9),
(Note 12)
VO = 0V
(Note 10)
Reference Voltage
Reference Voltage Line
Regulation
ΔVRef / VRef Reference Voltage Load
Regulation
IB FB
Feedback Pin Bias
Current
IO Sink
Output "Off" Pulldown
Current
(Note 11)
%
%
1
0.2
%
2, 3
0.16
%
1
0.2
%
2, 3
100
mV
1
150
mV
2, 3
300
mV
1
420
mV
2, 3
400
mV
1
520
mV
2, 3
600
mV
1
800
mV
2, 3
170
µA
1
200
µA
2, 3
2.0
mA
1
2.5
mA
2, 3
6.0
mA
1
8.0
mA
2, 3
28
mA
1
33
mA
2, 3
210
µA
1
240
µA
2, 3
140
µA
1
500
mA
1
530
mA
2, 3
0.2
%/W
1
V
1
V
2, 3
1.205 1.255
0.1
%
1
0.2
%
2, 3
0.1
%
1
0.2
%
2, 3
0.4
%
1
0.6
%
2, 3
40
nA
1
60
nA
2, 3
30
mA
1
20
mA
2, 3
VI = 6V to 30V
IRef = 0 to 200µA
5
0.2
0.16
1.215 1.245
VI = 2.5V to 6V
(Note 12)
Subgroups
5.06
IL = 0.1mA to 1mA
(Note 8)
Units
4.94
IL = 1mA to 250mA
IL = 50mA
Max
4.975 5.025
Dropout Voltage
IGnd
VRef
Min
VI = 6V to 30V
IL = 1mA
VI - VO
Notes
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LP2953QML
Dropout Detection Comparator Parameters
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.
Symbol
IOH
VOL
VTh Max
VTh Min
Parameter
Output "High" Leakage
Output "Low" Voltage
Conditions
Notes
Min
VOH = 30V
(Note 13)
Lower Threshold Voltage
(Note 13)
Units
Subgroups
1.0
µA
1
2, 3
2.0
µA
250
mV
1
400
mV
2, 3
-320
-150
mV
1
-380
-130
mV
2
-380
-120
mV
3
-450
-280
mV
1
-640
-180
mV
2
-640
-155
mV
3
Min
Max
Units
Subgroups
-7.5
7.5
mV
1
-10
10
mV
2
-12
12
mV
3
-30
30
nA
1
-50
50
nA
2
-75
75
nA
3
Min
Max
Units
Subgroups
-7.5
7.5
mV
1
-10
10
mV
2
-12
12
mV
3
-30
30
nA
1
-50
50
nA
2
-75
75
nA
3
1.0
µA
1
2.0
µA
2
2.2
µA
3
250
mV
1
400
mV
2
420
mV
3
VI = 4V, IO Comp = 400µA
Upper Threshold Voltage
Max
Shutdown Input Parameters
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.
Symbol
VIO
IIB
Parameter
Input Offset Voltage
Input Bias Current
Conditions
Notes
Referred to VRef
VI Comp = 0 to 5V
Auxillary Comparator Parameters
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.
Symbol
VIO
IIB
IOH
VOL
Parameter
Input Offset Voltage
Input Bias Current
Output "High" Leakage
Output "Low" Voltage
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Conditions
Referred to VRef
VI Comp = 0 to 5V
VOH = 30V, VI Comp = 1.3V
VI Comp = 1.1V, IO Comp = 400µA
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Notes
LP2953QML
DC Drift Parameters
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.
Δcalculations performed on QMLV devices at group B , subgroup 5.
Symbol
VI - VO
IGnd
Min
Max
Units
Subgroups
IL = 1mA
-12
12
%
1
IL = 50mA
-12
12
%
1
IL = 100mA
-12
12
%
1
IL = 250mA
-12
12
%
1
IL = 1mA, ±5µA or ±10% whichever is
greater
-5.0
5.0
µA
1
IL = 50mA, ±5µA or ±10% whichever is
greater
-5.0
5.0
µA
1
IL = 100mA, ±5µA or ±10% whichever is
greater
-5.0
5.0
µA
1
IL = 250mA, ±5µA or ±10% whichever is
greater
-5.0
5.0
µA
1
Parameter
Dropout Voltage
Ground Pin Current
Conditions
Notes
IGnd
Ground Pin Current at
Dropout
VI = 4.5V, IL = 100µA,
±5µA or ±10% whichever is greater
-5.0
5.0
µA
1
IGnd
Ground Pin Current at
Shutdown
±5µA or ±10% whichever is greater
-5.0
5.0
µA
1
VIO
Input Offset Voltage
Referred to VRef Shutdown Input
-1.0
1.0
mV
1
Referred to VRef Auxillary Comparator
-1.0
1.0
mV
1
IIB
Input Bias Current
VI Comp = 0 to 5V Shutdown Input
-5.0
5.0
nA
1
VI Comp = 0 to 5V Auxillary Comparator
-5.0
5.0
nA
1
Note 2: Abs. Max Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is functional,
but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Characteristics. The guarantees apply only for
the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/
θJA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 4: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this
improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through,
the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using θJA, rather than θJC, thermal resistance. It must
not be assumed that the device leads will provide substantial heat transfer out the package, since the thermal resistance of the leadframe material is very poor,
relative to the material of the package base. The stated θJC thermal resistance is for the package material only, and does not account for the additional thermal
resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine
this with the stated value for the package, to calculate the total allowed power dissipation for the device.
Note 5: When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode-clamped to ground.
Note 6: May exceed the input supply voltage.
Note 7: Human body model, 1.5 KΩ in series with 100 pF.
Note 8: Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a 1V differential.
At very low values of programmed output voltage, the input voltage minimum of 2V (2.3V over temperature) must be observed.
Note 9: Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the ground pin current, output load current,
and current through the external resistive divider (if used).
Note 10: Thermal regulation is the change in output voltage at a time T after a change in power dissipation, excluding load or line regulation effects. Specifications
are for a 200 mA load pulse at VI = VO(Nom)+15V (3W pulse) for T = 10 mS.
Note 11: VRef ≤ VO ≤ (VI − 1V), 2.3V ≤ VI ≤ 30V, 100 μA ≤ IL ≤ 250 mA.
Note 12: VShutdown ≤ 1.1V, VO = VO(Nom).
Note 13: Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal VRef measured at VI = VO(Nom) +
1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VO/ VRef = (R1 + R2)/R2 (refer to Figure 2).
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LP2953QML
Typical Performance Characteristics
Unless otherwise specified: VI = 6V, IL = 1 mA, CL = 2.2 μF, VSD = 3V, TA = 25°C, VO = 5V.
Quiescent Current
Quiescent Current
20161127
20161128
Ground Pin Current vs Load
Ground Pin Current
20161130
20161129
Ground Pin Current
Output Noise Voltage
20161131
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20161132
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LP2953QML
Ripple Rejection
Ripple Rejection
20161133
20161134
Ripple Rejection
Line Transient Response
20161136
20161135
Line Transient Response
Output Impedance
20161137
20161138
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LP2953QML
Load Transient Response
Load Transient Response
20161139
20161140
Dropout Characteristics
Enable Transient
20161142
20161141
Enable Transient
Short-Circuit Output Current
and Maximum Output Current
20161143
20161144
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LP2953QML
Feedback Bias Current
Feedback Pin Current
20161145
20161146
Error Output
Comparator Sink Current
20161148
20161147
Divider Resistance
Dropout Detection
Comparator Threshold
Voltages
20161149
20161150
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LP2953QML
Thermal Regulation
Minimum Operating Voltage
20161151
20161152
Dropout Voltage
20161153
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HEATSINK REQUIREMENTS
The maximum allowable power dissipation for the LP2953 is
limited by the maximum junction temperature (+150°C) and
the two parameters that determine how quickly heat flows
away from the die: the ambient temperature and the junctionto-ambient thermal resistance of the part.
The military parts which are manufactured in ceramic DIP
packages contain a KOVAR lead frame (unlike the industrial
parts, which have a copper lead frame). The KOVAR material
is necessary to attain the hermetic seal required in military
applications.
The KOVAR lead frame does not conduct heat as well as
copper, which means that the PC board copper can not be
used to significantly reduce the overall junction-to-ambient
thermal resistance.
The power dissipation calculations are done using a fixed
value for θ(J–A), the junction-to-ambient thermal resistance, of
134°C/W and can not be changed by adding copper foil patterns to the PC board. This leads to an important fact: The
maximum allowable power dissipation in any application using the LP2953 is dependent only on the ambient temperature:
20161126
FIGURE 1. Power Derating Curve for LP2953
PROGRAMMING THE OUTPUT VOLTAGE
The regulator may be pin-strapped for 5V operation using its
internal resistive divider by tying the Output and Sense pins
together and also tying the Feedback and 5V Tap pins together.
Alternatively, it may be programmed for any voltage between
the 1.23V reference and the 30V maximum rating using an
external pair of resistors (see Figure 2). The complete equation for the output voltage is:
EXTERNAL CAPACITORS
A 2.2 μF (or greater) capacitor is required between the output
pin and ground to assure stability when the output is set to
5V. Without this capacitor, the part will oscillate. Most type of
tantalum or aluminum electrolytics will work here. Film types
will work, but are more expensive. Many aluminum electrolytics contain electrolytes which freeze at −30°C, which requires
the use of solid tantalums below −25°C. The important parameters of the capacitor are an ESR of about 5Ω or less and
a resonant frequency above 500 kHz (the ESR may increase
by a factor of 20 or 30 as the temperature is reduced from
25°C to −30°C). The value of this capacitor may be increased
without limit.
At lower values of output current, less output capacitance is
required for stability. The capacitor can be reduced to
0.68 μF for currents below 10 mA or 0.22 μF for currents below
1 mA.
Programming the output for voltages below 5V runs the error
amplifier at lower gains requiring more output capacitance for
stability. At 3.3V output, a minimum of 4.7 μF is required. For
the worst-case condition of 1.23V output and 250 mA of load
current, a 6.8 μF (or larger) capacitor should be used.
A 1 μF capacitor should be placed from the input pin to ground
if there is more than 10 inches of wire between the input and
the AC filter capacitor or if a battery input is used.
Stray capacitance to the Feedback terminal can cause instability. This problem is most likely to appear when using high
value external resistors to set the output voltage. Adding a
100 pF capacitor between the Output and Feedback pins and
increasing the output capacitance to 6.8 μF (or greater) will
cure the problem.
where VREF is the 1.23V reference and IFB is the Feedback
pin bias current (−20 nA typical). The minimum recommended
load current of 1 μA sets an upper limit of 1.2 MΩ on the value
of R2 in cases where the regulator must work with no load
(see Minimim Load ). IFB will produce a typical 2% error in
VO which can be eliminated at room temperature by trimming
R1. For better accuracy, choosing R2 = 100 kΩ will reduce
this error to 0.17% while increasing the resistor program current to 12 μA. Since the typical quiescent current is 120 μA,
this added current is negligible.
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LP2953QML
MINIMUM LOAD
When setting the output voltage using an external resistive
divider, a minimum current of 1 μA is recommended through
the resistors to provide a minimum load.
It should be noted that a minimum load current is specified in
several of the electrical characteristic test conditions, so this
value must be used to obtain correlation on these tested limits.
Application Hints
LP2953QML
20161110
* In shutdown mode, ERROR will go high if it has been pulled up to an external supply. To avoid this invalid response, pull up to regulator output.
** Exact value depends on dropout voltage. (See Application Hints)
20161109
* See Application Hints
** Drive with TTL-low to shut down
FIGURE 3. ERROR Output Timing
FIGURE 2. Adjustable Regulator
OUTPUT ISOLATION
The regulator output can be left connected to an active voltage source (such as a battery) with the regulator input power
shut off, as long as the regulator ground pin is connected
to ground. If the ground pin is left floating, damage to the
regulator can occur if the output is pulled up by an external
voltage source.
DROPOUT VOLTAGE
The dropout voltage of the regulator is defined as the minimum input-to-output voltage differential required for the output voltage to stay within 100 mV of the output voltage
measured with a 1V differential. The dropout voltage is independent of the programmed output voltage.
REDUCING OUTPUT NOISE
In reference applications it may be advantageous to reduce
the AC noise present on the output. One method is to reduce
regulator bandwidth by increasing output capacitance. This is
relatively inefficient, since large increases in capacitance are
required to get significant improvement.
Noise can be reduced more effectively by a bypass capacitor
placed across R1 (refer to Figure 2). The formula for selecting
the capacitor to be used is:
DROPOUT DETECTION COMPARATOR
This comparator produces a logic “LOW” whenever the output
falls out of regulation by more than about 5%. This figure results from the comparator's built-in offset of 60 mV divided by
the 1.23V reference (refer to block diagrams on page 1). The
5% low trip level remains constant regardless of the programmed output voltage. An out-of-regulation condition can
result from low input voltage, current limiting, or thermal limiting.
Figure 3 gives a timing diagram showing the relationship between the output voltage, the ERROR output, and input voltage as the input voltage is ramped up and down to a regulator
programmed for 5V output. The ERROR signal becomes low
at about 1.3V input. It goes high at about 5V input, where the
output equals 4.75V. Since the dropout voltage is load dependent, the input voltage trip points will vary with load
current. The output voltage trip point does not vary.
The comparator has an open-collector output which requires
an external pull-up resistor. This resistor may be connected
to the regulator output or some other supply voltage. Using
the regulator output prevents an invalid “HIGH” on the comparator output which occurs if it is pulled up to an external
voltage while the regulator input voltage is reduced below
1.3V. In selecting a value for the pull-up resistor, note that
while the output can sink 400 μA, this current adds to battery
drain. Suggested values range from 100 kΩ to 1 MΩ. This
resistor is not required if the output is unused.
When VIN ≤ 1.3V, the error flag pin becomes a high
impedance, allowing the error flag voltage to rise to its pull-up
voltage. Using VOUT as the pull-up voltage (rather than an external 5V source) will keep the error flag voltage below 1.2V
(typical) in this condition. The user may wish to divide down
the error flag voltage using equal-value resistors (10 kΩ suggested) to ensure a low-level logic signal during any fault
condition, while still allowing a valid high logic level during
normal operation.
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This gives a value of about 0.1 μF. When this is used, the
output capacitor must be 6.8 μF (or greater) to maintain stability. The 0.1 μF capacitor reduces the high frequency gain
of the circuit to unity, lowering the output noise from 260 μV
to 80 μV using a 10 Hz to 100 kHz bandwidth. Also, noise is
no longer proportional to the output voltage, so improvements
are more pronounced at high output voltages.
AUXILIARY COMPARATOR
The LP2953 contains an auxiliary comparator whose inverting input is connected to the 1.23V reference. The auxiliary
comparator has an open-collector output whose electrical
characteristics are similar to the dropout detection comparator. The non-inverting input and output are brought out for
external connections.
SHUTDOWN INPUT
A logic-level signal will shut off the regulator output when a
“LOW” (<1.2V) is applied to the Shutdown input.
To prevent possible mis-operation, the Shutdown input must
be actively terminated. If the input is driven from open-collector logic, a pull-up resistor (20 kΩ to 100 kΩ recommended)
should be connected from the Shutdown input to the regulator
input.
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ground, the reverse-battery protection feature which protects
the regulator input is sacrificed if the Shutdown input is tied
directly to the regulator input.
If reverse-battery protection is required in an application, the
pull-up resistor between the Shutdown input and the regulator
input must be used.
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LP2953QML
If the Shutdown input is driven from a source that actively pulls
high and low (like an op-amp), the pull-up resistor is not required, but may be used.
If the shutdown function is not to be used, the cost of the pullup resistor can be saved by simply tying the Shutdown input
directly to the regulator input.
IMPORTANT: Since the Absolute Maximum Ratings state
that the Shutdown input can not go more than 0.3V below
LP2953QML
Typical Applications
Basic 5V Regulator
20161115
5V Current Limiter with Load Fault Indicator
20161116
* Output voltage equals +VIN minum dropout voltage, which varies with output current. Current limits at a maximum of 380 mA (typical).
** Select R1 so that the comparator input voltage is 1.23V at the output voltage which corresponds to the desired fault current value.
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LP2953QML
Low T.C. Current Sink
20161117
5V Regulator with Error Flags for
LOW BATTERY and OUT OF REGULATION
20161118
* Connect to Logic or μP control inputs.
LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or power down some hardware
with high power requirements. The output is still in regulation at this time.
OUT OF REGULATION flag indicates when the battery is almost completely discharged, and can be used to initiate a power-down sequence.
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LP2953QML
5V Battery Powered Supply with Backup and Low Battery Flag
20161119
The circuit switches to the NI-CAD backup battery when the main battery voltage drops below about 5.6V, and returns to the main battery when its voltage is
recharged to about 6V.
The 5V MAIN output powers circuitry which requires no backup, and the 5V MEMORY output powers critical circuitry which can not be allowed to lose power.
* The BATTERY LOW flag goes low whenever the circuit switches to the NI-CAD backup battery.
5V Regulator with Timed Power-On Reset
20161120
Timing Diagram for Timed Power-On Reset
20161121
* RT = 1 MEG, CT = 0.1 μF
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18
LP2953QML
5V Regulator with Error Flags for
LOW BATTERY and OUT OF REGULATION
with SNAP-ON/SNAP-OFF Output
20161123
* Connect to Logic or μP control inputs.
OUTPUT has SNAP-ON/SNAP-OFF feature.
LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or shut down hardware with high
power requirements. The output is still in regulation at this time.
OUT OF REGULATION flag goes low if the output goes below about 4.7V, which could occur from a load fault.
OUTPUT has SNAP-ON/SNAP-OFF feature. Regulator snaps ON at about 5.7V input, and OFF at about 5.6V.
5V Regulator with Timed Power-On Reset, Snap-On/Snap-Off Feature and Hysteresis
20161124
Timing Diagram
20161125
Td = (0.28) RC = 28 ms for components shown.
19
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LP2953QML
Revision History Section
Released
Revision
Section
Changes
11/30/2010
A
New Release, Corporate format
1 MDS data sheet converted into one Corp. data
sheet format. MNLP2953AM-X Rev 1A1 will be
archived.
09/01/2011
B
Ordering Information, Absolute Maximum
Ratings
Ordering Information — entered new 'GW' devices.
Absolute Maximum Ratings — added new Theta JA
and Theta JC numbers. LP2953QML Rev A will be
archived.
www.national.com
20
LP2953QML
Physical Dimensions inches (millimeters) unless otherwise noted
16-Pin Ceramic Surface-Mount
NS Package Number WG16A
21
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LP2953QML Adjustable Micropower Low-Dropout Voltage Regulators
Notes
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