TI BQ25060DQCR

bq25060
www.ti.com
SLUSA32 – MAY 2010
1A, Single-Input, Single Cell Li-Ion Battery Charger with 50-mA LDO, and External Power
Path Control
Check for Samples: bq25060
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
DESCRIPTION
30V input Rating, With 10.5V Over-Voltage
Protection (OVP)
FET Controller for External Battery FET for
External Power Path Control (BGATE)
Input Voltage Dynamic Power Management
50mA integrated Low Dropout Linear
Regulator (LDO)
Programmable Charge Current Through ISET
and EN Pin
0.5% Battery Voltage Regulation Accuracy
7% Charge Current Regulation Accuracy
Thermal Regulation and Protection
Battery NTC Monitoring During Charge
Status Indication – Charging/Done
Available in small 2mm × 3mm 10 Pin SON
Package
The bq25060 is a highly integrated Li-Ion linear
battery charger targeted at space-limited portable
applications. It operates from either a USB port or AC
Adapter and charges a single-cell Li-Ion battery with
up to 1A of charge current. The 30V input voltage
range with input over-voltage protections supports
low-cost unregulated adapters.
The bq25060 has a single power output that charges
the battery. The system load is connected to OUT.
The low-battery system startup circuitry maintains
OUT greater than 3.4V whenever an input source is
connected. This allows the system to start-up and run
whenever an input source is connected regardless of
the battery voltage. The charge current is
programmable up to 1A using the ISET input.
Additionally, a 4.9V 50mA LDO is integrated into the
IC for supplying low power external circuitry.
The battery is charged in three phases: conditioning,
constant current and constant voltage. In all charge
phases, an internal control loop monitors the IC
junction temperature and reduces the charge current
if an internal temperature threshold is exceeded. The
charger power stage and charge current sense
functions are fully integrated. The charger function
has high accuracy current and voltage regulation
loops, charge status display, and charge termination.
APPLICATIONS
•
•
•
•
Smart Phones
Mobile Phones
Portable Media Players
Low Power Handheld Devices
TYPICAL APPLICATION CIRCUIT
VGPIO
VGPIO
bq25060
USB or Adaptor
VBUS
D+
DGND
1
R2
100kΩ
CHG
8
OUT
10
STATUS
IN
C1
0.1uF
VDD
C2
1uF
QBAT
BGATE 9
7
EN
BAT
HOST
6
PACK+
2
ISET
3
VSS
TS
5
LDO
4
TEMP
C4
0.1uF
R1
1 kΩ
PACK -
VLDO
C3
0.1uF
GPIO
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
bq25060
SLUSA32 – MAY 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PART NO.
MARKING
MEDIUM
QUANTITY
bq25060DQCR
DAN
Tape and Reel
3000
bq25060DQCT
DAN
Tape and Reel
250
PACKAGE DISSIPATION RATINGS TABLE
PACKAGE
RqJA
RqJC
TA < 25°C POWER
RATING
DERATING FACTOR
ABOVE TA = 25°C
10 Pin 2mm × 3mm SON (1)
58.7°C/W (2)
3.9°C/W
1.70W
0.017W/°C
(1)
(2)
Maximum power dissipation is a function of TJ(max), RqJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = [TJ(max) - TA]/RqJA.
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is
connected to the ground plane by a 2×3 via matrix.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE / UNIT
IN (with respect to VSS)
–0.3 to 30 V
EN, TS, CHG, BGATE, ISET (with respect to VSS)
–0.3 to 7 V
Output Voltage
BAT, OUT, LDO, CHG, BGATE (with respect to VSS)
–0.3 to 7 V
Input Current (Continuous)
IN
1.2 A
Output Current (Continuous)
BAT
1.2 A
Output Current (Continuous)
LDO
100 mA
Output Sink Current
CHG
Input Voltage
5 mA
Junction temperature, TJ
–40°C to 150°C
Storage temperature, TSTG
–65°C to 150°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
VIN
IN voltage range
IN operating voltage range
MIN
MAX
3.55
28
4.4
10.2
UNITS
V
IIN
Input current, IN
1
A
IOUT
Ouput Current in charge mode, OUT
1
A
RISET
Input current limit programming resistor range
1
10
kΩ
TJ
Junction Temperature
0
125
°C
ELECTRICAL CHARACTERISTICS
Over junction temperature range 0°C ≤ TJ ≤ 125°C and VIN = 5V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
3.25
3.40
3.55
V
INPUT
VUVLO
2
Under-voltage lock-out
VIN: 0V → 4V
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ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range 0°C ≤ TJ ≤ 125°C and VIN = 5V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VHYS-UVLO
Hysteresis on UVLO
VIN: 4V → 0V
VBATUVLO
Battery UVLO
VBAT rising
VHYS-BUVLO
Hysteresis on BAT UVLO
VBAT falling
VIN-SLP
Valid input source threshold VIN-SLP above
VBAT
Input power good if VIN > VBAT + VIN–SLP
VBAT = 3.6V, VIN: 3.5V → 4V
VHYS-INSLP
Hysteresis on VIN-SLP
VBAT = 3.6V, VIN: 4V → 3.5V
32
mV
tDGL(NO-IN)
Deglitch time, input power loss to charger
turn-off
Time measured from VIN: 5V → 2.5V 1µs
fall-time
32
ms
VOVP
Input over-voltage protection threshold
VIN: 5 V → 11 V
VHYS-OVP
Hysteresis on OVP
VIN: 11 V → 5 V
tDGL(OVP)
Input over-voltage deglitch time
tREC(OVP)
Input over-voltage recovery time
Time measured from VIN: 11V → 5V 1µs
fall-time to LDO = HI, VBAT = 3.5V
VIN_DPM
Input DPM threshold
VIN Falling, VIN-DPM enabled with EN
250
1.95
2.05
mV
2.15
V
125
30
10.2
4.2
75
10.5
mV
150
mV
10.8
V
100
mV
100
µs
100
µs
4.30
4.4
V
6
µA
QUIESCENT CURRENT
IBAT(PDWN)
Battery current into BAT, No input
connected
VIN = 0V, TJ = 85°C
IBAT(DONE)
BAT current, charging terminated
VIN = 6V, VBAT > VBAT(REG)
10
µA
IIN(STDBY)
Standby current into IN pin
EN = HI, VIN < VOVP
0.6
mA
EN = HI, VIN ≥ VOVP
2
ICC
Active supply current, IN pin
VIN = 6V, no load on OUT pin, VBAT >
VBAT(REG), IC enabled
3
mA
BATTERY CHARGER FAST-CHARGE
VBAT(REG)
Battery charge regulation voltage
TA = 0°C to 125°C, IOUT = 50 mA
TA = 25°C
4.16
4.20
4.23
4.179
4.200
4.221
IIN_RANGE
User programmable input current limit
range
RISET = 1kΩ to 10kΩ, EN = VSS
100
IIN(LIM)
Input current limit, or fast-charge current
EN = FLOAT
435
EN = VSS
KISET
Fast charge current factor
RISET = 1kΩ to 10kΩ, EN = VSS
VDO(IN-OUT)
VIN – VOUT
VIN = 4.2V, IOUT = 0.75 A
467
V
1000
mA
500
mA
KISET/RISET
900
1000
1100
AΩ
500
900
mV
700
Ω
ISET SHORT CIRCUIT PROTECTION
RISET_MAX
Highest resistor value considered a short
fault
RISET: 900Ω → 300Ω, IOUT latches off,
Cycle power to reset, Fault range > 1.10A
tDGL-SHORT
Deglitch time transition from ISET short to
IOUT disable
Clear fault by cycling VBUS or EN
IOUT-CL
Maximum OUT current limit regulation
(Clamp)
430
1.5
1.2
ms
2
A
V
PRE-CHARGE AND CHARGE DONE
VLOWV
Pre-charge to fast-charge transition
threshold
External power path control disabled,
BGATE = VSS
2.4
2.5
2.6
tDGL(LOWV)
Deglitch time on fast-charge to pre-charge
transition
External power path control enabled
VBAT rising or falling
2.8
2.9
3.0
IPRECHARGE
Precharge current to BAT during precharge
mode
VBAT = 0V to 2.9V, Battery FET
connected, Current out of BAT
VBAT = 0V to 2.5V, BGATE = VSS, Input
current limit regulated to IPRECHARGE
ITERM
Default termination current threshold
VIN = 5V, ICHARGE = 100 mA to 1 A
25
ms
28
37
45
41.5
45
48.5
7.5
10.5
13.5
VBAT(REG)
–0.13V
VBAT(REG)
–0.1V
VBAT(REG)
–0.065V
mA
%IIN(LIM)
RECHARGE OR REFRESH
VRCH
Recharge detection threshold
VBAT falling
tDGL(RCH)
Deglitch time, recharge threshold detected
VBAT falling
25
V
ms
EXTERNAL POWER PATH CONTROL
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ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range 0°C ≤ TJ ≤ 125°C and VIN = 5V (unless otherwise noted)
PARAMETER
VOUT(REG)
Output regulation voltage
TEST CONDITIONS
VBAT ≤ 2.9 V
2.9 V < VBAT ≤ 3.6V
VBAT > 3.6 V
MIN
TYP
MAX
3.4
3.5
3.6
UNITS
V
3.44
3.59
3.75
V
VBAT + Vdrop(QBAT)
V
VSUPP1
Enter supplement mode threshold
VBAT = 3.4 V, VOUT Falling
VOUT ≤
VBAT -0.06
V
VSUPP2
Exit supplement mode threshold
VBAT = 3.4 V, VOUT Rising
VOUT ≥
VBAT-0.02
V
VLDO
LDO Output Voltage
VIN = 5.5V, ILDO = 0mA to 50mA
ILDO
Maximum LDO Output Current
VDO
Dropout Voltage
LDO
4.7
4.9
5.1
60
VIN = 4.5V, ILDO = 50mA
V
mA
200
300
mV
0.4
V
LOGIC LEVELS ON EN
VIL
Logic low input voltage
VIH
Logic high input voltage
1.4
VFLT
Logic FLOAT input voltage
600
IFLT_leakage
Maximum leakage sink or source current to
keep in FLOAT
IEN_DRIVE
Minimal drive current from an external
device for Low or High
V
850
1100
mV
1
µA
8
µA
LOGIC LEVELS ON BGATE
VIL
Logic LOW input voltage
VIH
Logic HIGH input voltage
0.4
1.4
V
V
BATTERY-PACK NTC MONITOR (TS)
VCOLD
TS Cold Threshold
Temperature falling
VHYS(COLD)
Hysteresis on Cold threshold
Temperature rising, BGATE disabled
VHOT
TS Hot Threshold
Temperature rising
VHYS(HOT)
Hysteresis on Hot Threshold
Temperature falling, BGATE disabled
tdgl(TS)
Deglitch for TS Fault
IN or OUT TS Fault
VOL
Output LOW voltage
ISINK = 5 mA
IIH
Leakage current
V/CHG = 5 V
24.4
25
25.6
1
12
12.5
% of VLDO
% of VLDO
13
% of VLDO
1
% of VLDO
25
ms
CHG OUTPUT
0.45
V
1
µA
THERMAL REGULATION
TJ(REG)
Temperature Regulation Limit
TJ rising
125
°C
TJ(OFF)
Thermal shutdown temperature
TJ rising
155
°C
TJ(OFF-HYS)
Thermal shutdown hysteresis
TJ falling
20
°C
4
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SLUSA32 – MAY 2010
DEVICE INFORMATION
SIMPLIFIED BLOCK DIAGRAM
LDO
+
Q1
Q2
OUT
VIN
Precharge
Current Source
+
ISET
+
125C
Charge
Pump
TJ
External Power Path
Control Mode
BAT
IIN(REG)
1V
2.9V
+
VOUT(REG)
+
VIN_DPM
+
Charge
Pump
VOUT(MIN)
USB
Enable
TERMINATION
COMPARATOR
BGATE
+
VREF
+
VOUTMIN
100mV
External Power Path
Control Mode
Sleep Comparator
75mV
EN
+
CHARGE
CONTROL
OVP Comparator
VOUTMIN Enable
Comparator
VBAT
+
VOVP
VBAT
VIN
+
3.6V
VIN
VLDO
STATUS
OUTPUT
DISABLE
+
+
CHG
TS COLD
TS HOT
TS
VSS
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PIN CONFIGURATION
IN
ISET
VSS
OUT
1
10
2
9
BGATE
8
CHG
3
bq 25060
LDO
4
7
EN
TS
5
6
BAT
10-pin 2mm x 3mm SON
PIN FUNCTIONS
PIN
NAME
NO.
I/O
DESCRIPTION
IN
1
I
Input power supply. IN is connected to the external DC supply (AC adapter or USB port). Bypass IN to VSS with
at least a 0.1µF ceramic capacitor.
ISET
2
I
Current programming input. Connect a resistor from ISET to VSS to program the input current limit when the user
proagammable mode is selected by the EN pin. The resistor range is between 1kΩ and 10kΩ to set the current
between 100 mA and 1A.
VSS
3
–
Ground terminal. Connect to the thermal pad and the ground plane of the circuit.
LDO
4
O
LDO output. LDO is regulated to 4.9V and drives up to 50mA. Bypass LDO to VSS with a 0.1µF ceramic
capacitor. LDO is enabled when VUVLO < VIN < VOVP.
TS
5
I
Battery pack NTC monitoring input. Connect the battery pack NTC from TS to VSS to monitor battery pack
temperature. The default pack temperature range is 0°C to 45°C thresholds.
EN
7
I
Enable input. Drive EN high to disable the IC. Connect EN to VSS to place the bq25060 in the user pgrammable
mode where the input current is programmed using the ISET input. Leave EN flaoting to place the bq25060 in
USB500 mode. See the Charger Enable section for details on using the EN interface.
CHG
8
O
Charge status indicator open-drain output. CHG is pulled low while the device is charging the battery. CHG goes
high impedance when the battery is fully charged and does not indicate subsequent recharge cycles.
BAT
6
O
Battery connection output. BAT is the sense input for the battery as well as the precharge current output. Connect
BAT to the battery and bypass BAT to VSS with a 0.1µF ceramic capacitor.
BGATE
9
I/O Battery P-Channel FET gate drive output. Connect BGATE to the gate of the external P-Channel FET that
connects the battery to OUT. Connect BGATE to VSS if the external FET is not used. No external capacitor is
recommended from BGATE to GND.
OUT
10
O
System output connection. OUT supplies the system with a minimum voltage of 3.4V (min.) to ensure system
operation whenever an input adapter is connected regardless of the battery voltage. Bypass OUT to VSS with a
minimum 1µF ceramic capacitor.
Pad
–
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The
thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the
thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times.
Thermal
PAD
6
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SLUSA32 – MAY 2010
APPLICATION CIRCUITS
VGPIO
VGPIO
bq25060
USB or Adaptor
VBUS
D+
DGND
1
R2
100kΩ
CHG
8
OUT
10
STATUS
IN
C1
0.1uF
VDD
C2
1uF
QBAT
BGATE 9
7
EN
BAT
6
TS
5
HOST
PACK+
2
TEMP
C4
0.1uF
ISET
R1
1 kΩ
PACK -
3
VSS
LDO
4
VLDO
C3
0.1uF
GPIO
Figure 1. Typical Application Circuit Using the External Power Path Control Feature
VGPIO
VGPIO
bq25060
USB or Adaptor
VBUS
D+
DGND
1
R2
100kΩ
CHG
8
OUT
10
STATUS
IN
C1
0.1uF
VDD
C2
1uF
7
EN
BGATE
9
BAT
6
TS
5
HOST
PACK+
2
TEMP
ISET
R1
1 kΩ
PACK -
3
VSS
LDO
4
VLDO
C3
0.1uF
GPIO
Figure 2. Typical Application Circuit Disabling the External Power Path Control Feature
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TYPICAL CHARACTERISTICS
Using circuit in Figure 1, TA = 25°C, unless otherwise specified
ADAPTER INSERTION
ENABLE USING EN
EN
2 V/div
VIN = 0 V - 5 V, VBAT = 3.3 V, ICHG = 280 mA
VIN = 5 V, VBAT = 3 V, ICHG = 280 mA
CHG
2 V/div
VIN
5 V/div
BGATE
2 V/div
BGATE
2 V/div
LDO
2 V/div
ICHG
0.5 A/div
IIN
100 mA/div
20 ms/div
10 ms/div
Figure 3.
Figure 4.
DISABLE USING EN
INPUT OVP
EN
2 V/div
LDO
2 V/div
VIN
10 V/div
VIN = 5 V to 29 V, VBAT = 3.8 V
VIN = 5 V, VBAT = 3.4 V, ICHG = 280 mA
VBAT
2V/div
BGATE
2 V/div
LDO
2 V/div
IIN
200 mA/div
IBAT
0.5 A/div
1 ms/div
50 µs/div
Figure 5.
Figure 6.
PRE-CHARGE MODE TO MINIMUM OUTPUT REGULATION
MODE
MINIMUM OUTPUT REGULATION MODE TO CONSTANT
CURRENT (CC) MODE
VIN = 5 V, VBAT = 1.8 V to 3.45 V, ICHG = 467 mA
VIN = 5 V, VBAT = 2.4 V to 3.6 V, ICHG = 467 mA
VBAT
500 V/div
VBAT
500 V/div
BGATE
2 V/div
BGATE
2 V/div
IBAT
500 mA/div
IBAT
500 mA/div
20 ms/div
20 ms/div
Figure 7.
8
Figure 8.
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TYPICAL CHARACTERISTICS (continued)
Using circuit in Figure 1, TA = 25°C, unless otherwise specified
PRE-CHARGE TO CONSTANT VOLTAGE (CV) MODE
VIN-DPM
VIN
2 V/div
VBAT
500 mV/div
IIN
500 mA/div
VIN = 5 V, VBAT = 2.8 V to 4.18 V, ICHG = 467 mA
BGATE
2 V/div
BGATE
2 V/div
IBAT
500 mA/div
VIN = 5 V with current limit of 600 mA,
VBAT = 3.2 V, ICHG = 93 mA to 935 mA
20 ms/div
200 µs/div
Figure 9.
Figure 10.
SUPPLEMENT MODE
CHARGE CYCLE DEMO
VOUT
2 V/div
IIN
1 A/div
VBAT
2 V/div
BGATE
1 V/div
VIN = 5 V, ICHG = 280 mA,
BGATE =Enabled, CBAT = 2000 µF,
No battery connected
IIN
100 mA/div
VOUT
2 V/div
IOUT
2 A/div
BGATE
2 V/div
VIN = 5 V, VBAT = 3.2 V,
ICHG = 935 mA, IOUT = 0 A to 2 A
20 ms/div
100 µs/div
Figure 11.
Figure 12.
BATTERY VOLTAGE
vs
CHARGE CURRENT
RDSON (From IN to OUT)
vs
JUNCTION TEMPERATURE
4.24
1.20
CV Mode
Iload = 500 mA
4.23
1.00
4.22
RDSON - W
VBAT - Battery Voltage - V
0.80
4.21
4.20
0.60
4.19
0.40
4.18
0.20
4.17
4.16
0
200
400
600
800
1000
0.00
-50
ICHRG - Charge Current - mA
Figure 13.
0
50
100
TJ - Junction Temperature - °C
150
Figure 14.
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TYPICAL CHARACTERISTICS (continued)
Using circuit in Figure 1, TA = 25°C, unless otherwise specified
INPUT CURRENT LIMIT
vs
INPUT VOLTAGE
OUTPUT VOLTAGE
vs
CHARGE CURRENT
4.00
1000
VBAT = 3 V
900
3.90
Dropout
Thermal Regulation
3.80
700
VOUT - Output Voltage - V
IINLIM - Input Current Limit - mA
800
600
500
400
300
3.70
3.60
3.50
3.40
3.30
200
3.20
100
3.10
0
4
5
6
7
8
9
10
11
External Power Path Control Mode
VBAT = 3 V
3.00
0.000
VIN - Input Voltage - V
0.200
0.400
0.600
0.800
1.000
ICHRG - Charge Current - mA
Figure 15.
Figure 16.
DETAILED FUNCTIONAL DESCRIPTION
The bq25060 is a highly integrated Li-Ion linear battery charger targeted at space-limited portable applications. It
operates from either a USB port or AC Adapter and charges a single-cell Li-Ion battery with up to 1A of charge
current. The 30V input voltage range with input over-voltage protections supports low-cost unregulated adapters.
The bq25060 has a single power output that charges the battery. The system load is connected to OUT. The
low-battery system startup circuitry maintains OUT pin voltage at VOUT(REG) whenever an input source is
connected. This allows the system to start-up and run whenever an input source is connected regardless of the
battery voltage. The charge current is programmable up to 1A using the EN input. Additionally, a 4.9V 50mA
LDO is integrated into the IC for supplying low power external circuitry.
External FET Controller (BGATE)
The External Power Path Control feature is implemented using the BGATE output. BGATE is also used to
enable/ disable the External Power Path Control feature. When power is first applied to either VBAT or VIN on the
bq25060, the BGATE output is tested. If the BGATE pin is connected to VSS, the External Power Path Control
feature is disabled. In order to enable the External Power Path Control feature after it has been disabled, the
battery and the input source must be removed and reconnected and BGATE must NOT be connected to VSS.
With External Power Path Control enabled, BGATE is used to drive an external P-channel FET that connects the
battery to the system output. The state of this FET is dependant on the battery voltage and the IC status. In
discharge mode, BGATE is pulled to GND to turn the external FET on fully. During discharge mode, the output is
connected directly to the battery. Discharge mode is entered under the following conditions:
1. IC disabled or no input power
2. Supplement mode
When not in one of these conditions, the BGATE output is controlled by the bq25060 and changes depending on
which mode is required. See the Charging Operation section for more details.
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Enable/ Disable External Power Path Control
When power is first applied to the bq25060, either at the IN or BAT input, the bq25060 checks the BGATE
output. The device sources a small current out of BGATE for 2ms and monitors the voltage. If VBGATE is
connected to ground and the voltage does not rise above logic High, the External Power Path Control feature is
disabled and VLOWV is set to 2.5V. If the BGATE voltage rises above logic High, the External Power Path
Control feature is enabled and VLOWV is set to 2.9V. The bq25060 only does this check when power is initially
applied. Power must removed from IN and BAT and then reapplied to initiate another check. Figure 17 illustrates
the startup check procedure.
No Input Source or
Battery Connected
Input source OR
Battery connected?
NO
YES
Source Current to
BGATE
BGATE =
VSS?
YES
External
Power Path
Control
Disabled
V LOWV = 2.5V
NO
External
Power Path
Control
Enabled
VLOWV = 2.9V
Figure 17. BGATE Monitor Sequence
Charging Operation
The bq25060 charges a battery in 3 stages while maintaining a minimum system output. When the bq25060 is
enabled by EN, the battery voltage is monitored to verify which stage of charging must be used. The bq25060
charges in precharge mode, minimum output regulation mode, or normal CC/CV mode based on the battery
voltage.
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Charger Operation with External Power Path Control Mode Enabled
PRECHARGE
CC FAST CHARGE
Maximum
Charge Current
CV TAPER
System Voltage
4.2V
IIN(LIM)
3.5V
VLOWV
Battery Voltage
IPRECHG
CHG = Hi -Z
ITERM
Figure 18. Typical Charging Cycle with External Power Path Control Enabled
Precharge Mode (VBAT ≤ VLOWV)
The bq25060 enters precharge mode when VBAT ≤ VLOWV. Upon entering precharge mode, the battery is charged
with a 40mA current source and /CHG goes low. During precharge mode, VOUT is regulated to 3.5V and the
battery is charged from the internal fixed 40mA current source connected to the BAT output. With BGATE
connected to GND, the system output is connected to the battery and therefore the system voltage is equal to
the battery voltage.
Minimum Output Regulation Mode (2.9V<VBAT<3.6V)
Once VBAT exceeds 2.9V, the bq25060 enters Minimum Output Regulation Mode. While 2.9V<VBAT<3.6V, VOUT
is regulated to VOUT(REG) by the external FET (QBAT) while the internal FETs between IN and OUT is used to
regulate the fast charge current. The total current is shared between the output load and the battery. As the
system current increases, the battery charge current decreases. In order to maintain the minimum output
regulation voltage VOUT(REG), the system load must be less than the input current limit.
Normal CC/CV Mode
Once VBAT>3.6V, QBAT is fully turned on and VOUT = VBAT + Vdrop(Q1). At this point, the bq25060 is in constant
current (CC) mode where charge current is regulated using the internal FETs between IN and OUT. The VOUT
voltage is not regulated. The total current is shared between the output load and the battery. Once the battery
voltage charges up to VBAT(REG), the bq25060 enters constant voltage (CV) mode where VBAT is regulated to
VBAT(REG) and the current is reduced. Once the input current falls below the termination threshold (ITERM)
BGATE is turned off and CHG goes high impedance. The system output is regulated to 4.2V and the battery is
disconnected from OUT, however supplement mode is still available.
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Charger Operation With External Power Path Control Mode Disabled (BGATE = VSS)
PRECHARGE
CC FAST CHARGE
CV TAPER
VOUT(REG)
IIN(LIM)
Battery
Current
Battery and
Output
Voltage
VLOWV
CHG = Hi-Z
IPRECHG
ITERM
Figure 19. Charging Cycle with External Power Path Control Disabled (BGATE = VSS)
Precharge Mode (VBAT ≤ VLOWV)
The bq25060 enters precharge mode when VBAT ≤ VLOWV. Upon entering precharge mode, CHG goes low and
the input current limit is set to IPRECHARGE. With BGATE connected to GND, the system output is connected to the
battery and therefore the system voltage is equal to the battery voltage. During precharge mode, the input
current is regulated to 50mA and as such, only loads up to 50mA are supported.
Normal CC/CV Mode
Once VBAT > VLOWV, the bq25060 enters constant current (CC) mode where charge current is regulated using the
internal MOSFETs between IN and OUT. The total current is shared between the output load and the battery.
Once the battery voltage charges up to VBAT(REG), the bq25060 enters constant voltage (CV) mode where
VBAT is regulated to VBAT(REG) and the current is reduced. Once the input current falls below the termination
threshold (ITERM), CHG goes high impedance but the system remains charging and regulates the output to
VBAT(REG).
Programmable Input Current Limit (ISET)
When the charger is enabled, and the user programmable current limit is selected by the EN input, internal
circuits generate a current proportional to the input current at the ISET input. The current out of ISET is 1/1000
(±10%) of the charge current. This current, when applied to the external charge current programming resistor, R1
(Figure 1), generates an analog voltage that is regulated to program the fast charge current. Connect a resistor
from ISET to VSS to program the input current limit using the following equation:
K
1000A ´ W
IIN_LIMIT = ISET =
RISET
RISET
(1)
IIN_LIM is programmable from 100mA to 1A. The voltage at ISET can be monitored by an external host to
calculate the charging current to the battery. The input current is related to the ISET voltage using the following
equation:
1000
IIN = VISET ´
RISET
(2)
Monitoring the ISET voltage allows for the host to calculate the actual charging current and therefore perform
more accurate termination. The input current to the system must be monitored and subtracted from the current
into the bq25060 which is show by VISET.
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Input Current Limit Control (EN)
The bq25060 contains a 3-state that controls the input current limit. Drive EN low to program the input current
limit to the user defined value programmed using ISET. Drive EN high to place the bq25060 in USB suspend
mode. In USB suspend mode, the input current into bq25060 is reduced and the external battery FET is held on
(BGATE pulled to GND). Leaving EN unconnected or connected to a high impedance source programs the
USB500 input current limit.
Table 1. EN Input Definition
EN
MODE
Low
ISET
Hi-Z
USB500
Hi
USB Suspend
Input Over Voltage Protection
The bq25060 contains an input over voltage protection circuit that disables the LDO output and charging when
the input voltage rises above VOVP. This prevents damage from faulty adapters. The OVP circuitry contains an
deglitch that prevents ringing on the input from line transients from tripping the OVP circuitry falsely. If an adapter
with an output greater than VOVP is plugged in, the IC completes power up and then shuts down if the voltage
remains above VOVP after the deglitch. The LDO remains off and charging remains disabled until the input
voltage falls below VOVP.
Under-Voltage Lockout (UVLO)
The bq25060 remains in power down mode when the input voltage is below the under-voltage lockout threshold
(VUVLO). During this mode, the control input (EN) is ignored. The LDO, the charge FET connected between IN
and OUT are off and the status output (CHG) is high impedance. Once the input voltage rises above VUVLO, the
internal circuitry is turned on and the normal operating procedures are followed.
Input DPM Mode (VIN-DPM)
The input current into the bq25060 includes all load currents, i.e. the system load, LDO load, and battery charge
current. The total input current is regulated by the input current limit of the bq25060. The bq25060 utilizes the
VIN-DPM mode for operation from current-limited input sources.
WIth VIN-DPM enabled, the input voltage is monitored. If VIN falls to VIN-DPM, the input current limit is reduced to
prevent the input voltage from falling further. This prevents the bq25060 from crashing poorly designed or
incorrectly configured USB sources. Figure 20 shows the VIN-DPM behavior to a current limited source. In this
figure the input source has a 200mA current limit and the device has started up with the 285mA current limit.
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Input voltage falls due to
adapter current limit
VIN
2 V/div
Input current limit is
reduced to prevent
crashing the input
supply
ILIM
200 mA/div
1 ms/div
Figure 20. bq25060 VIN-DPM
External NTC Monitoring (TS)
The bq25060 features a flexible, voltage based external battery pack temperature monitoring input. The TS input
connects to the NTC thermistor in the battery pack to monitor battery temperature and prevent dangerous
over-temperature conditions. During charging, the voltage at TS is continuously monitored. If, at any time, the
voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. When the voltage
measured at TS returns to within the operation window, charging is resumed. When charging is suspended due
to a battery pack temperature fault, the CHG output goes to high impedance.
The temperature thresholds are programmed using a resistor divider from LDO to GND with the NTC thermistor
connected to the center tap from TS to GND. See Figure 5 for the circuit example. The value of R1 and R2 are
calculated using the following equations:
-R2 ´ RHOT ´ (0.125 - 1)
R1 =
0.125 ´ (R2 + RHOT)
(3)
R2 =
-RHOT ´ RCOLD ´ (0.125 - 0.250)
RHOT ´ 0.250 ´ (0.125 - 1) + RCOLD ´ 0.125 ´ (1 - 0.250)
(4)
RHOT is the expected thermistor resistance at the programmed hot threshold; RCOLD is the expected thermistor
resistance at the programmed cold threshold.
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LDO
R1
V COL D
TS
PACK+
TEM P
+
V H OT
R2
PACK -
+
bq25060
Figure 21. NTC Monitoring Function
50mA LDO (LDO)
The LDO output of the bq25060 is a low dropout linear regulator (LDO) that supplies up to 50mA while regulating
to VLDO. The LDO is active whenever the input voltage is above VUVLO and below VOVP. It is not affected by
the EN input. The LDO output is used to power circuitry such as USB transceivers in dead battery conditions.
This allows the user to operate the product immediately after plugging the adapter in, instead of waiting for the
battery to charge to useable levels.
Charge Status Indicator (CHG)
The bq25060 contains an open drain CHG output that indicates charge cycles and faults. When charging a
battery in precharge, fastcharge, or CV mode, the CHG output is pulled to VSS. Once the BAT output reaches
regulation and the charge current falls below the termination threshold, CHG goes to high impedance to signal
the battery is fully charged. The CHG output goes low during battery recharge cycles to signal the host to monitor
for termination.
Additionally, CHG notifies the host if a NTC temperature fault has occurred. CHG goes to high impedance if a TS
fault occurs. Connect CHG to the required logic level voltage through a 1kΩ to 100kΩ resistor to use the signal
with a microprocessor. ICHG must be below 5mA.
Thermal Regulation and Thermal Shutdown
The bq25060 contains a thermal regulation loop that monitors the die temperature continuously. If the
temperature exceeds TJ(REG), the device automatically reduces the charging current to prevent the die
temperature from increasing further. In some cases, the die temperature continues to rise despite the operation
of the thermal loop, particularly under high VIN conditions. If the die temperature increases to TJ(OFF), the IC is
turned off. Once the device die temperature cools by TJ(OFF-HYS), the device turns on and returns to thermal
regulation. Continuous over-temperature conditions result in the pulsing of the load current. If the junction
temperature of the device exceeds TJ(OFF), the charge FET is turned off. The FET is turned back on when the
junction temperature falls below TJ(OFF) – TJ(OFF-HYS).
Note that these features monitor the die temperature of the bq25060. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm.
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APPLICATION INFORMATION
Selection of Input/ Output Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. For
normal charging applications, a 0.1µF ceramic capacitor, placed in close proximity to the IN pin and GND pad
works best. In some applications, depending on the power supply characteristics and cable length, it may be
necessary to increase the input filter capacitor to avoid exceeding the OVP voltage threshold during adapter hot
plug events where the ringing exceeds the deglitch time.
The charger in the bq25060 requires a capacitor from OUT to GND for loop stability. Connect a 1µF ceramic
capacitor from OUT to GND close to the pins for best results. More output capacitance may be required to
minimize the output droop during large load transients. Connect a 0.1µF ceramic capacitor from BAT to GND to
eliminate the potential ESD strike.
The LDO also requires an output capacitor for loop stability. Connect a 0.1µF ceramic capacitor from LDO to
GND close to the pins. For improved transient response, this capacitor may be increased.
bq25060 Charger Design Example
The following sections provide an example for determining the component values for use with the bq25060.
Requirements: Refer to Figure 1 and Figure 2 for Schematics of the Design Example.
• Supply voltage = 4.35~10.2V
• Input current limit is 0.5A
• Set 0°C~45°C operating range
Calculations
Input Current Limit Control (EN): Drive EN low to program the input current limit to the user defined value
programmed using ISET. See Table 1 for other detail EN pin options.
Program the input current Iimit (ISET): Connect a resistor, RISET, from ISET to VSS to program the input
current. The RISET is determined by:
KISET
1000A ´ W
=
= 2000W
RISET =
IIN_LIMIT
IIN_LIMIT
(5)
Set 0°C to 45°C charger operating temperature range (TS): The value of R1 and R2 are:
-RHOT ´ RCOLD ´ (0.125 - 0.250)
R2 =
= 11.3kW
RHOT ´ 0.250 ´ (0.125 - 1) + RCOLD ´ 0.125 ´ (1 - 0.250)
-R2 ´ RHOT ´ (0.125 - 1)
R1 =
= 24.0kW
0.125 ´ (R2 + RHOT)
(6)
(7)
RHOT: 4.911kΩ, the resistor value of Semitec NTC 103AT-2 at 45°C;
RCOLD: 27.28kΩ, the resistor value of Semitec NTC 103AT-2 at 0°C.
External FET Controller (BGATE): On Figure 1, BGATE drives an external P-channel FET that connects the
battery to the system output. When power is first applied to either VBAT or VIN, the device sources a typical
50µA small current out of BGATE and monitors the voltage. If BGATE voltage is higher than logic high in first
1ms and stays high for at least 2ms, the external power path control feature is enabled and VLOWV is set to
2.9V. The OUT pin maintains voltage at VOUT(REG).
In Figure 2, BGATE is connected to Vss. The external power path control feature is disabled and VLOWV is set
to 2.5V. The OUT pin shorts to BAT.
Status Indicators (CHG): The CHG pin is open drain output. If used, CHG pin should be pulled up via a resistor
and possibly a LED to a power source. If monitored by a host, the host pull-up power source should be used.
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Thermal Considerations
The bq25060 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application
Note (SLUA271).
The most common measure of package thermal performance is thermal impedance (qJA ) measured (or
modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical
expression for qJA is:
T - TA
qJA = J
PD
(8)
Where:
TJ = chip junction temperature
TA = ambient temperature
PD = device power dissipation
Factors that can greatly influence the measurement and calculation of qJA include:
• Whether or not the device is board mounted
• Trace size, composition, thickness, and geometry
• Orientation of the device (horizontal or vertical)
• Volume of the ambient air surrounding the device under test and airflow
• Whether other surfaces are in close proximity to the device being tested
The device power dissipation, PD, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged:
P D = (VIN - VO UT ) ´ IOUT
(9)
Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. See the charging profile, Figure 18. If the board
thermal design is not adequate the programmed fast charge rate current may not be achieved under maximum
input voltage and minimum battery voltage, as the thermal loop can be active, effectively reducing the charge
current to avoid excessive IC junction temperature
PCB Layout Considerations
It is important to pay special attention to the PCB layout. The following provides some guidelines:
• To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq25060, with short
trace runs to both IN, OUT and GND (thermal pad).
• All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces.
• The bq25060 is packaged in a thermally enhanced SON package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB
Attachment Application Note (SLUA271).
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PACKAGE OPTION ADDENDUM
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17-May-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ25060DQCR
ACTIVE
WSON
DQC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ25060DQCT
ACTIVE
WSON
DQC
10
250
CU NIPDAU
Level-2-260C-1 YEAR
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
BQ25060DQCR
WSON
DQC
10
3000
330.0
12.4
2.3
3.3
0.85
4.0
12.0
Q1
BQ25060DQCT
WSON
DQC
10
250
180.0
12.4
2.3
3.3
0.85
4.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ25060DQCR
WSON
DQC
10
3000
346.0
346.0
29.0
BQ25060DQCT
WSON
DQC
10
250
190.5
212.7
31.8
Pack Materials-Page 2
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