TI BQ24072TRGTR

bq24072T
bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
1.5A USB-Friendly Li-Ion Battery Charger and Power-Path Management IC
Check for Samples: bq24072T, bq24075T, bq24079T
FEATURES
•
•
•
•
1
•
•
•
•
•
•
•
•
•
•
Fully Compliant USB Charger
Selectable 100mA and 500mA Maximum Input
Current
100mA Maximum Current Limit Ensures
Compliance to USB-IF Standard
Input based Dynamic Power Management
(VIN-DPM) for Protection Against Poor USB
Sources
28V Input Rating with Over-voltage Protection
Integrated Dynamic Power Path Management
(DPPM) Function Simultaneously and
Independently Powers the System and
Charges the Battery
System Output Tracks Battery Voltage
(bq24072T)
Supports up to 1.5A Charge Current with
Current Monitoring Output (ISET)
Programmable Input Current Limit up to 1.5A
for Wall Adapters
Battery Disconnect Function with SYSOFF
Input
Reverse Current, Short-Circuit and Thermal
Protection
Flexible Voltage Based NTC Thermistor Input
Proprietary Start Up Sequence Limits Inrush
Current
Status Indication – Charging/Done, Power
Good
Small 3 mm × 3 mm 16 Lead QFN Package
•
APPLICATIONS
•
•
•
•
Smart Phones
PDAs
MP3 Players
Low-Power Handheld Devices
DESCRIPTION
The bq2407xT series of devices are integrated Li-ion
linear chargers and system power path management
devices
targeted
at
space-limited
portable
applications. The devices operate from either a USB
port or AC adapter and support charge currents up to
1.5A. The input voltage range with input over-voltage
protection supports unregulated adapters. The USB
input current limit accuracy and start up sequence
allow the bq2407xT to meet USB-IF inrush current
specification. Additionally, the input dynamic power
management (VIN-DPM) prevents the charger from
crashing incorrectly configure USB sources.
(Description continued on next page)
1 kW
Adaptor
IN
DC
GND
CHG 9
PGOOD 7
1 kW
SYSTEM
OUT 10
13
11
1mF
4.7 mF
bq24075T
bq24079T
bq24072T
8 VSS
BAT 2
3
I LIM
I SET
TMR
16
14
4.7 mF
12
4
CE
15 SYSOFF
6 EN1
System
ON /OFF
Control
EN2 5
1.18 kW
TS 1
TEMP
PACK+
PACK-
1.13 kW
13 kW
10 kW
V IN
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
bq24072T
bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
The bq2407xT features dynamic power path management (DPPM) that powers the system while simultaneously
and independently charging the battery. The DPPM circuit reduces the charge current when the input current
limit causes the system output to fall to the DPPM threshold; thus, supplying the system load at all times while
monitoring the charge current separately. This feature reduces the number of charge and discharge cycles on
the battery, allows for proper charge termination and enables the system to run with a defective or absent battery
pack.
Additionally, the regulated system input enables instant system turn-on when plugged in even with a totally
discharged battery. The power-path management architecture also permits the battery to supplement the system
current requirements when the adapter cannot deliver the peak system currents, enabling the use of a smaller
adapter.
The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge
phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the
internal temperature threshold is exceeded. The charger power stage and charge current sense functions are
fully integrated. The charger function has high accuracy current and voltage regulation loops, charge status
display, and charge termination. The input current limit and charge current are programmable using external
resistors.
ORDERING INFORMATION
(2)
VOVP
VBAT(REG)
VOUT(REG)
VDPPM
OPTIONAL
FUNCTION
MARKING
bq24072TRGTR
6.6V
4.2 V
VBAT + 225 mV
VOREG –100 mV
TD
PAP
bq24072TRGTT
6.6V
4.2 V
VBAT + 225 mV
VOREG –100 mV
TD
PAP
bq24075TRGTR
6.6 V
4.2 V
5.5 V
4.3 V
SYSOFF
OEC
bq24075TRGTT
6.6 V
4.2 V
5.5 V
4.3 V
SYSOFF
OEC
bq24079TRGTR
6.6 V
4.1 V
5.5 V
4.3 V
SYSOFF
OED
bq24079TRGTT
6.6 V
4.1 V
5.5 V
4.3 V
SYSOFF
OED
PART NO. (1)
(1)
(2)
2
The RGT package is available in the following options:
R – taped and reeled in quantities of 3,000 devices per reel.
T – taped and reeled in quantities of 250 devices per reel.
This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight and is suitable for
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including
bromine (BR) or antimony (Sb) above 0.1% of total product weight.
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Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
bq24072T
bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
ABSOLUTE MAXIMUM RATINGS (1)
(2)
over operating free-air temperature range (unless otherwise noted)
VALUE / UNIT
Input voltage
Input current
IN (with respect to VSS)
–0.3 to 28 V
BAT (with respect to VSS)
–0.3V to 5V
OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, VREF, ITERM, SYSOFF, TD
(with respect to VSS)
–0.3 TO 7 V
IN
1.6 A
OUT
Output current
(Continuous)
Output sink current
5A
BAT (Discharge mode)
5A
BAT (Charging mode)
1.5A
CHG, PGOOD
15 mA
Junction temperature, TJ
–40°C to 150°C
Storage temperature, TSTG
–65°C to 150°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
DISSIPATION RATINGS
PACKAGE
RqJA
RqJC
TA < 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
QFN-16 RGT
39.47 °C/W
2.4°C/W
2.3 W
225 mW
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
MAX
UNITS
IN voltage range
4.35
26
V
IN operating voltage range
4.35
6.4
V
IIN
Input current, IN pin
1.5
A
IOUT
Current, OUT pin
4.5
A
IBAT
Current, BAT pin (Discharging)
4.5
A
ICHG
Current, BAT pin (Charging)
TJ
Junction Temperature
RILIM
Maximum input current programming resistor
RISET
Fast-charge current programming resistor (2)
RITERM
Termination current programming resistor
RTMR
Timer programming resistor
(1)
(2)
1.5 (1)
A
125
°C
1.07
7.5
kΩ
590
3000
Ω
0
15
kΩ
18
72
kΩ
0
The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
Use a 1% tolerance resistor RISET to avoid issues with the RISET short test when using the maximum charge current setting.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
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bq24072T
bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
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ELECTRICAL CHARACTERISTICS
Over junction temperature range (0°C < TJ < 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3.3
3.4
V
300
mV
140
mV
INPUT
VUVLO
Under-voltage lock-out
VIN: 0V → 4V
3.2
VHYS-
Hysteresis on UVLO
VIN: 4V → 0V
200
VIN-DT
Input power detection threshold
(Input power detected if VIN > VBAT + VIN-DT)
VBAT = 3.6V, VIN: 3.5V → 4V
55
VHYS-INDT
Hysteresis on VIN-DT
VBAT = 3.6V, VIN: 4V → 3.5V
20
UVLO
tDGL(PGOO Deglitch time, input power detected
status
D)
Time measured from VIN: 0V → 5V,
1ms rise-time to PGOOD = LO
VOVP
Input overvoltage protection threshold
VIN: 5V → 7V
VHYS-OVP
Hysteresis on OVP
VIN: 7V → 5V
tBLK(OVP)
Input over-voltage blanking time
tREC(OVP)
mV
1.2
6.4
Time measured from VIN: 11V → 5V 1ms
fall-time to PGOOD = LO
Input over-voltage recovery time
80
6.6
ms
6.8
V
240
mV
50
ms
1.2
ms
1.3
mA
520
mV
ILIM, ISET SHORT CIRCUIT TEST
ISC
Current source
VSC
QUIESCENT CURRENT
IBAT(PDWN
Sleep current into BAT pin
CE = LO or HI, input power not detected, no load on OUT pin
6.5
mA
)
IIN(STDBY)
Standby current into IN pin
ICC
Active supply current, IN pin
EN1= HI, EN2=HI, VIN ≤ 6V
50
EN1= HI, EN2=HI, VIN > 6V
200
CE = LO, VIN = 6V, no load on OUT pin,
VBAT > VBAT(REG), (EN1,EN2)≠(HI,HI)
1.5
mA
300
475
mV
50
100
mV
mA
POWER PATH
VDO(INOUT)
VDO(BATOUT)
VIN – VOUT
VIN = 4.3V, IIN = 1A, VBAT = 4.2V
VBAT – VOUT
IOUT = 1A, VIN = 0V, VBAT > 3V
VIN > VOUT + VDO(IN-OUT) , VBAT< 3.2 V
OUT pin voltage regulation (bq24072T)
VO(REG)
OUT pin voltage regulation (bq24075T,
bq24079T)
IIN-MAX
Maximum input current
3.3
VIN > VOUT + VDO(IN-OUT) , VBAT ≥ 3.2 V
VIN > VOUT + VDO(IN-OUT)
3.4
3.5
VBAT + VBAT +
150 mV 225 mV
VBAT +
270 mV
5.4
5.5
5.6
V
EN1 = LO, EN2 = LO
90
95
100
mA
EN1 = HI, EN2 = LO
450
475
500
mA
EN2 = HI, EN1 = LO
KILIM/RIL
A
IM
ILIM ≥ 500mA
1500
1600
1700
200mA < ILIM < 500mA
1330
1512
1700
KILIM
Maximum input current factor
IIN-MAX
Programmable input current limit range
EN2 = HI, EN1 = LO, RILIM = 8kΩ to 1.1kΩ
200
VIN-LOW
Input voltage threshold when input
current is reduced
EN2 = LO, EN1 = X
4.35
VDPPM
Output voltage threshold when charging
current is reduced
VO(REG)
–180 mV
bq24072T
bq24075T, bq24079T
4.2
AΩ
1500
mA
4.5
4.63
V
VO(REG)
–100
mV
VO(REG)
–30 mV
V
4.3
4.4
VBSUP1
Enter battery supplement mode
VOUT falling, Supplement mode entered when VOUT < VBSUP1
VBAT –
40mV
VBSUP2
Exit battery supplement mode
VOUT rising, Supplement mode exited when VOUT > VBSUP2
VBAT –
20mV
VO(SC1)
Output short-circuit detection threshold,
power-on
0.8
0.9
1.0
V
VO(SC2)
Output short-circuit detection threshold,
supplement mode VBAT – VOUT > VO(SC2)
indicates short-circuit
200
250
300
mV
4
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V
V
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
bq24072T
bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range (0°C < TJ < 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tDGL(SC2)
Deglitch time, supplement mode short
circuit
tREC(SC2)
Recovery time, supplement mode short
circuit
MIN
TYP
MAX
UNIT
250
ms
60
ms
BATTERY CHARGER
IBAT(SC)
Source current for BAT pin short-circuit
detection
VBAT(SC)
BAT pin short-circuit detection threshold
VBAT(REG)
Battery charge voltage
VLOWV
Pre-charge to fast-charge transition
threshold
tDGL1(LOW
4
bq24072T, bq24075T
bq24079T
7.5
11
mA
V
1.6
1.8
2.0
4.16
4.20
4.24
4.059
4.100
4.141
2.9
3
3.1
V
V
Deglitch time on pre-charge to
fast-charge transition
25
ms
Deglitch time on fast-charge to
pre-charge transition
25
ms
V)
ICHG
Battery fast charge current range
VBAT(REG) > VBAT > VLOWV, VIN = 5V, CE = LO, EN1= LO, EN2 =
HI
ICHG
Battery fast charge current
CE = LO, EN1= LO, EN2 = HI, VBAT > VLOWV,
VIN = 5V, IIN-MAX > ICHG, no load on OUT pin, thermal loop not
active, DPM loop not active
KISET
Fast charge current factor
IPRECHG
Pre-charge current
kPRECHG
Pre-charge current factor
V)
tDGL2(LOW
ITERM
tDGL(TERM
300
1500
KISET/RISET
797
A
890
975
KPRECHG /RISET
CE = LO, (EN1,EN2)≠(LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5V, DPM loop not active, thermal
loop not active
Charge current value for termination
detection threshold
CE = LO, (EN1,EN2)=(LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5V, DPM loop not active, thermal
loop not active
AΩ
A
70
88
106
0.09×ICH
0.1×ICH
0.11×ICH
G
G
G
0.027×IC
.033×IC
0.040×IC
HG
HG
HG
Deglitch time, termination detected
mA
25
ms
)
VRCH
Recharge detection threshold
tDGL(RCH)
Deglitch time, recharge threshold
detected
tDGL(NO-
VO(REG)
–140mV
IN)
Delay time, input power loss to charger
turn-off
IBAT(DET)
Sink current for battery detection
tDET
Battery detection timer
VBAT = 3.6V. Time measured from VIN:
5V → 3.3V 1ms fall-time
5
VO(REG)
–100m
V
VO(REG)
–60mV
V
62.5
ms
20
ms
7.5
10
250
mA
ms
BATTERY CHARGING TIMERS
tPRECHG
Pre-charge safety timer value
TMR = floating
1440
1800
2160
s
tMAXCH
Charge safety timer value
TMR = floating
14400
18000
21600
s
tPRECHG
Pre-charge safety timer value(externally
set)
18kΩ < RTMR < 72kΩ
RTMR x KTMR
s
tMAXCH
Charge safety timer value (externally
set)
18kΩ < RTMR < 72kΩ
10 x RTMR x KTMR
s
KTMR
Timer factor
35
45
12
12.5
55 s / kΩ
BATTERY – PACK NTC MONITOR
VHOT
High temperature trip point
Battery charging
VHYS(HOT) Hysteresis on high trip point
Battery charging
VCOLD
Low temperature trip point
Battery charging
VHYS(COL
Hysteresis on low trip point
Battery charging
13
% of
VIN
1
24.5
25
25.5
1
D)
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
% of
VIN
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% of
VIN
% of
VIN
5
bq24072T
bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range (0°C < TJ < 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
tDGL(TS)
TEST CONDITIONS
Deglitch time, pack temperature fault
detection
MIN
Battery charging
TYP
MAX
UNIT
50
ms
THERMAL REGULATION
TJ(REG)
Temperature Regulation Limit
125
°C
TJ(OFF)
Thermal shutdown temperature
155
°C
TJ(OFF-
Thermal shutdown hysteresis
20
°C
HYS)
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD
VIL
Logic LOW input voltage
0
0.4
VIH
Logic HIGH input voltage
1.4
6.0
V
V
IIL
1
mA
IIH
10
mA
0.4
V
LOGIC LEVELS ON PGOOD, CHG
VOL
6
Output LOW voltage
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ISINK = 5 mA
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
bq24072T
bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
DEVICE INFORMATION
PIN DIAGRAM
Pin out designations are not final. Subject to change.
ISET
TD
TMR
IN
ISET
SYSOFF
TMR
IN
RGT
TOP VIEW
2
11
bq24072T
3
10
4
9
6
7
8
TS
BAT
BAT
CE
VSS
5
ILIM
OUT
OUT
CHG
1
2
3
16 15 14 13
12
bq24075T 11
bq24079T 10
4
9
5
6
7
8
ILIM
OUT
OUT
CHG
VSS
16 15 14 13
12
EN2
EN1
PGOOD
1
EN2
EN1
PGOOD
TS
BAT
BAT
CE
TERMINAL FUNCTIONS
PIN
NUMBER
NAME
bq24072T
bq24075T
bq24079T
I/O
1
1
I/O
External NTC Thermistor Input. Connect the TS input to the center tap of a resistor divider
from VIN to GND with the NTC in parallel with the bottom resistor to monitor the NTC in the
battery pack. For applications that do not utilize the TS function, set the resistor divider to
be a 20% ratio. See the Battery Pack Temperature Monitoring section for details on
calculating the resistor values.
BAT
2, 3
2, 3
I/O
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive
terminal of the battery. Bypass BAT to VSS with a 4.7mF to 47mF ceramic capacitor.
CE
4
4
I
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery
charger in standby mode. In standby mode, OUT is active and battery supplement mode is
available. Connect /CE to a low logic level to enable the battery charger. CE is internally
pulled down with ~285kΩ. Do not leave CE unconnected to ensure proper operation.
EN2
5
5
I
EN1
6
6
I
Input Current Limit Configuration Inputs. Use EN1 and En2 to control the maximum input
current and enable USB compliance. See Table 1 for the description of the operation states.
EN1 and EN2 are internally pulled down with ~285kΩ. Do not leave EN1 or EN2
unconnected to ensure proper operation.
PGOOD
7
7
O
Open-Drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input
source is detected. PGOOD is high-impedance when the input power is not within specified
limits. Connect PGOOD to the desired logic voltage rail using a 1kΩ to 100kΩ resistor, or
use with an LED for visual indication.
VSS
8
8
–
Ground. Connect to the thermal pad and to the ground rail of the circuit.
CHG
9
9
O
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is
charging. CHG is high-impedance when charging is complete or when the charger is
disabled. CHG flashes to indicate a timer fault. Connect CHG to the desired logic voltage
rail using a 1kΩ to 100kΩ resistor, or use with an LED for visual indication.
OUT
10, 11
10, 11
O
System Supply Output. OUT provides a regulated output when the input is below the OVP
threshold and above the regulation voltage. When the input is out of the operation range,
OUT is connected to VBAT except when SYSOFF is high. Connect OUT to the system load.
Bypass OUT to VSS with a 4.7mF to 47mF ceramic capacitor.
ILIM
12
12
O
Adjustable Current Limit Programming Input. Connect a 1.07kΩ to 7.5kΩ resistor from ILIM
to VSS to program the maximum input current (EN2=1, EN1=0). The input current includes
the system load and the battery charge current. Leaving ILIM unconnected disables all
charging.
TS
DESCRIPTION
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
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bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
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TERMINAL FUNCTIONS (continued)
PIN
NUMBER
NAME
bq24072T
bq24075T
bq24079T
I/O
IN
13
13
I
Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port).
The input operating range is 4.35V to 6.6V. The input accepts voltages up to 26V without
damage, but operation is suspended. Bypass IN to VS with a 1mF to 10mF ceramic
capacitor.
TMR
14
14
I
Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers.
Connect TMR to VSS to disable all safety timers. Connect a 18kΩ to 72kΩ resistor between
TMR and VSS to program the timers to a desired length. Leave TMR unconnected to set
the timers to the default values.
SYSOFF
–
15
I
System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to
the system output. When an adapter is connected, charge is also disabled. Connect
SYSOFF low for normal operation. SYSOFF is internally pulled up to VBAT through a large
resistor (~5MΩ). Do not leave SYSOFF unconnected to ensure proper operation.
TD
15
–
I
Termination Disable Input. Connect TD high to disable charger termination. Connect TD to
VSS to enable charger termination. TD is checked during startup only and cannot be
changed during operation. See the TD section in this datasheet for a description of the
behavior when termination is disabled. TD is internally pulled down to VSS with ~285 kΩ.
Do not leave TD unconnected to ensure proper operation.
ISET
16
16
I/O
Fast Charge Current Programming Input. Connect a 590 Ω to 3 kΩ resistor from ISET to
VSS to program the fast charge current level. Charging is disabled if ISET is left
unconnected. While charging, the voltage ISET reflects the actual charging current and can
be used to monitor charge current. See the Charge Current Translator section of this
datasheet for more details.
Thermal
Pad
–
--
–
There is an internal electrical connection between the exposed thermal pad and the VSS
pin of the device. The thermal pad must be connected to the same potential as the VSS pin
on the printed circuit board. Do not use the thermal pad as the primary ground input for the
device. VSS must be connected to ground at all times.
DESCRIPTION
Table 1. EN1/EN2 Settings
8
EN2
EN1
0
0
100 mA. USB100 mode
0
1
500 mA. USB500 mode
1
0
Set by external resistor from ILIM to VSS
1
1
Standby (USB suspend mode)
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MAXIMUM INPUT CURRENT INTO IN
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
bq24072T
bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
SIMPLIFIED BLOCK DIAGRAM
250mV
VO(SC1)
V BAT
OUT-SC1
t DGL(SC2)
OUT- SC2
Q1
IN
OUT
EN2
Short Detect
225mV
Precharge
VIN-LOW
USB100
USB5 00
ISET
2.25V
Fastcharge
TJ
ILIM
VREF- ILIM
USB-susp
TJ(REG)
Short Detect
V DPPM
V O(REG)
Q2
VOUT
EN2
EN1
V BAT (REG)
BAT
VBAT
V OUT
CHARGEPUMP
SYSOFF
40mV
Supplement
V LOWV
225mV)
V BAT(SC)
tDGL(RCH)
tDGL2(LOWV)
VIN
tDGL1(LOWV)
tDGL(TE RM)
V RCH
VIN
BAT-SC
V BAT + VIN-DT
tDGL(NO-IN)
tDGL(PGOOD)
V UVLO
VCOLD
TS
t DGL(TS)
Charge Control
V HOT
V OVP
tBLK(OVP)
EN1
EN2
USB Suspend
CE
Halt timers
CHG
V IPRECHG
VICHG
V ISET
Reset timers
PGOOD
Dynamically
Controlled
Oscillator
Fast- Charge
Timer
TMR
Timer fault
Pre- Charge
Timer
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
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bq24072T
bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
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TYPICAL CHARACTERISTICS
VIN = 6V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
ADAPTER PLUG-IN
BATTERY CONNECTED
RLOAD = 10Ω
VIN
BATTERY DETECTION
BATTERY INSERTED
5 V/div
VCHG
BATTERY DETECTION
BATTERY REMOVED
5 V/div
VCHG
5 V/div
Charging Initiated
1 A/div
500 mV/div
VBAT
3.6 V
VPGOOD
500 mA/div
IBAT
IBAT
IBAT
5 V/div
2 V/div
VBAT
4 ms/div
1 A/div
Battery Inserted
VBAT
Battery Detection Mode
2 V/div
Battery
Removed
Battery Detection Mode
400 ms/div
400 ms/div
Figure 1.
Figure 2.
Figure 3.
ENTERING AND EXITING
DPPM MODE
ILOAD = 25 mA TO 250 mA,
ICHARGE = 300 mA
ENTERING AND EXITING BATTERY
SUPPLEMENT MODE
ILOAD = 25mA TO 750mA
bq24075T, bq24079T
ENTERING AND EXITING BATTERY
SUPPLEMENT MODE
RLOAD = 20Ω TO 4.5Ω
bq24072T
200 mA/div
IOUT
500 mA/div
VOUT
5.5 V
500 mV/div
IBAT
200 mA/div
IOUT
5.5 V
1 A/div
IOUT
IOUT
Supplement Mode
500 mA/div
IBAT
Supplement Mode
VOUT
3.825 V
500 mV/div
IBAT
VBAT
4.1 V
500 mA/div
200 mV/div
VBAT
3.6 V
Tracking to VBAT +225 mV
1 ms/div
2 ms/div
2 ms/div
Figure 4.
Figure 5.
Figure 6.
CHARGER ON/OFF USING CE
OVP FAULT
VIN = 5.5V TO 8.5V
SYSTEM ON/OFF WITH INPUT
CONNECTED
VIN = 6V
VCE
VCHG
10
VOUT
4.3 V
VBAT
4.2 V
1 V/div
Mandatory Precharge
500 mA/div
200 mV/div
VOUT
5.5 V
2 V/div
VBAT
4V
500 mA/div
IBAT
500 mA/div
10 ms/div
40 ms/div
Figure 7.
Figure 8.
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5 V/div
VSYSOFF
2 V/div
5 V/div
VBAT
3.6 V
IBAT
VIN
5 V/div
IBAT
400 ms/div
Figure 9.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
bq24072T
bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
TYPICAL CHARACTERISTICS (continued)
VIN = 6V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
SYSTEM ON/OFF WITH INPUT
NOT CONNECTED
VIN = 0V
VSYSOFF
DROPOUT VOLTAGE
vs
TEMPERATURE
THERMAL REGULATION
600
0.7
500
0.6
IL = 1 A
IBAT - mA
VBAT
4V
2 V/div
VOUT
Battery Powering
System
Dropout Voltage - VIN-VOUT
5 V/div
400
300
200
System Power Off
IBAT
500 mA/div
100
0.3
0.2
120
125
130
135
Temperature - oC
140
0
145
0
Figure 11.
Figure 12.
DROPOUT VOLTAGE
vs
TEMPERATURE
NO INPUT SUPPLY
bq24072T
OUTPUT REGULATION VOLTAGE
vs
BATTERY VOLTAGE
bq24072T
OUTPUT REGULATION VOLTAGE
vs
TEMPERATURE
4.6
3.80
VIN = 5 V
IL = 1 A
VBAT = 3 V
60
VBAT = 3.9 V
40
VO - Output Voltage - V
VO - Output Voltage - V
3.76
4.2
4
3.8
3.6
3.4
125
VIN = 5 V,
VBAT = 3.5 V,
IL = 1 A
3.78
4.4
100
80
25
100
50
75
TJ - Junction Temperature - °C
Figure 10.
120
Dropout Voltage - VBAT-VOUT
0.4
0.1
4 ms/div
0
0.5
3.74
3.72
3.70
3.68
3.66
3.64
20
3.2
0
3
3.62
0
50
75
100
25
TJ - Junction Temperature - °C
125
Figure 13.
2
2.5
3
3.5
4
VBAT - Battery Voltage - V
4.5
Figure 14.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
3.60
0
25
50
75
100
125
TJ - Junction Temperature - °C
Figure 15.
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11
bq24072T
bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VIN = 6V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
BAT REGULATION VOLTAGE
vs
TEMPERATURE
bq24075T
OUTPUT REGULATION VOLTAGE
vs
TEMPERATURE
VIN = 6 V,
IL = 1 A
5.70
VBAT - Regulation Voltage - V
VO - Output Voltage - V
5.65
5.60
5.55
5.50
5.45
5.40
5.35
4.210
4.11
4.205
4.105
VBAT - Regulation Voltage - V
5.75
BATTERY REGULATION VOLTAGE
vs
TEMPERATURE
bq24079T
4.200
4.195
4.190
4.185
4.1
4.095
4.09
4.085
5.30
5.25
0
25
50
75
100
TJ - Junction Temperature - °C
125
4.180
0
15
20
0
30
25
5
10
15
20
25
TJ - Junction Temperature - °C
Figure 16.
Figure 17.
Figure 18.
OVERVOLTAGE PROTECTION
THRESHOLD
vs
TEMPERATURE
INPUT CURRENT LIMIT
vs
INPUT VOLTAGE
FASTCHARGE CURRENT
vs
BATTERY VOLTAGE
30
1.05
800
RISET = 900 W
RILIM
6.6 V
IBAT - Fast Charge Current - A
700
6.65
ILIM - Input Current - mA
VOVP - Output Voltage Threshold - V
10
TJ - Junction Temperature - °C
6.70
VI Rising
6.60
6.55
VI Falling
6.50
600
500
USB500
400
300
200
USB100
1.03
1.01
0.99
0.97
100
6.45
0
0
25
50
75
100
TJ - Junction Temperature - °C
Figure 19.
12
4.08
5
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125
0.95
5
6
7
8
9
VI - Input Voltage - V
10
3
Figure 20.
3.2
3.6
3.8
4
3.4
VBAT - Battery Voltage - V
4.2
Figure 21.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
bq24072T
bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
TYPICAL CHARACTERISTICS (continued)
VIN = 6V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
FASTCHARGE CURRENT
vs
BATTERY VOLTAGE
FASTCHARGE CURRENT
vs
BATTERY VOLTAGE
31.5
105
310
RISET = 3 kW
RISET = 900 W
104
300
295
290
285
RISET = 3 kW
31
103
IBAT - Precharge Current - A
305
IBAT - Precharge Current - A
IBAT - Fast Charge Current - A
PRECHARGE CURRENT
vs
BATTERY VOLTAGE
102
101
100
99
98
97
30.5
30
29.5
29
96
280
28.5
95
3
3.2
3.4
3.6
3.8
4
VBAT - Battery Voltage - V
4.2
2
2.2
2.4
2.6
2.8
3
VBAT - Battery Voltage - V
Figure 22.
Figure 23.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): bq24072T bq24075T bq24079T
2
2.2
2.4
2.6
2.8
VBAT - Battery Voltage - V
3
Figure 24.
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13
bq24072T
bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
www.ti.com
APPLICATION CIRCUITS
R4
1.5 kW
R5
1.5 kW
SYSTEM
IN
C1
1µF
GND
CHG
DC+
PGOOD
Adaptor
OUT
C2
4.7µF
VSS
HOST
bq24075T
bq24079T
R8
100 kW
EN2
EN1
TS
SYSOFF
CE
BAT
T MR
TEMP
ISET
PACK +
C3
4.7 µF
ILIM
R6
10 kW
R7
13.2 kW
PACK -
R1
46.8 kW
R2
1.18 kW
R3
1.13 kW
NOTE: VIN = UVLO to VOVP, IFASTCHG = 800mA, IIN(MAX) = 1.35A, Battery Temperature Charge Range = 0°C to 50°C, 6.25
hour Fastcharge Safety Timer
Figure 25. Using the bq24075T/bq24079T to Disconnect the Battery from the System
14
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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
R5
1.5 kW
R4
1.5 kW
DC+
PGOOD
Adaptor
IN
C1
1 mF
GND
CHG
SYSTEM
OUT
C2
4.7 mF
VSS
HOST
bq24072T
EN2
R8
100 kW
EN1
TS
TD
CE
BAT
C3
4.7 mF
R7
13.2 kW
PACK-
R1
46.4 kW
ISET
PACK+
TMR
TEMP
ILM
R6
10 kW
R2
1.18 kW
R3
1.13 kW
Figure 26. Using bq24072T in a Host Controlled Charger Application
DETAILED FUNCTIONAL DESCRIPTION
The bq2407x devices are integrated Li-Ion linear chargers and system power path management devices targeted
at space-limited portable applications. The device powers the system while simultaneously and independently
charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for
proper charge termination and enables the system to run with a defective or absent battery pack. It also allows
instant system turn-on even with a totally discharged battery. The input power source for charging the battery
and running the system can be an AC adapter or a USB port. The devices feature Dynamic Power Path
Management (DPPM), which shares the source current between the system and battery charging, and
automatically reduces the charging current if the system load increases. When charging from a USB port, the
input dynamic power management (VIN-DPM) circuit reduces the input current if the input voltage falls below a
threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to
supplement the system current requirements when the adapter cannot deliver the peak system currents.
UNDERVOLTAGE LOCKOUT (UVLO)
The bq2407X family remains in power down mode when the input voltage at the IN pin is below the undervoltage
threshold (UVLO). During the power down mode the host commands at the control inputs (CE, EN1 and EN2)
are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs, CHG and PGOOD,
are high impedance. The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power
down mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
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bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
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POWER ON
When VIN exceeds the UVLO threshold, the bq2407xT powers up. While VIN is below VBAT + VIN(DT), the host
commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to
OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for
overload conditions on OUT.
Once VIN rises above VBAT + VIN(DT), PGOOD is driven low to indicate the valid power status and the CE, EN1,
and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If
SYSOFF is high, FET Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload
conditions on OUT.
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)] all internal
timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins.
If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a
short circuit at OUT. When VOUT is above VSC, the FET Q1 switches to the current limit threshold set by EN1,
EN2 and RILIM and the device enters into the normal operation. During normal operation, the system is powered
by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as
well as the input voltage conditions.
/ PGOOD= Hi-Z
/CHG = Hi-Z
BATTFET ON
VUVLO <VIN <VOVP
and
VIN >V BAT +VIN (DT)
No
Yes
/ PGOOD= Low
Yes
EN1=EN2=1
No
Yes
ILIM or ISET short ?
No
Begin Startup
IIN (MAX ) 100mA
Yes
VOUT short?
No
Input Current
Limit set by EN1
and EN2
No
/CE = Low
Yes
Begin Charging
Figure 27. Startup Flow Diagram
16
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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
OVERVOLTAGE PROTECTION (OVP)
The bq2407xT accepts inputs up to 28V without damage. Additionally, an overvoltage protection (OVP) circuit is
implemented that shuts off the internal LDO and discontinues charging when VIN > VOVP for a period longer than
tDGL(OVP). When in OVP, the system output (OUT) is connected to the battery and PGOOD is high impedance.
Once the OVP condition is removed, a new power on sequence starts (See the POWER ON section). The safety
timers are reset and a new charge cycle will be indicated by the CHG output.
DYNAMIC POWER-PATH MANAGEMENT
The bq2407xT features an OUT output that powers the external load connected to the battery. This output is
active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a
source connected to IN to charge the battery and a battery source only.
INPUT SOURCE CONNECTED (ADAPTER or USB)
With a source connected, the dynamic power-path management (DPPM) circuitry of the bq2407xT monitors the
input current continuously. The OUT output for the bq24075T/ 79T is regulated to a fixed voltage (VO(REG)). For
the bq24072T, OUT is regulated to 225mV above the voltage at BAT. If the BAT voltage is less than 3.2V, OUT
is clamped to 3.4V. This allows for proper startup of the system load even with a discharged battery. The current
into IN is shared between charging the battery and powering the system load at OUT. The bq2407xT has internal
selectable current limits of 100mA (USB100) and 500mA (USB500) for charging from USB ports, as well as a
resistor-programmable input current limit.
The bq2407xT is USB IF compliant for the inrush current testing. The USB spec allows up to 10mF to be hard
started, which establishes 50mC as the maximum inrush charge value when exceeding 100mA. The input current
limit for the bq2407xT prevents the input current from exceeding this limit, even with system capacitances greater
than 10mF. Note that the input capacitance to the device must be selected small enough to prevent a violation
(<10mF), as this current is not limited. Figure 28 demonstrates the startup of the bq2407xT and compares it to
the USB-IF specification.
Figure 28. USB-IF Inrush Current Test
The input current limit selection is controlled by the state of the EN1 and EN2 pins as shown in Table 1. When
using the resistor-programmable current limit, the input current limit is set by the value of the resistor connected
from the ILIM pin to VSS, and is given by the equation:
IIN-MAX = KILIM / RILIM
The input current limit is adjustable up to 1.5A. The valid resistor range is 1.07 kΩ to 7.5kΩ.
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bq24075T, bq24079T
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When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement
modes are used to maintain the system load. Figure 30 illustrates an example of the DPPM and supplement
modes. These modes are explained in detail in the following sections.
Input DPM Mode (VIN-DPM)
The bq2407xT utilizes the VIN-DPM mode for operation from current-limited USB ports. When EN1 and EN2 are
configured for USB100 (EN2=0, EN1=0) or USB500 (EN2=0, EN2=1) modes, the input voltage is monitored. If
VIN falls to VIN-DPM, the input current limit is reduced to prevent the input voltage from falling further. This prevents
the bq2407xT from crashing poorly designed or incorrectly configured USB sources. Figure 29 shows the
VIN-DPM behavior to a current limited source. In this figure, the input source has a 400mA current limit and the
device is in USB500 mode (EN1=1, EN2=0).
Figure 29. VIN-DPM Mode
DPPM Mode
When the sum of the charging and system load currents exceeds the maximum input current (programmed with
EN1, EN2 and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin falls to VDPPM, the
bq2407xT enters DPPM mode. In this mode, the charging current is reduced as the OUT current increases in
order to maintain the system output. Battery termination is disabled while in DPPM mode.
Battery Supplement Mode
While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the
programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the
VBSUP1 threshold, the battery supplements the system load. The battery stops supplementing the system load
when the voltage at OUT rises above the VBSUP2 threshold.
During supplement mode, the battery supplement current is not regulated (BAT-FET is fully on), however there is
a short circuit protection circuit built in. demonstrate supplement mode. If during battery supplement mode, the
voltage at OUT drops VO(SC2) below the BAT voltage, the OUT output is turned off if the overload exists after
tDGL(SC2). The short circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to
restart. If the short circuit remains, OUT is turned off and the counter restarts. Battery termination is disabled
while in supplement mode.
18
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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
5.5 V
Figure 30. bq24075T, '79T DPPM and Battery Supplement Modes
(VOREG = 5.5V, VBAT = 3.6V)
IOUT
1200 mA
900 mA
A
400 mA
0 mA
IIN
900 mA
500 mA
IBAT
0 mA
500 mA
0 mA
-300 mA
3.8 V
3.7 V
~3.6 V
DPPM Loop Active
VOUT
Supplement Mode
Figure 31. bq24072T DPPM and Battery Supplement Modes
(VOREG = VBAT + 225mV, VBAT = 3.6V)
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bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
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INPUT SOURCE NOT CONNECTED
When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode the
current into OUT is not regulated, similar to Battery Supplement Mode, however the short circuit circuitry is
active. If the OUT voltage falls below the BAT voltage by 250mV for longer than tDGL(SC2), OUT is turned off. The
short circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short
circuit remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload
condition is removed.
BATTERY CHARGING
Set CE low to initiate battery charging. First, the device checks for a short-circuit on the BAT pin by sourcing
IBAT(SC) to the battery and monitoring the voltage. When the BAT voltage exceeds VBAT(SC), the battery charging
continues. The battery is charged in three phases: conditioning pre-charge, constant current fast charge (current
regulation) and a constant voltage tapering (voltage regulation). In all charge phases, an internal control loop
monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is
exceeded.
Figure 32. Typical Charging Cycle
Figure 32 illustrates a normal Li-Ion charge cycle using the bq2407xT. In the pre-charge phase, the battery is
charged at with the pre-charge current (IPRECHG). Once the battery voltage crosses the VLOWV threshold, the
battery is charged with the fast-charge current (ICHG). As the battery voltage reaches VBAT(REG), the battery is held
at a constant voltage of VBAT(REG) and the charge current tapers off as the battery approaches full charge. When
the battery current reaches ITERM, the CHG pin indicates charging done by going high-impedance.
Note that termination detection is disabled whenever the charge rate is reduced because of the actions of the
thermal loop, the DPPM loop or the VIN-DPM loop.
The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by
the equation
ICHG = KISET / RISET
The charge current limit is adjustable up to 1.5A. The valid resistor range is 590Ω to 3 kΩ. Note that if ICHG is
programmed as greater than the input current limit, the battery will not charge at the rate of ICHG, but at the
slower rate of IIN(MAX) (minus the load current on the OUT pin, if any). In this case, the charger timers will be
proportionately slowed down.
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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
CHARGE CURRENT TRANSLATOR
When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET
input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external
charge current programming resistor, RISET, generates an analog voltage that can be monitored by an external
host to calculate the current sourced from BAT.
VISET = ICHARGE / 400 × RISET
Begin Charging
Battery short detected
?
Yes
No
Start Precharge
/CHG= Low
No
No
V BAT > VLOWV
tPRECHARGE
Elapsed?
Yes
End Charge
Flash/CHG
Start Fastcharge
ICHARGE set by ISET
No
No
IBAT < ITERM
tFASTCHARGE
Elapsed?
Yes
End Charge
Flash/CHG
Charge Done
/CHG= Hi-Z
TD= Low
(’72, ’73 Only)
(’74, ’75= YES)
No
Yes
Termination Reached
BATTFET Off
Wait for VBAT < V RCH
No
VBAT < V RCH
Yes
Run Battery Detection
No
Battery Detected
?
Yes
Figure 33. Battery Charging Flow Diagram
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bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
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BATTERY DETECTION AND RECHARGE
The bq2407xT automatically detects if a battery is connected or removed. Once a charge cycle is complete, the
battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run.
During battery detection, current (IBAT(DET)) is pulled from the battery for a duration tDET to see if the voltage on
BAT falls below VLOWV. If not, charging begins. If it does, then it indicates that the battery is missing or the
protector is open. Next, the precharge current is applied for tDET to close the protector if possible. If VBAT < VRCH,
then the protector is closed and charging is initiated. If VBAT > VRCH, then the battery is determined to be missing
and the detection routine continues.
TERMINATION DISABLE (TD Input, bq24072T)
The bq24072T contains a TD input that allows termination to be enabled/ disabled. Connect TD to a logic high to
disable charge termination. When termination is disabled, the device goes through the pre-charge, fast-charge
and CV phases, then remains in the CV phase. During the CV phase, the charger maintains the output voltage at
BAT equal to VBAT(REG), and charging current does not terminate. The charge current is set by ICHG or IINmax,
whichever is less. Battery detection is not performed. The CHG output is high impedance once the current falls
below ITERM and does not go low until the input power or CE are toggled. When termination is disabled, the
pre-charge and fast-charge safety timers are also disabled.
BATTERY DISCONNECT (SYSOFF Input)
The bq24075T and bq24079T feature a SYSOFF input that allows the user to turn the FET Q2 off and
disconnect the battery from the OUT pin. This is useful for disconnecting the system load from the battery,
factory programming where the battery is not installed or for host side impedance track fuel gauging, such as
bq27500, where the battery open circuit voltage level must be detected before the battery charges or discharges.
The CHG output remains low when SYSOFF is high. Connect SYSOFF to VSS, to turn Q2 on for normal
operation. SYSOFF is internally pulled to VBAT through ~5 MΩ resistor.
DYNAMIC CHARGE TIMERS (TMR Input)
The bq2407xT devices contain internal safety timers for the pre-charge and fast-charge phases to prevent
potential damage to the battery and the system. The timers begin at the start of the respective charge cycles.
The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated
using the following equation:
tPRECHG = KTMR × RTMR
tMAXCHG = 10 × KTMR × RTMR
Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.
Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally
to the charge current when the device enters thermal regulation.
1. During the fast charge phase, several events increase the timer durations.
2. The system load current activates the DPPM loop which reduces the available charging current
3. The input current is reduced because the input voltage has fallen to VIN-DPM
4. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)
During each of these events, the internal timers are slowed down proportionately to the reduction in charging
current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half
the frequency and the counter counts half as fast resulting in only one minute of "counting" time.
If the precharge timer expires before the battery voltage reaches VLOWV, the bq2407xT indicates a fault condition.
Additionally, if the battery current does not fall to ITERM before the fast charge timer expires, a fault is indicated.
The CHG output flashes at approximately 2 Hz to indicate a fault condition. The fault condition is cleared by
toggling CE or the input power, entering/ exiting USB suspend mode, or an OVP event.
STATUS INDICATORS (PGOOD, CHG)
The bq2407xT contains two open-drain outputs that signal its status. The PGOOD output signals when a valid
input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside
of this range, PGOOD is high impedance.
22
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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
The charge cycle after power-up, CE going low, or exiting OVP is indicated with the CHG output on (low - LED
on), whereas all refresh (subsequent) charges will result in the CHG output off (open – LED off). In addition, the
CHG signals timer faults by flashing at approximately 2Hz.
Table 2. PGOOD Status Indicator
INPUT STATE
PGOOD OUTPUT
VIN < VUVLO
Hi impedance
VUVLO < VIN < VIN(DT)
Hi impedance
VIN(DT) < VIN < VOVF
Low
VIN < VOVP
Hi impedance
Table 3. CHG Status Indicator
CHARGE STATE
Charging
Charging suspended by thermal loop, or DPPM loop
Safety timers expired
CHG OUTPUT
Low (for first charge cycle)
Flashing at 2 Hz
Charging done
Recharging after termination
IC disabled or no valid input power
Hi impedance
Battery absent
THERMAL REGULATION AND THERMAL SHUTDOWN
The bq2407xT contain a thermal regulation loop that monitors the die temperature. If the temperature exceeds
TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing
further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die temperature
increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the battery still powers
the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is turned on and the
device returns to thermal regulation. Continuous overtemperature conditions result in a "hiccup" mode. During
thermal regulation, the safety timers are slowed down proportionately to the reduction in current limit.
Note that this feature monitors the die temperature of the bq2407xT. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm and the LDO associated with OUT. A modified charge cycle with the thermal loop active is
shown in Figure 34. Battery termination is disabled during thermal regulation.
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bq24072T
bq24075T, bq24079T
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
PRECHARGE
THERMAL
REGULATION
www.ti.com
CC FAST
CHARGE
CV TAPER
DONE
VO(REG)
IO(CHG)
Battery Voltage
Battery Current
V(LOWV)
HI-z
I(PRECHG)
I(TERM)
TJ(REG)
IC Junction Temperature, TJ
Figure 34. Charge Cycle Modified by Thermal Loop
BATTERY PACK TEMPERATURE MONITORING
The bq2407xT features an external battery pack temperature monitoring input. The TS input connects to the NTC
thermistor in the battery pack to monitor battery temperature and prevent dangerous over-temperature
conditions. During charging, the voltage at TS is continuously monitored. If, at any time, the voltage at TS is
outside of the operating range (VCOLD to VHOT), charging is suspended. The timers maintain their values but
suspend counting. When the voltage measured at TS returns to within the operation window, charging is
resumed and the timers continue counting. When charging is suspended due to a battery pack temperature fault,
the CHG output remains low and continues to indicate charging.
VIN
R6 =
24
-1
VCOLD
1
1
+
R 7 RCOLD
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(1)
Copyright © 2009–2010, Texas Instruments Incorporated
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bq24075T, bq24079T
www.ti.com
SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
é 1
1 ù
VIN ´ RCOLD ´ RHOT ´ ê
ú
V
V
HOT û
ë COLD
R7 =
é V
ù
é V
ù
RHOT ´ ê IN - 1ú - RCOLD ´ ê IN - 1ú
ëVHOT
û
ëVCOLD
û
(2)
Where:
VCOLD = 0.25 X VIN
VHOT = 0.125 X VIN
RHOT is the expected thermistor resistance at the programmed hot threshold, RCOLD is the expected thermistor
resistance at the programmed cold threshold. If the value of R6 is less than 100kΩ, R3 must be added to protect
the IC from 28V inputs. If R6 is greater than 100kΩ, R8 does not need to be used.
Adapter
IN
R6
1
V COLD
TS
R8
PACK+
TEMP
+
Not necessary
in all
applications
VHOT
R7
PACK-
+
bq240xT
Figure 35. NTC Monitoring Function
For applications that do not require the TS monitoring function, set R6 = 200kΩ and R7 = 49.9kΩ to set the TS
voltage at a valid level and maintain charging.
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APPLICATION INFORMATION
bq2407xT CHARGER DESIGN EXAMPLE
Refer to Typical Application Circuits for Schematics of the Design Example.
Supply voltage = 5V
Fast charge current of approximately 800 mA; ISET – pin 16
Input Current Limit =1.35A; ILIM – pin 12
Safety timer duration, Fast-Charge = 6.25 hours; TMR – pin 14
Battery Temperature Sense = 10kΩ; NTC (103AT-2), 0°C to 50°C Operation
Program the Fast Charge Current (ISET):
RISET = KISET / ICHG
KISET = 890 AΩ; from the electrical characteristics table
RISET = 890AΩ / 0.8A = 1.1125 kΩ
Select the closest standard value, which for this case is 1.13kΩ. Connect this resistor between ISET (pin 16)
and VSS.
Program the Input Current Limit (ILIM)
RILIM = KILIM / IIN(MAX)
KILIM = 1600 AΩ; from the electrical characteristics table.
RISET = 1600AΩ / 1.35A = 1.19 kΩ
Select the closest standard value, which for this case is 1.18 kΩ. Connect this resistor between ILIM (pin 12)
and VSS.
Program 6.25-hour Fast-Charge Safety Timer (TMR)
RTMR = tMAXCHG / (10 × KTMR)
KTMR = 45 s/kΩ from the electrical characteristics table.
RTMR = (6.25 hr × 3600 s/hr) / (10 x 45 s/kΩ) = 46.8kΩ;
Select the closest standard value, which for this case is 46.4 kΩ. Connect this resistor between TMR (pin 2)
and VSS.
TS Function
Using a 10kΩ NTC thermistor in the battery pack (103AT-2). Connect a resistor divider from VIN to VSS with the
thermistor and TS connected to the center tap (R6 and R7 in typical application circuits).
RHOT = 4.086kΩ; 50°C threshold from NTC data sheet
RCOLD = 28.16 kΩ; 0°C threshold from NTC data sheet
VCOLD = 0.25 X VIN = 0.25 X 5V = 1.25V
VHOT = 0.125 X VIN = 0.125 X 5V = 0.625V
é 1
1 ù
1 ù
é 1
VIN ´ RCOLD ´ RHOT ´ ê
5 ´ 28160 ´ 4086 ´ ê
ú
V
V
1.25 0.625 úû
COLD
HOT û
ë
ë
R7 =
=
= 8.236k W
é VIN
ù
é VIN
ù
é 5
ù
é 5
ù
4086
1
28160
1
´
´
RHOT ´ ê
- 1ú - RCOLD ´ ê
- 1ú
ê 0.625 ú
ê 1.25 ú
ë
û
ë
û
ëVHOT
û
ëVCOLD
û
(3)
VIN
5
-1
-1
VCOLD
1.25
R6 =
=
= 19.14k W
1
1
1
1
+
+
8250 28160
R 7 RCOLD
(4)
Since the calculated values for R6 is less than 100kΩ, a 100kΩ resistor for R8 must be used. Choose the closest
standard values, which for this case are R6=8.25kΩ and R7 = 19.1kΩ.
For applications that do not require the TS monitoring function, set R6 = 200kΩ and R7 = 49.9kΩ to set the TS
voltage at a valid level and maintain charging.
26
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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
CHG and PGOOD LED Status: connect a 1.5kΩ resistor in series with a LED between OUT and CHG to
indicate charging status. Connect a 1.5kΩ resistor in series with a LED between OUT and PGOOD to indicate
when a valid input source is connected.
Processor Monitoring Status: connect a pullup resistor (on the order of 100 kΩ) between the processor power
rail and CHG and PGOOD
Termination Disable: connect TD high to disable termination. Connect TD low to enable termination.
System ON/OFF (SYSOFF): Connect SYSOFF high to disconnect the battery from the system load. Connect
SYSOFF low for normal operation.
SELECTING IN, OUT AND BAT CAPACITORS
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input, output and battery pins. Using the values shown on the application diagram, is recommended. After
evaluation of these voltage signals with real system operational conditions, one can determine if capacitance
values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast
high amplitude pulsed load applications. Note if designed high input voltage sources (bad adapters or wrong
adapters), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values
so a 16V capacitor may be adequate for a 30V transient (verify tested rating with capacitor manufacturer).
THERMAL PACKAGE
The bq2407xT family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should
be directly connected to VSS. Full PCB design guidelines for this package are provided in the application note
entitled: QFN/SON PCB Attachment Application Note. The most common measure of package thermal
performance is thermal impedance (qJA) measured (or modeled) from the chip junction to the air surrounding the
package surface (ambient).
The mathematical expression for qJA is: = (TJ – T) / P
Where:
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can influence the measurement and calculation of qJA include
Whether or not the device is board mounted
Trace size, composition, thickness, and geometry
Orientation of the device (horizontal or vertical)
Volume of the ambient air surrounding the device under test and airflow
Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage
increases to 3.4V within the first 2 minutes. The thermal time constant of the assembly typically takes a few
minutes to heat up so when doing maximum power dissipation calculations, 3.4V is a good minimum voltage to
use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the
PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of
time. The fast charge current will start to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from Equation 5 when a battery pack is being charged :
P = [VIN – VOUT] × IOUT + [VOUT – VBAT] × IBAT
(5)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop
is always active.
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Half-Wave Adapters
Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the
battery voltage during part of the cycle. To enable operation with adapters under those conditions, the bq2407xT
family keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep mode. This
feature enables use of external adapters using 50 Hz networks. The input must not drop below the UVLO voltage
for the charger to work properly. Thus, the battery voltage should be above the UVLO to help prevent the input
from dropping out. Additional input capacitance may be needed.
When the input is between VUVLO and VIN(DT), the device enters sleep mode. After entering sleep mode for 20ms
the internal FET connection between the IN and OUT pin is disabled and pulling the input to ground will not
discharge the battery, other than the leakage on the BAT pin. If one has a full 1000mAHr battery and the leakage
is 10mA, then it would take 1000mAHr/10mA = 100000 hours (11.4 years) to discharge the battery. The battery ‘s
self discharge is typically 5 times higher than this
Layout Tips
1. To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2407xT, with
short trace runs to both IN, OUT and GND (thermal pad).
2. All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
3. The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the
maximum charge current in order to avoid voltage drops in these traces
The bq2407xT family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is also
the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full PCB
design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment
Application Note.
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SLUS937A – DECEMBER 2009 – REVISED APRIL 2010
REVISION HISTORY
Note: Page numbers of current version may differ from previous versions.
Changes from Original (December 2009) to Revision A
Page
•
Added bq24072T device to data sheet header ..................................................................................................................... 1
•
Added bq24072T feature bullet ............................................................................................................................................ 1
•
Added "bq24072T" to graphic entity ..................................................................................................................................... 1
•
Added bq24072T spec. to Ordering Info table ...................................................................................................................... 2
•
Added bq24072T to VO(REG)Elec. Char. spec. ....................................................................................................................... 4
•
Added bq24072T to VDPPM Elec. Char. spec. ....................................................................................................................... 4
•
Added "bq24072T" to VBAT(REG) Elec. Char. spec. ................................................................................................................ 5
•
Added bq24072T Pin Diagram ............................................................................................................................................. 7
•
Added graphic entity for bq24072T Host Controlled Charger application .......................................................................... 15
•
Added graphic entity for bq24072T DPPM and Battery Supplement Modes ..................................................................... 19
•
Added bq24072T Termination Disable (TD) description .................................................................................................... 22
•
Added Termination Disable operation procedure. .............................................................................................................. 27
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