TI SN74CBT1G66DBVR

SN74CBT1G66
SINGLE FET BUS SWITCH
SCDS110A – JULY 2000 – REVISED OCTOBER 2000
D
D
DBV OR DCK PACKAGE
(TOP VIEW)
5-Ω Switch Connection Between Two Ports
CMOS-Compatible Control Input Levels
A
B
GND
description
1
5
VCC
4
OE
2
3
The SN74CBT1G66 features a single high-speed
line switch. The switch is disabled when the
output-enable (OE) input is low.
ORDERING INFORMATION
40°C to 85°C
–40°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SOP (SOT-23) – DBV
Tape and reel
SN74CBT1G66DBVR
TOP-SIDE
MARKING‡
S66_
SOP (SC-70) – DCK
Tape and reel
SN74CBT1G66DCKR S6_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
‡ The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION
H
A port = B port
L
Disconnect
PRODUCT PREVIEW
FUNCTION TABLE
INPUT
OE
logic diagram (positive logic)
1
2
A
B
4
OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2000, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74CBT1G66
SINGLE FET BUS SWITCH
SCDS110A – JULY 2000 – REVISED OCTOBER 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
PRODUCT PREVIEW
MIN
MAX
UNIT
VCC
VI/O
Supply voltage
2.3
5.5
V
I/O port voltage
0
VCC
V
VIH
VIL
High-level input voltage
VIN
Control input voltage
tr/tf
0.7 × VCC
Low-level input voltage
V
0.3 × VCC
V
5.5
V
0
VCC = 2.3 V to 3.6 V
VCC = 4.5 V to 5.5 V
Control input transition rise/fall time
10
ns
5
TA
Operating free-air temperature
–40
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
II
II = –18 mA
0 ≤ VI ≤ 5.5 V
Ioff
IOZ
0 ≤ A or B ≤ 4.5 V
0 ≤ A or B ≤ VCC
VI = 0
VI = 2.3 V
ron
ICC
Ci
VCC
4.5 V
II = 8 mA
2
UNIT
V
±1
µA
VCC = 0
2.3 V to 5.5 V
10
µA
±10
µA
23V
2.3
3V
VI = 0,
VI = 2.4 V,
II = 30 mA
II = 15 mA
4.5 V
VI = 4.5 V,
VI = VCC or GND
II = 30 mA
IO = 0
• DALLAS, TEXAS 75265
MAX
–1.2
II = 24 mA
POST OFFICE BOX 655303
TYP‡
0 to 5.5 V
VI = 0
VI = 3 V
Cio
‡ All typical values are at VCC = 5 V, TA = 25°C.
MIN
5.5 V
5
12
13
30
4
9
10
20
3
7
5
12
7
15
10
Ω
µA
0
pF
5V
pF
SN74CBT1G66
SINGLE FET BUS SWITCH
SCDS110A – JULY 2000 – REVISED OCTOBER 2000
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted)
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
tpd
A or B
B or A
ns
ten
tdis
OE
A or B
ns
OE
A or B
ns
PARAMETER
MIN
MAX
MIN
MAX
MIN
UNIT
MAX
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
PRODUCT PREVIEW
PARAMETER MEASUREMENT INFORMATION
3V
Output
Control
LOAD CIRCUIT
1.5 V
1.5 V
0V
tPLZ
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
3.5 V
1.5 V
1.5 V
VOL
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
tPHZ
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 7 V
(see Note B)
1.5 V
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
PACKAGE OPTION ADDENDUM
www.ti.com
19-Feb-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
SN74CBT1G66DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
Call TI
Call TI
SN74CBT1G66DCKR
PREVIEW
SC70
DCK
5
3000
TBD
Call TI
Call TI
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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