HOLTEK HT16515_10

HT16515
1/4 to 1/12 Duty VFD Controller
Features
· Logic voltage: 3.0V~5.5V
· 4 LED output ports
· High-voltage output: VDD-35V max.
· No external resistors necessary for driver output
(provides PMOS open-drain and pull-low resistor
output)
· Multiple display
(16-segment & 12-digit to 24-segment & 4-digit)
· Serial interface with MCU (CLK, CS, DI, DO)
· 16´2 matrix key scanning
· 44-pin QFP/LQFP packages
· 8 steps dimmer circuit
Applications
· Consumer products panel function control
· Other similar applications for panel function control
· Industrial measuring instrument panel function control
General Description
HT16515 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/4 to 1/12 duty factor. It
consists of 16 segment output lines, 4 grid output lines,
8 segment/grid output drive lines, 4 LED output ports, a
control circuit, a display memory, and a key scan circuit.
Serial data inputs to the HT16515 through a three-line
serial interface. This VFD controller/driver is an ideal
MCU peripheral device.
Block Diagram
C o m m a n d D e c o d e r
D I
D O
C L K
S e r ia l I/F
D is p la y R A M
2 4 - B it ´ 1 2 W o r d s
2 4 - B it
O u tp u t L a tc h
2 4
1 6
C S
O S C
S e g 1 /K S 1
S e g 1 6 /K S 1 6
8
O S C
T im in g G e n e r a to r
K e y S c a n
K e y D a ta M e m o ry
(2 ´ 1 6 )
D a ta
S e le c to r
1 2 - B it
S h ift R e g is te r
K e y 0 ~ K e y 1
4 - B it L a tc h
8
M u ltip le x e d
D r iv e r
S e g 1 7 /G r id 1 2
S e g 2 4 /G r id 5
8
4
1 2
G r id
D r iv e r
G r id 1
G r id 4
D im m in g C ir c u it
L E D 0 ~ L E D 3
Rev. 1.70
S e g m e n t
D r iv e r
V D D
1
V S S
V E E
May 7, 2010
HT16515
Pin Assignment
1 1 /K
1 2 /K
1 3 /K
1 4 /K
1 5 /K
1 6 /K
E
1
2
3
4
5
6
S e g 1 0 /K S 1 0
S e g
S e g
S e g
S e g
S e g
S e g
S 1
S 1
S 1
S 1
S 1
S 1
V E
S e g 1 7 /G r id 1 2
S e g 1 8 /G r id 1 1
S e g 1 9 /G r id 1 0
3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3
9
3 4
2 2
S e g 9 /K S 9
8
3 5
2 1
7
3 6
2 0
6
3 7
S e g 2 4 /G r id 5
G r id 4
G r id 3
3 8
S e g 8 /K S 8
S e g 7 /K S 7
S e g 6 /K S 6
S e g
S e g
S e g
S e g
2 0 /G
2 1 /G
2 2 /G
2 3 /G
r id
r id
r id
r id
G r id
G r id
V D
V S
1 9
3 9
4 0
2
1
D
1 6
1 5
4 2
1 4
4 3
1 3
1
3
2
4
5
6
7
8
S e g
S e g
S e g
S e g
S e g
V D D
V S S
1 7
4 1
4 4
S
1 8
H T 1 6 5 1 5
4 4 Q F P -A /L Q F P -A
9
1 0 1 1
1 2
5 /K
4 /K
3 /K
2 /K
1 /K
S 5
S 4
S 3
S 2
S 1
K E Y 1
3
2
1
0
K E Y 0
C S
C L K
D I
D O
O S C
L E D
L E D
L E D
L E D
Pad Assignment
S e g 2 0 /G r id 9
S e g 2 1 /G r id 8
S e g 2 2 /G r id 7
S e g 2 3 /G r id 6
S e g 2 4 /G r id 5
G r id 4
G r id 3
G r id 2
G r id 1
V D D
V S S
4 4
L E D 0
1
L E D 1
2
4 3
3 8
3 5
3 6
3 7
S e g 1 9 /G r id 1 0
3 2
S e g 1 8 /G r id 1 1
3 1
S e g 1 7 /G r id 1 2
3 0
V E E
3 4
3
L E D 2
L E D 3
3 9
4 0
4 1
4 2
3 3
4
(0 ,0 )
O S C
5
2 9
S e g 1 6 /K S 1 6
D O
6
2 8
S e g 1 5 /K S 1 5
7
2 7
S e g 1 4 /K S 1 4
2 6
S e g 1 3 /K S 1 3
2 5
S e g 1 2 /K S 1 2
2 4
S e g 1 1 /K S 1 1
2 3
S e g 1 0 /K S 1 0
D I
C L K
8
C S
9
K E Y 0
1 0
K E Y 1
1 1
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
1 2
S e g 9 /K S 9
S e g 8 /K S 8
S e g 7 /K S 7
S e g 6 /K S 6
S e g 5 /K S 5
S e g 4 /K S 4
S e g 3 /K S 3
S e g 2 /K S 2
S e g 1 /K S 1
V D D
V S S
Chip Size: 2335mm ´ 1855mm
* The IC substrate should be connected to VSS in the PCB layout artwork.
Rev. 1.70
2
May 7, 2010
HT16515
Pad Coordinates
Unit: mm
Pad No.
X
Y
Pad No.
X
Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
-962.50
-962.50
-962.50
-962.50
-962.50
-962.50
-962.50
-962.50
-962.50
-962.50
-962.50
-689.60
-460.45
-344.25
-242.85
-141.45
-40.05
61.35
162.75
264.15
365.55
466.95
600.00
495.00
380.20
275.20
-107.20
-235.60
-366.00
-471.00
-576.00
-681.00
-786.00
-772.45
-595.30
-595.30
-595.30
-595.30
-595.30
-595.30
-595.30
-595.30
-595.30
-595.30
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
834.10
834.10
834.10
834.10
834.10
834.10
834.10
987.30
987.30
987.30
987.30
610.30
508.90
407.50
306.10
204.70
103.30
1.90
-99.50
-200.90
-317.10
-624.50
-754.00
-652.60
-551.20
-449.80
-348.40
-247.00
-145.60
0.50
130.50
382.05
734.05
594.40
594.40
594.40
594.40
594.40
594.40
594.40
594.40
594.40
594.40
756.80
Pin Description
Pin No.
Pin Name
I/O
Description
1~4
LED3~LED0
O
LED driver output ports. This is a CMOS output pin and maximum driving
current up to +20mA.
5
OSC
I
Connected to an external resistor or an RC oscillator circuit.
6
DO
O
Data output pin, output serial data at falling edge of shift clock, starting from
the lower bit. This is N-ch open-drain output pin.
7
DI
I
Data input pin, input serial data at rising edge of shift clock, starting from the
lower bit.
8
CLK
I
Clock input pin. Reads serial data at the rising edge, and outputs data at the
falling edge.
9
CS
I
Initializes serial interface at the rising or falling edge of the HT16515. Then
it waits to receive a command. Data input after CS has fallen is processed,
current processing is stopped, and the serial interface is initialized. While
CS is high, CLK is ignored.
10, 11
Key0, Key1
I
Key-in data input to these pins are latched at the end of the display cycle.
12, 44
VSS
¾
Negative power supply, ground
13, 43
VDD
¾
Positive power supply
14~29
Seg1/KS1~Seg16/KS16
O
High voltage output, segment output pins, dual function as key source. This
is PMOS open-drain and pull-low resistor output.
30
VEE
¾
VFD power supply
31~38
Seg17/Grid12~
Seg24/Grid5
O
High voltage output, these pins are selectable for segment or grid output.
This is PMOS open-drain and pull-low resistor output.
39~42
Grid4~Grid1
O
High voltage output, grids output pin. This is PMOS open-drain and pull-low
resistor output.
Rev. 1.70
3
May 7, 2010
HT16515
Approximate Internal Connections
N M O S O U T
P M O S O U T
V
D D
V
E E
C M O S O U T
V
D D
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+6.0V
Operating Temperature...........................-25°C to 75°C
Input Voltage..............................VSS-0.3V to VDD+0.3V
Storage Temperature ............................-50°C to 125°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol
Parameter
VDD
Logic Supply Voltage
VEE
VFD Supply Voltage
fOSC
Oscillation Frequency
RPL
Output Pull-low Resistor
IDD
Operating Current
IOL
Driver Leakage Current
IOL1
LED Sink Current
IOH1
LED Source Current
IOH21
Segment 1~16 Source Current
IOH22
Segment 17~24, Grid 1~4
Source Current
IOL3
DO Sink Current
VIH
²H² Input Voltage
Rev. 1.70
Ta=25°C, VEE=VDD-35V
Test Conditions
Min.
Typ.
Max.
Unit
3
3.3
3.6
V
4.5
5
5.5
V
0
¾
VDD-35
V
ROSC=82kW
350
500
650
kHz
Driver output
40
65
120
kW
3.3V No load, VFD display off,
5V data output =00H
¾
¾
3
¾
¾
5
3.3V
-5
¾
5
-10
¾
10
10
¾
¾
20
¾
¾
¾
¾
-1.5
¾
¾
-3
¾
¾
-1.5
¾
¾
-3
¾
¾
-7.5
¾
¾
-15
2
¾
¾
4
¾
¾
0.7VDD
¾
VDD
VDD
Conditions
3.3V
¾
5V
¾
3.3V
5V
3.3V
5V
5V
3.3V
5V
3.3V
5V
3.3V
5V
3.3V
5V
3.3V
5V
¾
VO=VDD-35V, VFD driver off
VOL=1V, LED0~LED3
VOH=0.9VDD, LED0~LED3
VOH=VDD-2V
VOH=VDD-2V
VOL=0.4V
¾
¾
4
mA
mA
mA
mA
mA
mA
mA
V
May 7, 2010
HT16515
Symbol
VIL
Parameter
²L² Input Voltage
Test Conditions
VDD
Conditions
¾
¾
3.3V
VH
Hysteresis Voltage
VOH1
High-level Output Voltage
5V
3.3V LED0~LED3, IOH1=-1.5mA
5V
VOL1
Low-level Output Voltage
VOL2
Low-level Output Voltage
CLK, DIN, CS
LED0~LED3, IOL1=20mA
3.3V DO, IOL2=2mA
5V
Typ.
Max.
Unit
0
¾
0.3VDD
V
¾
0.17
¾
¾
0.35
¾
0.9VDD
¾
VDD
V
0
¾
1
V
0
¾
0.4
V
LED0~LED3, IOH1=-3mA
3.3V LED0~LED3, IOL1=10mA
5V
Min.
DO, IOL2=4mA
A.C. Characteristics
Symbol
Parameter
tPHL
Logic Supply Voltage
tPLH
Ta=25°C
Test Conditions
Min.
Typ.
Max.
3.3V
¾
¾
600
5V CLK®DO
3.3V CL=15pF, RL=10kW
¾
¾
300
¾
¾
600
¾
¾
300
¾
¾
4
VDD
Conditions
5V
3.3V
tr1
CL=300pF, S1~S16
¾
¾
2
¾
¾
1
¾
¾
0.5
3.3V
¾
¾
240
¾
¾
120
¾
¾
0.5
¾
¾
1.0
¾
¾
15
800
¾
¾
400
¾
¾
2
¾
¾
1
¾
¾
200
¾
¾
100
¾
¾
200
¾
¾
100
¾
¾
3.3V CLK rising edge to CS rising
5V edge
2
¾
¾
1
¾
¾
3.3V CLK rising edge to CLK falling
5V edge
2
¾
¾
1
¾
¾
5V
tf
Fall Time
fCLK
Clock Frequency
Ci
Input Capacitance
tCW
Clock Pulse Width
tSW
Strobe Pulse Width
tSU
Data Setup Time
th
Data Hold Time
tCS
Clock-Strobe Time
tW
Wait Time
Rev. 1.70
5V
CL=300pF, Sn, Gn
3.3V
Duty=50%
5V
3.3V
¾
5V
3.3V
¾
5V
3.3V
¾
5V
3.3V
¾
5V
3.3V
¾
5V
5
Unit
ns
3.3V C =300pF, G1~G4
L
5V S17/G12~S24/G5
Rise Time
tr2
V
ms
ms
MHz
pF
ns
us
ns
ns
ms
ms
May 7, 2010
HT16515
Functional Description
The data of each key is stored as illustrated below, and
is read with the read command, starting from the least
significant bit.
Display RAM and Display Mode
The static display RAM stores the data transmitted from
an external device to the HT16515 through a serial interface. The contents of the RAM are directly mapped to
the contents of the VFD driver. Data in the RAM can be
accessed through the data setting, address setting and
display control commands. It is assigned as addresses
in 8-bit unit as follows:
S E G 1
0 0
0 3
0 6
0 9
0 C
0 F
1 2
1 5
1 8
1 B
1 E
2 1
b 0
H
S E G 4
0 0
0 3
L
0 6
L
0 9
L
0 C
L
0 F
L
1 2
L
1 5
L
1 8
L
1 B
L
1 E
L
2 1
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
S E G 8
0
0
U
0
U
0
U
0
U
1
U
1
U
1
U
1
U
1
U
1
U
2
U
U
H
1 H
4 H
7 H
A H
D H
0 H
3 H
6 H
9 H
C H
F H
2 H
S E G 1 2
0 1
L
0 4
L
0 7
L
0 A
L
0 D
L
1 0
L
1 3
L
1 6
L
1 9
L
1 C
L
1 F
L
2 2
L
H
H
H
H
H
H
H
H
H
H
H
H
S E G 1 6
0 2
U
0 5
U
0 8
U
0 B
U
0 E
U
1 1
U
1 4
U
1 7
U
1 A
U
1 D
U
2 0
U
2 3
U
H
H
H
H
H
H
H
H
H
H
H
H
S E G 2 0
0 2
L
0 5
L
0 8
L
0 B
L
0 E
L
1 1
L
1 4
L
1 7
L
1 A
L
1 D
L
2 0
L
2 3
L
S E G 2
U
D
H U
D
H U
D
H U
D
H U
D
H U
D
H U
D
H U
D
H U
D
H U
D
H U
D
H U
D
H
4
K e y 1 K e y 2
K e y 1 K e y 2
K e y 1 K e y 2
K e y 1 K e y 2
S 1 /K 1
S 2 /K 2
S 3 /K 3
S 4 /K 4
S 5 /K 5
S 6 /K 6
S 7 /K 7
S 8 /K 8
S 9 /K 9
S 1 0 /K 1 0
S 1 1 /K 1 1
S 1 2 /K 1 2
S 1 3 /K 1 3
S 1 4 /K 1 4
S 1 5 /K 1 5
S 1 6 /K 1 6
b 0
b 2
b 4
b 6
b 1
b 7
The LED port is of the CMOS output configuration.
Data is written to the LED port with the write command,
starting from the least significant bit. In our application
(see application circuits), the user adopts an internal
NMOS device to a driver LED component by connecting
VDD. When a bit of this port is 0, the corresponding LED
lights up; when the bit is 1, the LED turns off. The data of
bits 4 through 7 are ignored.
M S B
L S B
b 3
Dimming Control
b 2
b 1
b 0
L E D
L E D
L E D
L E D
D o n 't c a r e
HT16515 provides an 8-step dimmer function on display
by controlling the 3-bit binary command code. The full
pulse width of grid signal is divided into 16 uniform sections by PWM (pulse width modulation) technology.
S 6 /
K 6
S 7 /
K 7
3
· Display mode setting commands
These commands initialize the HT16515 and select
the number of segments and the number of grids
(1/4~1/12 duty, 16 to 24 segments).
When these commands are executed, the display is
forcibly turned off, and key scanning is also stopped.
To resume display, the display command ²ON² must
be executed. If the same mode is selected, nothing
happens.
The key matrix is made up of a 16´2 matrix, as shown
below.
S 5 /
K 5
2
The first 1 byte input to the HT16515 through the DI pin
after the CS pin has fallen, is regarded as a command. If
CS is set high while commands/data are transmitted,
serial communication is initialized, and the commands/
data being transmitted are not valid (however, the commands/data previously transmitted remains valid).
The key matrix scans the series key states at each level
of the key strobe signal (Seg1/K1~Seg16/K16) output of
the HT16515. The key strobe signal outputs are
time-multiplexed signals from Seg1/K1~Seg16/K16. The
states of inputs K0 and K1 are sampled by strobe signal
Seg1/K1~Seg16/K16 and latched into the register.
S 4 /
K 4
1
Commands set the display mode and status of the VFD
driver.
Key Matrix and Key-Input Data Storage RAM
S 3 /
K 3
0
Commands
The 16 uniform sections available form an 8-step dimmer via 3-bit binary code. The 8-step dimmer includes
1/16, 2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16.
The 1/16 pulse width indicates minimum lightness. The
14/16 pulse width represents maximum lightness (Refer
to the display control command).
S 2 /
K 2
b 5
LED Port
IG 1
IG 2
IG 3
IG 4
IG 5
IG 6
IG 7
IG 8
IG 9
IG 1 0
IG 1 1
IG 1 2
b 3 b 4
b 7
X X H U
X X H L
L o w e r
H ig h e r
4 b its
4 b its
S 1 /
K 1
b 3
R e a d in g S e q u e n c e
S 8 /
K 8
S 9 /
K 9
S 1 0 /
K 1 0
S 1 1 /
K 1 1
S 1 2 /
K 1 2
S 1 3 /
K 1 3
S 1 4 /
K 1 4
S 1 5 /
K 1 5
S 1 6 /
K 1 6
K E Y 1
K E Y 2
Rev. 1.70
6
May 7, 2010
HT16515
M S B
L S B
0
0
b 3
b 2
b 1
b 0
0 0 0
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
0 1 1
0 1 1
1 x x
D o n 't c a r e
Note:
S e
0 :
1 :
0 :
1 :
0 :
1 :
0 :
1 :
x :
le c ts
4
5
6
7
8
9
1 0
1 1
1 2
D
d ig
d ig
d ig
d ig
d ig
d ig
d ig
d ig
d ig
is p
its
its
its
its
its
its
its
its
its
la y
, 2 4
, 2 3
, 2 2
, 2 1
, 2 0
, 1 9
, 1 8
, 1 7
, 1 6
M o
s e
s e
s e
s e
s e
s e
s e
s e
s e
d e
g m
g m
g m
g m
g m
g m
g m
g m
g m
e n
e n
e n
e n
e n
e n
e n
e n
e n
ts
ts
ts
ts
ts
ts
ts
ts
ts
Power-on status: 12-digit, 16 segment mode is selected.
· Data setting commands
These commands set the data write and data read modes.
M S B
L S B
0
b 3
1
b 2
b 1
b 0
S e
0 0
0 1
1 0
1 1
D o n 't c a r e
ts d a ta
: W r ite
: W r ite
: R e a d
: D o n 't
w r ite
d a ta
d a ta
k e y d
c a re
a n d re a d m o d e
to d is p la y m e m o r y
to L E D p o rt
a ta
A d d r e s s in c r e m e n t m o d e s e ttin g s ( d is p la y m e m o r y )
0 : In c r e m e n ts a d d r e s s a fte r d a ta h a s b e e n w r itte n
1 : F ix e s a d d r e s s
T e s t m o d e s e ttin g s
0 : N o rm a l m o d e
1 : T e s t m o d e , u s e r d o n 't u s e
Note: power-on status: normal mode operation and address increment mode are set.
· Address setting commands
These commands set the address of the display memory.
M S B
1
L S B
b 5
1
b 4
b 3
b 2
b 1
b 0
A d d re s s (0 0 H ~ 2 3 H )
If address 24H or higher is set, data is ignored until a valid address is set.
Note: power-on status: the address is set to 00H.
· Display control commands
M S B
1
L S B
b 3
0
D o n 't c a r e
b 2
b 1
b 0
S e
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
ts d im
0 : S e
1 : S e
0 : S e
1 : S e
0 : S e
1 : S e
0 : S e
1 : S e
m in g
t p u ls
t p u ls
t p u ls
t p u ls
t p u ls
t p u ls
t p u ls
t p u ls
q u
e w
e w
e w
e w
e w
e w
e w
e w
a n tity
id th to
id th to
id th to
id th to
id th to
id th to
id th to
id th to
1 /1 6
2 /1 6
4 /1 6
1 0 /1
1 1 /1
1 2 /1
1 3 /1
1 4 /1
6
6
6
6
6
T u r n s o n /o ff d is p la y
0 : D is p la y o ff ( k e y s c a n c o n tin u e s )
1 : D is p la y o n
Note: power-on status: 1/16 pulse width is set and the display is turned off. Key scanning will be stopped during
power-on status.
Rev. 1.70
7
May 7, 2010
HT16515
Timing Diagrams
tr1
( tr2 )
tf
9 0 %
S n /G n
1 0 %
tS
W
C S
tC
W
tC
tC
W
S
C L K
tS
U
th
D I
tP
tP
H L
L H
D O
Key Scanning and Display Timing
K e y s c a n d a ta
S n /K n o u tp u t
D ig it 1
D ig it 2
D ig it 3
D ig it n
D ig it 1
G 1 o u tp u t
G 2 o u tp u t
1 /1 6 tD
IS P
G 3 o u tp u t
G n o u tp u t
t @ 5 0 0 m s
1 fra m e = T ´ (n + 1 )
Note: One cycle of key scanning consists of two frames, and data of 16´2 matrixes is stored in the RAM.
Rev. 1.70
8
May 7, 2010
HT16515
Serial Communication Format
· Reception (command/data write)
C S
C L K
1
2
b 0
D I
3
b 1
7
b 2
8
b 6
b 7
· Transmission (data read)
C S
1
C L K
2
b 0
D I
3
b 1
4
b 2
5
b 3
6
b 4
7
b 5
8
b 6
tW
1
2
3
4
5
6
b 7
b 0
D O
A d a ta r e a d c o m m a n d is s e t
b 1
b 2
b 3
b 4
b 5
D a ta is r e a d
Be sure to connect an external pull-high resistor to this pin (1kW to 10kW).
Note: 1. When data is read, a wait time ²tW² of 1ms is necessary at 5V.
2. When data is read, a wait time ²tW² of 2ms is necessary at 3V.
· Updating display memory by incrementing address
C S
C L K
D I
C o m m a n d 1
C o m m a n d 2
C o m m a n d 3
D a ta 1
D a ta n
C o m m a n d 4
Note: Command 1: sets display mode
Command 2: sets data
Command 3: sets address
Data 1 to n: transfers display data (36 bytes max.)
Command 4: controls display
· Updating specific addresses
C S
C L K
D I
C o m m a n d 1
C o m m a n d 2
D a ta
C o m m a n d 2
D a ta n
Note: Command 1: sets data
Command 2: sets address
Data: display data
Rev. 1.70
9
May 7, 2010
HT16515
Application Circuits
R 7
R 8
D 1
O S C
R
K e y 0 K e y 1 S 1 /K 1
D 2
S 2 /K 2
D 3
S 3 /K 3
D 4
S 4 /K 4
D 5
S 5 /K 5
D 6
S 6 /K 6
D 7
S 7 /K 7
D 8
S 8 /K 8
D 9
S 9 /K 9
D 1 0
D 1 1
D 1 2
D 1 3
D 1 4
D 1 5
D 1
S
S
S
S
S
S
S
S
S
S 1
S 1
S 1
S 1
S 1
S 1
S 1
6
1
2
3
4
5
6
7
8
9
0
1
3
2
V F D
4
E f
5
6
S 1 0 /K 1 0 S 1 1 /K 1 1 S 1 2 /K 1 2 S 1 3 /K 1 3 S 1 4 /K 1 4 S 1 5 /K 1 5 S 1 6 /K 1 6
O S C
V D D
(5 V )
M C U
S 1 7 /G 1 2 ~ S 2 4 /G 5
C S
C L K
D I
H T 1 6 5 1 5
G 1 ~ G 4
R 1
D O
L E D 0
V D D
(5 V )
R 2
L E D 1
R 3
L E D 2
R 4
L E D 3
V
V E E
R 5
C
+ 5 V
Note:
V S S
D D
-3 0 V
ROSC=82kW for oscillator resistor
R1=1~10kW for external pull-high resistor
R2~R6=750W~1.2kW
R7~R8=10kW for external pull-low resistor
D1~D16=1N4001
Ef=Filament voltage for VFD
C=0.1mF~1.0mF
Rev. 1.70
10
May 7, 2010
HT16515
Package Information
44-pin QFP (10mm´10mm) Outline Dimensions
H
C
D
G
2 3
3 3
I
3 4
2 2
L
F
A
B
E
1 2
4 4
K
a
J
1
Symbol
A
Dimensions in inch
Min.
Nom.
Max.
0.512
¾
0.528
B
0.390
¾
0.398
C
0.512
¾
0.528
D
0.390
¾
0.398
E
¾
0.031
¾
F
¾
0.012
¾
G
0.075
¾
0.087
H
¾
¾
0.106
I
0.010
¾
0.020
J
0.029
¾
0.037
K
0.004
¾
0.008
L
¾
0.004
¾
a
0°
¾
7°
Symbol
Rev. 1.70
1 1
Dimensions in mm
Min.
Nom.
Max.
A
13.00
¾
13.40
B
9.90
¾
10.10
C
13.00
¾
13.40
D
9.90
¾
10.10
E
¾
0.80
¾
F
¾
0.30
¾
G
1.90
¾
2.20
H
¾
¾
2.70
I
0.25
¾
0.50
J
0.73
¾
0.93
K
0.10
¾
0.20
L
¾
0.10
¾
a
0°
¾
7°
11
May 7, 2010
HT16515
44-pin LQFP (10mm´10mm) (FP3.2mm) Outline Dimensions
H
C
D
G
2 3
3 3
I
3 4
2 2
F
A
B
E
1 2
4 4
K
a
J
1
Symbol
Dimensions in inch
Min.
Nom.
Max.
A
0.512
0.520
0.528
B
0.390
0.394
0.398
C
0.512
0.520
0.528
D
0.390
0.394
0.398
E
¾
0.031
¾
F
¾
0.012
¾
G
0.053
0.055
0.057
H
¾
¾
0.063
I
0.004
¾
0.010
J
0.041
0.047
0.053
K
0.004
¾
0.008
a
0°
¾
7°
Symbol
Rev. 1.70
1 1
Dimensions in mm
Min.
Nom.
Max.
A
13.00
13.20
13.40
B
9.90
10.00
10.10
C
13.00
13.20
13.40
D
9.90
10.00
10.10
E
¾
0.80
¾
F
¾
0.30
¾
G
1.35
1.40
1.45
H
¾
¾
1.60
I
0.10
¾
0.25
J
1.05
1.20
1.35
K
0.10
¾
0.25
a
0°
¾
7°
12
May 7, 2010
HT16515
Holtek Semiconductor Inc. (Headquarters)
No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: 886-3-563-1999
Fax: 886-3-563-1189
http://www.holtek.com.tw
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Tel: 886-2-2655-7070
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46729 Fremont Blvd., Fremont, CA 94538
Tel: 1-510-252-9880
Fax: 1-510-252-9885
http://www.holtek.com
Copyright Ó 2010 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.
Rev. 1.70
13
May 7, 2010