DATA SHEET MOS INTEGRATED CIRCUIT PD16312 1/4- to 1/11-DUTY FIPTM (VFD) CONTROLLER/DRIVER The PD16312 is a FIP (fluorescent Indicator Panel, or Vacuum Fluorescent Display) controller/driver that is driven on a 1/4- to 1/11 duty factor. It consists of 11 segment output lines, 6 grid output lines, 5 segment/grid output drive lines, a display memory, a control circuit, and a key scan circuit. Serial data is input to the PD16312 through a three-line serial interface. This FIP controller/driver is ideal as a peripheral device for a single-chip microcomputer. FEATURES • Multiple display modes (11-segment & 11-digit to 16-segment & 4-digit) • Key scanning (6 4 matrix) • Dimming circuit (eight steps) • High-voltage output (VDD 35 V max). • LED ports (4 chs., 20 mA max). • General-purpose input port (4 bits) • No external resistors necessary for driver outputs (P-ch open-drain + pull-down resistor output) • Serial interface (CLK, STB, DIN, DOUT) ORDERING INFORMATION Part Number Package PD16312GB-3B4 44-pin plastic QFP ( 10) Document No. IC-3307 (1st edition) Date Published March 1997 P Printed in Japan © 1993 PD16312 BLOCK DIAGRAM Command decoder Dimming circuit DIN Seg1 DOUT Serial I/F Display memeory 16 bits × 11 words CLK 16-bit 16 output latch Segment driver 11 Seg11 5 STB R OSC Timing generator key scan Key data memory (4 × 6) Key1 to Key4 SW1 to SW4 11-bit shift register 5 4 Seg16/Grid7 Grid1 6 Grid driver 4-bit latch 4-bit latch Seg12/Grid11 5 11 4 VDD (+5 V) LED1 LED4 Key data memory (4 × 6) 2 Data selector Multip lexed diver VDD VSS VEE (0 V) (−30 V) Grid6 PD16312 VSS LED1 LED2 LED3 LED4 VDD Grid1 Grid2 Grid3 Grid4 43 42 41 40 39 38 37 36 35 34 Seg13/Grid10 VSS 7 27 VEE CLK 8 26 Seg12/Grid11 STB 9 25 Seg11 KEY1 10 24 Seg10 KEY2 11 23 Seg9 22 28 Seg8 6 21 DIN Seg7 Seg14/Grid9 20 29 Seg6/KS6 5 19 DOUT Seg5/KS5 Seg15/Grid8 18 30 Seg4/KS4 4 17 SW4 Seg3/KS3 Seg16/Grid7 16 31 Seg2/KS2 3 15 SW3 Seg1/KS1 Grid6 14 32 VDD 2 13 Grid5 KEY4 SW2 OSC 33 12 1 KEY3 SW1 44 PIN CONFIGURATION (Top View) Use all power pins. 3 PD16312 Pin Function Symbol Pin Name Pin No Description DIN Data input 6 Input serial data at rising edge of shift clock, starting from the low order bit. DOUT Data output 5 Output serial data at the falling edge of the shift clock, starting from low order bit. This is N-ch open-drain output pin. STB Strobe 9 Initializes serial interface at the rising or falling edge of the PD16312. It then waits for reception of a command. Data input after STB has fallen is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While STB is high, CLK is ignored. CLK Clock input 8 Reads serial data at the rising edge, and outputs data at the falling edge. OSC Oscillator pin 44 Connect resistor to this pin to determine the oscillation frequency to this pin. Seg1/KS1 to Seg6/KS6 High-voltage output 15 to 20 Segment output pins (Dual function as key source) Seg7 to Seg11 High-voltage output (segment) 21 to 25 Segment output pins Grid1 to Grid6 High-voltage output (grid) 37 to 32 Grid output pins Seg12/Grid11 to Seg16/Grid7 High-voltage output (segment/grid) LED1 to LED4 LED output 42 to 39 CMOS output. +20 mA max. KEY1 to KEY4 Key data input 10 to 13 Data input to these pins is latched at the end of the display cycle. SW1 to SW4 Switch input 1 to 4 These pins constitute a 4-bit general-purpose input port. VDD Logic power 14, 38 5 V 10 % VSS Logic ground 7, 43 VEE Pull-down level 4 26, 28 to 31 27 These pins are selectable for segment or grid driving. Connect this pin to system GND. VDD 35 V max. PD16312 Display RAM Address and Display Mode The display RAM stores the data transmitted from an external device to the PD16312 through the serial interface, and is assigned addresses as follows, in 8 bits unit: Seg1 Seg4 Seg8 Seg12 Seg16 00HL 00HU 01HL 01HU DIG1 02HL 02HU 03HL 03HU DIG2 04HL 04HU 05HL 05HU DIG3 06HL 06HU 07HL 07HU DIG4 08HL 08HU 09HL 09HU DIG5 0AHL 0AHU 0BHL 0BHU DIG6 0CHL 0CHU 0DHL 0DHU DIG7 0EHL 0EHU 0FHL 0FHU DIG8 10HL 10HU 11HL 11HU DIG9 12HL 12HU 13HL 13HU DIG10 14HL 14HU 15HL 15HU DIG11 b0 b3 b4 b7 xxHL xxHU Lower 4 bits Higher 4 bits 5 PD16312 Key Matrix and Key-Input Data Storage RAM The key matrix is made up of a 6 4 matrix, as shown below. KEY1 KEY2 KEY3 Seg6/KS6 Seg5/KS5 Seg4/KS4 Seg3/KS3 Seg2/KS2 Seg1/KS1 KEY4 The data of each key is stored as illustrated below, and is read with the read command, starting from the least significant bit. KEY1…KEY4 KEY1…KEY4 Seg1/KS1 Seg2/KS2 Seg3/KS3 Seg4/KS4 Seg5/KS5 Seg6/KS6 b0------------ b3 b4 ------------b7 Reading sequence LED Port Data is written to the LED port with the write command, starting from the least port’s least significant bit. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED truns off. The data of bits 5 through 8 are ignored. MSB − LSB − − − b3 b2 b1 b0 LED1 Don't care LED2 LED3 LED4 On power application, all LEDs are unlit. 6 PD16312 SW Data SW data is read with the read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0. MSB 0 LSB 0 0 0 b3 b2 b1 b0 SW1 SW2 SW3 SW4 Commands Commands set the display mode and status of the FIP driver. The first 1 byte input to the PD16312 through the DIN pin after the STB pin has fallen is regarded as a command. If STB is set high while commands/data are transmitted, serial communication is initialized, and the commands/data being transmitted are invalid (however, the commands/data previously transmitted remain valid). (1) Display mode setting commands These commands initialize the PD16312 and select the number of segments and the number of grids (1/4 to 1/11 duty, 11 segments to 16 segments). When these commands are executed, the display is forcibly turned off, and key scanning is also stopped. To resume display, the display command “ON” must be executed. If the same mode is selected, however, nothing happens. MSB 0 LSB 0 − − − Irrelevant b2 b1 b0 Display mode settings 000 : 4 digits, 16 segments 001 : 5 digits, 16 segments 010 : 6 digits, 16 segments 011 : 7 digits, 15 segments 100 : 8 digits, 14 segments 101 : 9 digits, 13 segments 110 : 10 digits, 12 segments 111 : 11 digits, 11 segments On power application, the 11-digit, 11-segment mode is selected. 7 PD16312 (2) Data setting commands These commands set data write and data read modes. MSB 0 LSB 1 − − b3 b2 b1 b0 Data write and read mode settings 00 : Write data to display memory 01 : Write data to LED port 10 : Read key data 11 : Read SW data Irrelevant Address increment mode settings (display memory) 0 : Increments address after data has been written 1 : Fixes address. Test mode settings 0 : Normal operation 1 : Test mode On power application, the normal operation and address increment modes are set. (3) Address setting commands These commands set an address of the display memory. MSB 1 LSB 1 − b4 b3 b2 b1 b0 Address (00H - 15H) If address 16H or higher is set, data is ignored, until a valid address is set. On power application, the address is set to 00H. 8 PD16312 (4) Display control commands MSB 1 LSB 0 − − b3 b2 b1 b0 Irrelevant Dimming quantity settings 000 : Set pulse width to 1/16. 001 : Set pulse width to 2/16. 010 : Set pulse width to 4/16. 011 : Set pulse width to 10/16. 100 : Set pulse width to 11/16. 101 : Set pulse width to 12/16. 110 : Set pulse width to 13/16. 111 : Set pulse width to 14/16. Turns on/off display. Note 0 : Display off (key scan continues ) 1 : Display on On power application, the 1/16 pulse width is set and the display is turned off. Note On power application, key scanning is stopped. 9 PD16312 Key Scanning and Display Timing TDISP = 500 µ s SEG output DIG1 Key scan data DIG2 DIG3 DIGn 1 2 3 4 5 6 G1 G2 1/16 TDISP G3 Gn 1 frame = TDISP × (n + 1) One cycle of key scanning consists of one frame, and data in a 6 4 matrix is stored in RAM. 10 DIG1 PD16312 Serial Communication Format Reception (command/data write) If data continues STB DIN CLK b0 b1 b2 1 2 3 b6 b7 7 8 Transmission (data read) STB DIN b0 CLK 1 b1 2 b2 3 b3 4 b4 5 b5 6 b6 7 b7 8 tWAITNote DOUT 1 2 b0 A data read command is set. 3 b1 b2 4 b3 5 6 b4 b5 Data is read. Because the DOUT pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor to this pin (1 k to 10 k). Note When data is read, a wait time tWAIT of 1 s is necessary since the rising of the eighth clock that has set the command, until the falling of the first clock that has read the data. 11 PD16312 ABSOLUTE MAXIMUM RATINGS (Ta = 25 C, VSS = 0 V) PARAMETER SYMBOL RATINGS UNIT Logic Supply Voltage VDD 0.5 to +7.0 V Driver Supply Voltage VEE VDD +0.5 to VDD 40 V Logic Input Voltage VI1 0.5 to VDD +0.5 V FIP Driver Output Voltage VO2 VEE 0.5 to VDD +0.5 V LED Driver Output Current IO1 +25 mA FIP Driver Output Current IO2 40 (grid) 15 (segment) mA Power Dissipation PD Operating Ambient temperature Topt 40 to +85 C Storage Temperature Tstg 65 to +150 C Note 800 mW Note Derate at 6.4 mW/C at Ta = 25 C or higher. RECOMMENDED OPERATING RANGE (Ta = 20 to 70 C, VSS = 0 V) PARAMETER SYMBOL MIN. TYP. MAX. UNIT Logic Supply Voltage VDD 4.5 5 5.5 V High-Level Input Voltage VIH 0.7 VDD VDD V Low-Level Input Voltage VIL 0 0.3 VDD V Driver Supply Votlage VEE 0 VDD 35 V TEST CONDITIONS Maximum power consumption PMAX. = FIP driver dissipation + RL dissipation + LED driver dissipation + dynamic power consumption Where segment current = 3 mA, grid current = 15 mA, and LED current = 20 mA, FIP driver dissipation = number of segments 6 + number of grids/(number of grids + 1) 30 (mW) RL dissipation = (VDD VEE) /50 (number of segments + 1) (mW) 2 LED driver dissipation = number of LEDs 20 (mW) Dynamic power consumption = VDD 5 (mW) Example Where VEE = 25 V, VDD = 5 V, and in 16-segment and 6-digit modes, FIP driver dissipation = 16 6 + 6/7 30 = 122 RL dissipation = 30 /50 17 = 306 2 LED driver dissipation = 4 20 = 80 Dynamic power consumption = 5 5 = 25 Total 553 mW 12 PD16312 ELECTRICAL CHARACTERISTICS (Ta = 20 to +70 C, VDD = 4.5 to 5.5 V, VSS = 0 V, VEE = VDD 35 V) PARAMETER SYMBOL MIN. High-Level Output Voltage VOH1 0.9 VDD Low-Level Output Voltage VOL1 Low-Level Output Voltage VOL2 High-Level Output Current IOH21 3 mA VO = VDD 2 V, Seg1 to Seg11 High-Level Output Current IOH22 15 mA VO = VDD 2 V, Grid1 to Grid6 Seg12/ Grid11 to Seg16/ Grid7 Driver Leakage Current IOLEAK 10 A VO = VDD 35 V, driver off 150 K Driver output 1 A VI = VDD or VSS Output Pull-Down Resistor RL Input Current II High-Level Input Voltage VIH Low-Level Input Voltage VIL Hysteresis Voltage VH Dynamic Current Consumption 50 TYP. 100 MAX. UNIT TEST CONDITIONS V LED1 LED4, IOH1 = 1 mA 1 V LED1 LED4, IOL1 = 20 mA 0.4 V DOUT, IOL2 = 4 mA 0.7 VDD V 0.3 VDD 0.35 IDDdyn V V 5 mA CLK, DIN, STB Under no load, display off SWITCHING CHARACTERISTICS (Ta = 20 to +70 C, VDD = 4.5 to 5.5 V, VEE = 30 V) PARAMETER SYMBOL MIN. TYP. MAX. UNIT Oscillation Frequency tOSC 350 500 650 kHz Propagation Delay Time tPLZ 300 ns CLK DOUT tPZL 100 ns CL = 15 pF, RL = 10 k tTZH1 2 s CL = 300 pF tTZH2 0.5 s Fall Time tTHZ 120 s Maximum Clock Frequency fmax. Rise Time Input Capacitance 1 MHz CI 15 TEST CONDITIONS R = 51 k Seg1 to Seg11 Grid1 to Grid6, Seg12/Grid11 to Seg16/Grid7 CL = 300 pF, Segn, Gridn Duty = 50 % pF TIMING CONDITIONS (Ta = 20 to 70 C, VDD = 4.5 to 5.5 V) PARAMETER SYMBOL MIN. Clock Pule Width PWCLK 400 ns Strobe Pulse Width PWSTB 1 s Data Setup Time tSETUP 100 ns Data Hold Time tHOLD 100 ns tCLK-STB 1 s CLK STB tWAIT 1 s CLK CLK Clock-Strobe Time Wait Time TYP. MAX. UNIT TEST CONDITIONS Note Note Refer to page 11. 13 PD16312 Switching Characteristic Waveforms fOSC OSC 50 % PWSTB STB PWCLK PWCLK tSETUP tHOLD tCLK-STB CLK DIN tPZL tPLZ DOUT tTHZ 90 % Sn/Gn 10 % 14 tTZH PD16312 Applications Updating display memory by incrementing address STB CLK DIN Command 1 Command 2 Command 3 Data 1 Data n Command 4 Command 1: sets display mode Command 2: sets data Command 3: sets address Data 1 to n: transfers display data (22 bytes max.) Command 4: controls diplay Updating specific address STB CLK DIN Command 1 Command 2 Data Command 2 Data Command 1: sets data Command 2: sets address Data: display data 15 PD16312 RECOMMENDED SOLDERING CONDITIONS The following conditions (see table below) must be met when soldering this product. Please consult with our sales offices in cae other soldering process is used, or in case soldering is done under different conditions. PC16312GB-3B4 Soldering process Soldering conditions Symbol Infrared ray reflow Peak package’s surface temperature: 235 C or below, Reflow time: 30 seconds or below (210 C or higher), Number of reflow process: 2, Exposure limit*: None IR35-00-2 VPS Peak package’s surface temperature: 215 C or below, Reflow time: 40 seconds or below (200 C or higher), Number of reflow process: 2, Exposure limit*: None VP15-00-2 Wave soldering Solder temperature: 260 C or below, Flow time: 10 seconds or below Number of flow process: 1, Exposure limit*: None WS60-00-1 Partial heating method Terminal temperature: 300 C or below, Flow time 10 seconds or below, Exposure limit*: None * Exposure limit before soldering after dry-pack package is opened. Storage conditions: 25 C and relative humidity at 65 % or less. Note Do not apply more than a single process at once, except for “Partial heating method”. 16 PPD16312 44 PIN PLASTIC QFP ( 10) A B 23 22 33 34 detail of lead end C D S R Q 12 11 44 1 F G J H I M K M P N L NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition. ITEM MILLIMETERS INCHES A 13.6±0.4 0.535 +0.017 –0.016 B 10.0±0.2 0.394 +0.008 –0.009 C 10.0±0.2 0.394 +0.008 –0.009 D 13.6±0.4 0.535 +0.017 –0.016 F 1.0 0.039 G 1.0 0.039 H 0.35±0.10 0.014 +0.004 –0.005 I 0.15 0.006 J 0.8 (T.P.) 0.031 (T.P) K 1.8±0.2 0.071 +0.008 –0.009 L 0.8±0.2 0.031 +0.009 –0.008 M 0.15 +0.10 –0.05 0.006 +0.004 –0.003 N P Q R S 0.10 2.7 0.1±0.1 5˚±5˚ 3.0 MAX. 0.004 0.106 0.004±0.004 5˚±5˚ 0.119 MAX. P44GB-80-3B4-3 17 PD16312 [MEMO] 18 PD16312 [MEMO] 19 PD16312 FIPTM is a trademark of NEC Corporation. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96. 5