TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 150-mW STEREO AUDIO POWER AMPLIFIER FEATURES • • • • • • • DESCRIPTION 150-mW Stereo Output PC Power Supply Compatible – Fully Specified for 3.3-V and 5-V Operation – Operation to 2.5 V Pop Reduction Circuitry Internal Midrail Generation Thermal and Short-Circuit Protection Surface-Mount Packaging – PowerPAD™ MSOP – SOIC Pin Compatible With TPA122, LM4880, and LM4881 (SOIC) The TPA6111A2 is a stereo audio power amplifier packaged in either an 8-pin SOIC or an 8-pin PowerPAD™ MSOP package capable of delivering 150 mW of continuous RMS power per channel into 16-Ω loads. Amplifier gain is externally configured by means of two resistors per input channel and does not require external compensation for settings of 0 to 20 dB. THD+N, when driving a 16-Ω load from 5 V, is 0.03% at 1 kHz, and less than 1% across the audio band of 20 Hz to 20 kHz. For 32-Ω loads, the THD+N is reduced to less than 0.02% at 1 kHz, and is less than 1% across the audio band of 20 Hz to 20 kHz. For 10-kΩ loads, the THD+N performance is 0.005% at 1 kHz, and less than 0.5% across the audio band of 20 Hz to 20 kHz. D OR DGN PACKAGE (TOP VIEW) VO1 IN1− BYPASS GND 1 8 2 7 3 6 4 5 VDD VO2 IN2− SHUTDOWN TYPICAL APPLICATION CIRCUIT VDD 8 RF Audio Input VDD C(S) VDD/2 RI 2 IN 1− 3 BYPASS 6 IN 2− CI VO1 1 − + C(C) C(BYP) Audio Input RI CI From Shutdown Control Circuit 5 VO2 7 − + SHUTDOWN C(C) Bias Control 4 RF Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2004, Texas Instruments Incorporated TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE OPTIONS PACKAGED DEVICES TA SMALL OUTLINE (1) (D) MSOP (1) (DGN) –40°C to 85°C TPA6111A2D TPA6111A2DGN (1) MSOP SYMBOLIZATION TI AJA The D and DGN package is available in left-ended tape and reel only (e.g., TPA6111A2DR, TPA6111A2DGNR). Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION BYPASS 3 I Tap to voltage divider for internal mid-supply bias supply. Connect to a 0.1-µF to 1-µF low ESR capacitor for best performance. GND 4 I GND is the ground connection. IN1– 2 I IN1– is the inverting input for channel 1. IN2– 6 I IN2– is the inverting input for channel 2. SHUTDOWN 5 I Puts the device in a low quiescent current mode when held high VDD 8 I VDD is the supply voltage terminal. VO1 1 O VO1 is the audio output for channel 1. VO2 7 O VO2 is the audio output for channel 2. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT VDD Supply voltage VI Input voltage 6V –0.3 V to VDD + 0.3 V Continuous total power dissipation internally limited TJ Operating junction temperature range –40°C to 150°C Tstg Storage temperature range –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) 260°C Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE (1) 2 TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW DGN 2.14 W (1) 17.1 mW/°C 1.37 W 1.11 W See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD on page 33 of the before-mentioned document. TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 RECOMMENDED OPERATING CONDITIONS MIN MAX VDD Supply voltage 2.5 5.5 V TA Operating free-air temperature –40 85 °C VIH High-level input voltage (SHUTDOWN) VIL Low-level input voltage (SHUTDOWN) 60% x VDD UNIT V 25% x VDD V DC ELECTRICAL CHARACTERISTICS at VDD = 3.3 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP VOO Output offset voltage PSRR Power supply rejection ratio VDD = 3.2 V to 3.4 V 70 IDD Supply current SHUTDOWN (pin 5) = 0 V IDD(SD) Supply current in shutdown mode SHUTDOWN (pin 5) = VDD Zi Input impedance MAX UNIT 10 mV 1.5 3 mA 1 10 µA dB >1 MΩ AC OPERATING CHARACTERISTICS VDD = 3.3 V, TA = 25°C, RL = 16 Ω PARAMETER TEST CONDITIONS MIN TYP PO Output power (each channel) THD ≤ 0.1%, f = 1 kHz THD+N Total harmonic distortion + noise PO = 40 mW, 20 Hz – 20 kHz 0.4% BOM Maximum output power BW G = 20 dB, THD < 5% > 20 Phase margin Open loop Supply ripple rejection f = 1 kHz, C(BYP) = 0.47 µF Channel/channel output separation f = 1 kHz, PO = 40 mW SNR Signal-to-noise ratio PO = 50 mW, AV = 1 Vn Noise output voltage AV = 1 MAX UNIT 60 mW kHz 96° 71 dB 89 dB 100 dB 11 µV(rms) DC ELECTRICAL CHARACTERISTICS at VDD = 5.5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP VOO Output offset voltage PSRR Power supply rejection ratio VDD = 4.9 V to 5.1 V 70 IDD Supply current SHUTDOWN (pin 5) = 0 V IDD(SD) Supply current in shutdown mode SHUTDOWN (pin 5) = VDD |IIH| High-level input current (SHUTDOWN) VDD = 5.5 V, VI = VDD |IIL| Low-level input current (SHUTDOWN) VDD = 5.5 V, VI = 0 V Zi Input impedance MAX UNIT 10 mV 1.6 3.2 mA 1 10 µA 1 µA dB 1 >1 µA MΩ 3 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 AC OPERATING CHARACTERISTICS VDD = 5 V, TA = 25°C, RL = 6 Ω PARAMETER TEST CONDITIONS MIN TYP PO Output power (each channel) THD ≤ 0.1%, f = 1 kHz THD+N Total harmonic distortion + noise PO = 100 mW, 20 Hz – 20 kHz 0.6% BOM Maximum output power BW G = 20 dB, THD < 5% > 20 Phase margin Open loop Supply ripple rejection ratio f = 1 kHz, C(BYP) = 0.47 µF MAX 150 UNIT mW kHz 96° 61 dB 90 dB Channel/channel output separation f = 1 kHz, PO = 100 mW SNR Signal-to-noise ratio PO = 100 mW, AV = 1 100 dB Vn Noise output voltage AV = 1 11.7 µV(rms) AC OPERATING CHARACTERISTICS VDD = 3.3 V, TA = 25°C, RL = 32 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PO Output power (each channel) THD ≤ 0.1%, f = 1 kHz THD+N Total harmonic distortion + noise PO = 40 mW, 20 Hz – 20 kHz 0.4% BOM Maximum output power BW G = 20 dB, THD < 2% > 20 Phase margin Open loop Supply ripple rejection f = 1 kHz, C(BYP) = 0.47 µF 71 dB Channel/channel output separation f = 1 kHz, PO = 25 mW 75 dB SNR Signal-to-noise ratio PO = 90 mW, AV = 1 Vn Noise output voltage AV = 1 35 mW kHz 96° 100 dB 11 µV(rms) AC OPERATING CHARACTERISTICS VDD = 5 V, TA = 25°C, RL = 32 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PO Output power (each channel) THD ≤ 0.1%, f = 1 kHz THD+N Total harmonic distortion + noise PO = 20 mW, 20 Hz – 20 kHz BOM Maximum output power BW G = 20 dB, THD < 2% Phase margin Open loop Supply ripple rejection f = 1 kHz, C(BYP) = 0.47 µF 61 dB Channel/channel output separation f = 1 kHz, PO = 65 mW 98 dB SNR Signal-to-noise ratio PO = 90 mW, AV = 1 104 dB Vn Noise output voltage AV = 1 11.7 µV(rms) 4 90 mW 2% > 20 kHz 97° TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE THD+N Vn Total harmonic distortion plus noise vs Frequency 1, 3, 5, 6, 7, 9, 11, 13, vs Output power 2, 4, 8, 10, 12, 14 Supply ripple rejection ratio vs Frequency 15, 16 Output noise voltage vs Frequency 17, 18 Crosstalk vs Frequency 19–24 Shutdown attenuation vs Frequency 25, 26 Open-loop gain and phase margin vs Frequency 27, 28 Output power vs Load resistance 29, 30 IDD Supply current vs Supply voltage 31 SNR Signal-to-noise ratio vs Voltage gain 32 Power dissipation/amplifier vs Load power 33, 34 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 10 VDD = 3.3 V, PO = 25 mW, CB = 1 µF, RL = 32 Ω, AV = −1 V/V THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 0.1 0.01 0.001 20 100 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 1k 10k 20k 1 VDD = 3.3 V, RL = 32 Ω, AV = −1 V/V, CB = 1 µF 20 kHz 20 Hz 0.1 1 kHz 0.01 0.001 10 50 f − Frequency − Hz PO − Output Power − mW Figure 1. Figure 2. 100 5 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 10 VDD = 5 V, PO = 60 mW, CB = 1 µF, RL = 32 Ω, THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 AV = −5 V/V AV = −1 V/V AV = −10 V/V 0.1 0.05 0.01 0.001 20 100 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 1k f − Frequency − Hz 1 kHz 0.01 100 500 Figure 4. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 0.1 Figure 3. VDD = 3.3 V, PO = 100 mW, CB = 1 µF, RL = 10 kΩ, AV = −1 V/V 0.01 100 1k f − Frequency − Hz Figure 5. 6 20 kHz PO − Output Power − mW 0.1 0.001 20 20 Hz 0.001 10 10k 20k 10 1 1 VDD = 5 V, RL = 32 Ω, AV = −1 V/V, CB = 1 µF 10k 20k 1 VDD = 5 V, PO = 100 mW, CB = 1 µF, RL = 10 kΩ AV = −5 V/V AV = −1 V/V 0.1 AV = −10 V/V 0.01 0.001 20 100 1k f − Frequency − Hz Figure 6. 10k 20k TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 1 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 VDD = 3.3 V, PO = 60 mW, CB = 1 µF, RL = 8 Ω, AV = −1 V/V 0.1 0.01 0.001 20 100 1k f − Frequency − Hz 1 kHz 0.01 100 Figure 8. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 500 10 VDD = 5 V, PO = 150 mW, CB = 1 µF, RL = 8 kΩ THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 0.1 Figure 7. AV = −5 V/V 0.1 0.001 20 20 kHz PO − Output Power − mW AV = −1 V/V 0.01 20 Hz 0.001 10 10k 20k 10 1 1 VDD = 3.3 V, RL = 8 Ω, AV = −1 V/V, CB = 1 µF AV = −10 V/V 100 1k f − Frequency − Hz Figure 9. 10k 20k 1 VDD = 5 V, RL = 8 Ω, AV = −1 V/V, CB = 1 µF 1 kHz 20 kHz 0.1 0.01 0.001 10 20 Hz 100 PO − Output Power − mW 500 Figure 10. 7 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 1 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 VDD = 3.3 V, PO = 40 mW, CB = 1 µF, RL = 16 Ω, AV = −1 V/V 0.1 0.01 0.001 20 100 1k f − Frequency − Hz 500 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 100 PO − Output Power − mW TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY VDD = 5 V, PO = 100 mW, CB = 1 µF, RL = 16 Ω AV = −5 V/V AV = −10 V/V 100 1k f − Frequency − Hz Figure 13. 8 0.01 Figure 12. 0.1 0.001 20 1 kHz 0.1 Figure 11. AV = −1 V/V 0.01 20 Hz 20 kHz 0.001 10 10k 20k 10 1 1 VDD = 3.3 V, RL =16 Ω, AV = −1 V/V, CB = 1 µF 10k 20k 1 VDD = 5 V, RL = 16 Ω, AV = −1 V/V, CB = 1 µF 20 Hz 20 kHz 1 kHz 0.1 0.01 0.001 10 100 PO − Output Power − mW Figure 14. 500 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY 0 0.1 µF −10 VDD = 3.3 V, RL = 16 Ω, AV = −1 V/V 0.47 µF −20 1 µF −30 −40 −50 −60 −70 −80 Bypass = 1.65 V −90 −100 −110 K SVR − Supply Ripple Rejection Ratio − dB K SVR − Supply Ripple Rejection Ratio − dB 0 −120 VDD = 5 V, RL = 16 Ω, AV = −1 V/V 0.47 µF −20 1 µF −30 −40 −50 −60 −70 −80 Bypass = 2.5 V −90 −100 −110 −120 20 100 1k f − Frequency − Hz 10k 20k 20 100 1k f − Frequency − Hz Figure 15. Figure 16. OUTPUT NOISE VOLTAGE vs FREQUENCY OUTPUT NOISE VOLTAGE vs FREQUENCY 10k 20k 100 VDD = 3.3 V, BW = 10 Hz to 22 kHz RL = 16 Ω AV = −10 V/V AV = −1 V/V 10 1 V n − Output Noise Voltage − µ V(RMS) 100 V n − Output Noise Voltage − µ V(RMS) 0.1 µF −10 AV = −10 V/V AV = −1 V/V 10 VDD = 5 V, BW = 10 Hz to 22 kHz RL = 16 Ω, 1 20 100 1k f − Frequency − Hz Figure 17. 10k 20k 20 100 1k f − Frequency − Hz 10k 20k Figure 18. 9 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY 0 0 VDD = 3.3 V, PO = 25 mW, CB = 1 µF, RL = 32 Ω, AV = −1 V/V −10 −20 −20 −30 −40 Crosstalk − dB Crosstalk − dB −30 −50 −60 −70 −80 −70 IN2− to VO1 20 100 1k f − Frequency − Hz IN1− to VO2 −110 IN1− to VO2 −120 10k 20k 20 100 1k f − Frequency − Hz Figure 19. Figure 20. CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY 0 10k 20k 0 VDD = 3.3 V, PO = 60 mW, CB = 1 µF, RL = 8 Ω, AV = −1 V/V −10 −20 −30 −20 −30 −40 −50 −60 −70 IN2− to VO1 −80 VDD = 5 V, PO = 60 mW, CB = 1 µF, RL = 32 Ω, AV = −1 V/V −10 Crosstalk − dB Crosstalk − dB −60 −100 −110 −40 −50 −60 −70 −80 −90 IN2− to VO1 −90 −100 −100 IN1− to VO2 −110 IN1− to VO2 −110 20 100 1k f − Frequency − Hz Figure 21. 10 −50 −90 −100 −120 −40 −80 IN2− to VO1 −90 −120 VDD = 3.3 V, PO = 40 mW, CB = 1 µF, RL = 16 Ω, AV = −1 V/V −10 10k 20k −120 20 100 1k f − Frequency − Hz Figure 22. 10k 20k TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY 0 0 VDD = 5 V, PO = 100 mW, CB = 1 µF, RL = 16 Ω, AV = −1 V/V −10 −20 −20 −30 −40 Crosstalk − dB Crosstalk − dB −30 −50 −60 −70 −80 −50 −60 −70 IN2− to VO1 −90 −100 −100 IN1− to VO2 −110 20 0 −10 100 1k f − Frequency − Hz −120 10k 20k 20 100 1k f − Frequency − Hz 10k 20k Figure 23. Figure 24. SHUTDOWN ATTENUATION vs FREQUENCY SHUTDOWN ATTENUATION vs FREQUENCY 0 VDD = 3.3 V, RL = 16 Ω, CB = 1 µF −10 Shutdown Attenuation − dB −20 −30 −40 −50 −60 −70 −40 −50 −60 −70 −80 −90 −90 100 1k 10 k 1M VDD = 5 V, RL = 16 Ω, CB = 1 µF −30 −80 −100 10 IN1− to VO2 −110 −20 Shutdown Attenuation − dB −40 −80 IN2− to VO1 −90 −120 VDD = 5 V, PO = 150 mW, CB = 1 µF, RL = 8 Ω, AV = −1 V/V −10 −100 10 100 1k f − Frequency − Hz f − Frequency − Hz Figure 25. Figure 26. 10 k 1M 11 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 OPEN-LOOP GAIN AND PHASE MARGIN vs FREQUENCY VDD = 3.3 V RL = 10 kΩ 100 180 120 150 100 Gain 120 Phase 90 30 Gain 0 40 −30 20 −60 −90 0 Open-Loop Gain − dB 60 60 150 120 90 80 Φ m − Phase Margin − Deg 80 VDD = 5 V RL = 10 kΩ 60 60 30 Phase 0 40 −30 20 −60 −90 0 −120 −20 −150 −40 1k 10 k 100 k 1M −180 10 M Φm − Phase Margin − Deg 180 120 Open-Loop Gain − dB OPEN-LOOP GAIN AND PHASE MARGIN vs FREQUENCY −120 −20 −150 −40 1k 10 k 100 k 1M −180 10 M f − Frequency − Hz f − Frequency − Hz Figure 27. Figure 28. OUTPUT POWER vs LOAD RESISTANCE OUTPUT POWER vs LOAD RESISTANCE 100 250 VDD = 3.3 V, THD+N = 1%, AV = −1 V/V VDD = 5 V, THD+N = 1%, AV = −1 V/V 200 P − Output Power − mW O P − Output Power − mW O 75 50 25 0 100 50 0 8 12 16 20 24 28 32 36 40 44 45 52 56 60 64 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 RL − Load Resistance − Ω RL − Load Resistance − Ω Figure 29. 12 150 Figure 30. TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 SUPPLY CURRENT vs SUPPLY VOLTAGE SIGNAL-TO-NOISE RATIO vs VOLTAGE GAIN 120 2.5 SNR − Signal-to-Noise Ratio − dB VDD = 5 V 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 VDD − Supply Voltage − V 4.5 5 100 80 60 40 20 0 5.5 1 2 3 4 5 6 7 8 9 10 AV − Voltage Gain − V/V Figure 31. Figure 32. POWER DISSIPATION/AMPLIFIER vs LOAD POWER 80 VDD = 3.3 V 8Ω 70 Power Dissipation/Amplifier − mW I DD − Supply Current − mA 2 60 50 40 16 Ω 30 32 Ω 20 64 Ω 10 0 0 20 40 60 80 100 120 140 160 180 200 Load Power − mW Figure 33. 13 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 POWER DISSIPATION/AMPLIFIER vs LOAD POWER 180 Power Dissipation/Amplifier − mW VDD = 5 V 8Ω 160 140 120 100 16 Ω 80 60 32 Ω 40 64 Ω 20 0 0 20 40 60 80 100 120 140 160 180 Load Power − mW Figure 34. 14 200 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 APPLICATION INFORMATION GAIN SETTING RESISTORS, RF and Ri The gain for the TPA6111A2 is set by resistors RF and RI according to Equation 1. Gain RF RI (1) Given that the TPA6111A2 is a MOS amplifier, the input impedance is high. Consequently, input leakage currents are not generally a concern, although noise in the circuit increases as the value of RF increases. In addition, a certain range of RF values is required for proper start-up operation of the amplifier. Taken together it is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ and 20 kΩ. The effective impedance is calculated in Equation 2. R FR I Effective Impedance RF RI (2) As an example, consider an input resistance of 20 kΩ and a feedback resistor of 20 kΩ. The gain of the amplifier would be –1 and the effective impedance at the inverting terminal would be 10 kΩ, which is within the recommended range. For high-performance applications, metal film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of RF above 50 kΩ, the amplifier tends to become unstable due to a pole formed from RF and the inherent input capacitance of the MOS input structure. For this reason, a small compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a low-pass filter network with the cutoff frequency defined in Equation 3. 1 f c(lowpass) 2 R F CF (3) For example, if RF is 100 kΩ and CF is 5 pF, then fc(lowpass) is 318 kHz, which is well outside the audio range. INPUT CAPACITOR, Ci In the typical application, input capacitor CI is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, Ci and RI form a high-pass filter with the corner frequency determined in Equation 4. 1 f c(highpass) 2 R I CI (4) The value of CI is important to consider, as it directly affects the bass (low-frequency) performance of the circuit. Consider the example where RI is 20 kΩ and the specification calls for a flat bass response down to 20 Hz. Equation 4 is reconfigured as Equation 5. 1 CI 2 R I f c(highpass) (5) In this example, CI is 0.40 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further consideration for this capacitor is the leakage path from the input source through the input network (RI, CI) and the feedback resistor (RF) to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high-gain applications (> 10). For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications, as the dc level there is held at VDD/2, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application. 15 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 APPLICATION INFORMATION (continued) POWER SUPPLY DECOUPLING, C(S) The TPA6111A2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD lead, works best. For filtering lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power amplifier is recommended. MIDRAIL BYPASS CAPACITOR, C(BYP) The midrail bypass capacitor, C(BYP), serves several important functions. During start-up, C(BYP) determines the rate at which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it cannot be heard). The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed from a 230-kΩ source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in Equation 6 should be maintained. 1 1 C I R I C 230 kΩ (BYP) (6) As an example, consider a circuit where C(BYP) is 1 µF, CI is 1 µF, and RI is 20 kΩ. Inserting these values into Equation 6 results in: 6.25 ≤ 50 which satisfies the rule. Recommended values for bypass capacitor C(BYP) are 0.1 µF to 1 µF, ceramic or tantalum low-ESR, for the best THD and noise performance. OUTPUT COUPLING CAPACITOR, C(C) In the typical single-supply single-ended (SE) configuration, an output coupling capacitor (CC) is required to block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 7. 1 fc 2 R L C(C) (7) The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the low-frequency corner higher. Large values of C(C) are required to pass low frequencies into the load. Consider the example where a C(C) of 68 µF is chosen and loads vary from 32 Ω to 47 kΩ. Table 1 summarizes the frequency response characteristics of each configuration. Table 1. Common Load Impedances vs Low Frequency Output Characteristics in SE Mode RL CC LOWEST FREQUENCY 32 Ω 68 µF 73 Hz 10,000 Ω 68 µF 0.23 Hz 47,000 Ω 68 µF 0.05 Hz As Table 1 indicates, headphone response is adequate and drive into line level inputs (a home stereo for example) is good. 16 TPA6111A2 www.ti.com SLOS313B – DECEMBER 2000 – REVISED JUNE 2004 The output coupling capacitor required in single-supply SE mode also places additional constraints on the selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following relationship: 1 1 1 RLC (C) C R C 230 kΩ I I (BYP) (8) USING LOW-ESR CAPACITORS Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor. 5-V VERSUS 3.3-V OPERATION The TPA6111A2 was designed for operation over a supply range of 2.5 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation, since these are considered to be the two most common standard voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain setting, or stability. The most important consideration is that of output power. Each amplifier in the TPA6111A2 can produce a maximum voltage swing of VDD – 1 V. This means, for 3.3-V operation, clipping starts to occur when VO(PP) = 2.3 V as opposed when VO(PP) = 4 V while operating at 5 V. The reduced voltage swing subsequently reduces maximum output power into the load before distortion begins to become significant. 17 Thermal Pad Mechanical Data www.ti.com DGN (S–PDSO–G8) THERMAL INFORMATION The DGN PowerPAD™ package incorporates an exposed thermal die pad that is designed to be attached directly to an external heat sink. When the thermal die pad is soldered directly to the printed circuit board (PCB), the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal die pad can be attached directly to a ground plane or special heat sink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit (IC). For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities, refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002 and Application Brief, PowerPAD Made Easy, Texas Instruments Literature No. SLMA004. Both documents are available at www.ti.com. See Figure 1 for DGN package exposed thermal die pad dimensions. 8 1 5 4 Exposed Thermal Die Pad 1,78 MAX 1,73 MAX Bottom View PPTD041 NOTE: All linear dimensions are in millimeters. Figure 1. DGN Package Exposed Thermal Die Pad Dimensions PowerPAD is a trademark of Texas Instruments. 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated