ICS ICS840AM-77

PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
GENERAL DESCRIPTION
FEATURES
The ICS840-77 is a SONET Oscillator Replacement and a member of the HiPerClocks TM
HiPerClockS™
family of high performance devices from ICS.
The ICS840-77 uses a 19.44MHz crystal to
synthesize 77.76MHz. The ICS840-77 has
excellent jitter performance. The ICS840-77 is packaged in
a small 8-pin TSSOP, making it ideal for use in systems with
limited board space.
• One LVCMOS/LVTTL output, 15Ω output impedence
ICS
• Crystal oscillator interface designed for 19.44MHz,
18pF parallel resonant crystal
• Output frequency: 77.76MHz
• Random jitter: 2.82ps (typical)
• Deterministic jitter: 0.205ps (typical)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
OE
PIN ASSIGNMENT
Pullup
VDD
XTAL_OUT
XTAL_IN
OE
77.76MHz
Q0
19.44MHz
XTAL_IN
Clock
Synthesizer
1
2
3
4
8
7
6
5
Q1
Q0
VDDO
GND
ICS840-77
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
XTAL_OUT
Q1
ICS840-77
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
840AG-77
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REV. A NOVEMBER 7, 2005
1
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
TABLE 1. PIN DESCRIPTIONS
Number
Name
1
VDD
XTAL_OUT,
XTAL_IN
Power
4
OE
Input
5
GND
Power
6
VDDO
Power
2, 3
Type
Description
Input
Pullup
Power supply pin.
Cr ystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Output enable pin. When HIGH, outputs are enabled. When LOW,
forces outputs to HiZ state. LVCMOS/LVTTL interface levels.
Power supply ground.
Output supply pin.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
7, 8
Q0, Q1
Output
15Ω output impedence.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
CIN
Input Capacitance
RPULLUP
ROUT
Minimum
Typical
Maximum
Units
4
pF
Input Pullup Resistor
51
kΩ
Output Impedance
15
Ω
TABLE 3. CONTROL FUNCTION TABLE
Control Inputs
Output
OE
Q0, Q1
840AG-77
0
Hi-Z
1
Active
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2
REV. A NOVEMBER 7, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD
4.6V
Inputs, VI
-0.5V to VDD + 0.5 V
Outputs, VO
-0.5V to VDDO + 0.5V
device. These ratings are stress specifications only. Functional operation of product at these conditions or any condi-
Package Thermal Impedance, θJA
8 Lead TSSOP
101.7°C/W (0 mps)
tions beyond those listed in the DC Characteristics or AC
Characteristics is not implied. Exposure to absolute maxi-
8 Lead SOIC
112.7°C/W (0 lfpm)
Storage Temperature, TSTG
-65°C to 150°C
mum rating conditions for extended periods may affect product reliability.
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±0.3V, TA = 0°C TO 70°C
Symbol
Parameter
VDD
Power Supply Voltage
VDDO
Output Supply Voltage
IDD
Power Supply Current
IDDO
Output Supply Current
Test Conditions
Minimum
Typical
Maximum
Units
3.0
3.3
3.6
V
3.3
3.6
3.0
OE = VDD (output enabled)
TBD
V
mA
TBD
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V±0.3V, TA = 0°C TO 70°C
Symbol
Parameter
VIH
Input High Voltage
Test Conditions
VIL
Input Low Voltage
IIH
Input High Current
VDD = VIN = 3.6V
IIL
Input Low Current
VDD = 3.6V, VIN = 0V
VOH
Output High Voltage; NOTE 1
Minimum
Typical
Maximum
Units
2
VDD + 0.3
V
-0.3
0.8
V
5
µA
-150
µA
2.6
V
Output Low Voltage; NOTE 1
VOL
NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information Section,
"3.3V Output Load Test Circuit".
0.5
V
Maximum
Units
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Mode of Oscillation
Typical
Fundamental
Frequency
19.44
Equivalent Series Resistance (ESR)
TBD
Shunt Capacitance
Drive Level
840AG-77
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3
MHz
Ω
7
pF
TBD
µW
REV. A NOVEMBER 7, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
TABLE 6. AC CHARACTERISTICS, VDD = VDDO = 3.3V±0.3V, TA = 0°C TO 70°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
fOUT
Output Frequency
77.76
MHz
tDJ
Deterministic Jitter ; NOTE 1
0.205
ps
tRJ
2.82
ps
2.85
ps
2.18
ps
tacc
Random Jitter ; NOTE 1
RMS of Total Distribution (σ);
NOTE 1
Peak-to-Peak Jitter ; NOTE 1
Accumulated Jitter (σ);
NOTE 1
4. 0
ps
tOSC
Oscillation Star t Up Time
t R / tF
Output Rise/Fall Time
tRMS
tp-p
n = 2 to 50000 cycles
Time at minimum operating voltage
to be 0 s
20% to 80%
odc
Output Duty Cycle
NOTE 1: Measured using Wavecrest SIA-3000.
840AG-77
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4
10
ms
650
ps
50
%
REV. A NOVEMBER 7, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
PARAMETER MEASUREMENT INFORMATION
1.65V ± 0.15V
V
DDO
SCOPE
VDD,
VDDO
2
Q0, Q1
t PW
t
Qx
LVCMOS
GND
odc =
PERIOD
t PW
x 100%
t PERIOD
-1.65V ± 0.15V
3.3V OUTPUT LOAD AC TEST CIRCUIT
80%
Clock
Outputs
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
80%
20%
20%
tR
tF
OUTPUT RISE/FALL TIME
840AG-77
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5
REV. A NOVEMBER 7, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
APPLICATION INFORMATION
RECOMMENDATIONS FOR UNUSED INPUT
INPUTS:
AND
OUTPUT PINS
OUTPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating. Though
not required, but for additional protection, a 1kΩ resistor can be
tied from XTAL_IN to ground.
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating. We recommend
that there is no trace attached.
SELECT PINS:
All select pins have internal pull-ups and pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
CRYSTAL INPUT INTERFACE
lel resonant crystal and were chosen to minimize the ppm error.
The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
The ICS840-77 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 1 below were determined using a 19.44MHz, 18pF paral-
XTAL_OUT
C1
12p
X1
18pF Parallel Cry stal
XTAL_IN
C2
12p
Figure 1. CRYSTAL INPUt INTERFACE
840AG-77
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6
REV. A NOVEMBER 7, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
RELIABILITY INFORMATION
TABLE 7A. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θJA by Velocity (Meters per Second)
Multi-Layer PCB, JEDEC Standard Test Boards
0
1
2.5
101.7°C/W
90.5°C/W
89.8°C/W
TABLE 7B. θJAVS. AIR FLOW TABLE 8 LEAD SOIC
θJA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
200
500
153.3°C/W
112.7°C/W
128.5°C/W
103.3°C/W
115.5°C/W
97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS840-77 is: 2423
840AG-77
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7
REV. A NOVEMBER 7, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
FOR
8 LEAD TSSOP
PACKAGE OUTLINE - M SUFFIX FOR 8 LEAD SOIC
TABLE 8A. PACKAGE DIMENSIONS
SYMBOL
TABLE 8B. PACKAGE DIMENSIONS
Millimeters
Minimum
N
A
ICS840-77
SYMBOL
Maximum
8
Millimeters
MINIMUM
N
MAXIMUM
8
--
1.20
A
1.35
1.75
0.25
A1
0.05
0.15
A1
0.10
A2
0.80
1.05
B
0.33
0.51
b
0.19
0.30
C
0.19
0.25
c
0.09
0.20
D
4.80
5.00
D
2.90
3.10
E
3.80
4.00
E
E1
6.40 BASIC
4.30
e
e
4.50
0.65 BASIC
1.27 BASIC
H
5.80
6.20
h
0.25
0.50
L
0.45
0.75
L
0.40
1.27
α
0°
8°
α
0°
8°
aaa
--
0.10
Reference Document: JEDEC Publication 95, MS-012
Reference Document: JEDEC Publication 95, MO-153
840AG-77
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8
REV. A NOVEMBER 7, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
TABLE 9. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging
Temperature
ICS840AG-77
40A77
8 lead TSSOP
tube
0°C to 70°C
ICS840AG-77T
40A77
8 lead TSSOP
2500 tape & reel
0°C to 70°C
ICS840AG-77LF
TBD
8 lead "Lead-Free" TSSOP
tube
0°C to 70°C
ICS840AG-77LFT
TBD
8 lead "Lead-Free" TSSOP
2500 tape & reel
0°C to 70°C
ICS840AM-77
TBD
8 lead SOIC
tube
0°C to 70°C
ICS840AM-77T
TBD
8 lead SOIC
2500 tape & reel
0°C to 70°C
ICS840AM-77LF
TBD
8 lead "Lead-Free" SOIC
tube
0°C to 70°C
ICS840AM-77LFT
TBD
8 lead "Lead-Free" SOIC
2500 tape & reel
0°C to 70°C
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
840AG-77
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9
REV. A NOVEMBER 7, 2005