SN74AC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS723B – OCTOBER 2003 – REVISED APRIL 2006 FEATURES • • • • • • • • (1) DW OR NS PACKAGE (TOP VIEW) Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 7.5 ns at 5 V 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION This octal buffer and line driver is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74AC244-EP device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION –55°C to 125°C (1) ORDERABLE PART NUMBER PACKAGE (1) TA TOP-SIDE MARKING SOIC – DW Tape and reel SN74AC244MDWREP SAC244MEP SOP – NS Tape and reel SN74AC244MNSREP SAC244MEP Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (EACH BUFFER) INPUTS OE A L H OUTPUT Y H L L L H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2006, Texas Instruments Incorporated SN74AC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS723B – OCTOBER 2003 – REVISED APRIL 2006 LOGIC DIAGRAM (POSITIVE LOGIC) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 12 8 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 7 V VI Input voltage range (2) –0.5 VCC + 0.5 V –0.5 VCC + 0.5 range (2) VO Output voltage IIK Input clamp current VI < 0 or VI > VCC ±20 mA IOK Output clamp current VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC ±50 mA ±200 mA Continuous current through VCC or GND θJA Package thermal impedance (3) Tstg Storage temperature range (4) (1) (2) (3) (4) 2 UNIT DW package 58 NS package 60 –65 150 V °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging. Submit Documentation Feedback SN74AC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS723B – OCTOBER 2003 – REVISED APRIL 2006 Recommended Operating Conditions VCC (1) Supply voltage VCC = 3 V VIH High-level input voltage MIN MAX 2 6 UNIT V 2.1 VCC = 4.5 V 3.15 VCC = 5.5 V 3.85 VCC = 3 V V 0.9 VIL Low-level input voltage VCC = 4.5 V 1.35 VI Input voltage 0 VCC V VO Output voltage 0 VCC V VCC = 5.5 V IOH High-level output current IOL Low-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature (1) V 1.65 VCC = 3 V –12 VCC = 4.5 V –24 VCC = 5.5 V –24 VCC = 3 V 12 VCC = 4.5 V 24 VCC = 5.5 V 24 8 –55 mA mA ns/V °C 125 All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –50 µA VOH IOH = –12 mA IOH = –24 mA IOL = 50 µA VOL IOL = 12 mA IOL = 24 mA II Data inputs VI = VCC or GND Control inputs VI = VCC or GND VCC TA = 25°C MIN TYP MAX MIN 3V 2.9 2.9 4.5 V 4.4 4.4 5.5 V 5.4 5.4 3V 2.56 2.4 4.5 V 3.86 3.7 5.5 V 4.86 MAX UNIT V 4.7 3V 0.1 0.1 4.5 V 0.1 0.1 5.5 V 0.1 0.1 3V 0.36 0.5 4.5 V 0.36 0.5 5.5 V 0.36 0.5 ±0.1 ±1 ±0.1 ±1 5.5 V V µA IOZ VO = VCC or GND, VI(OE) = VIL or VIH 5.5 V ±0.25 ±5 µA ICC VI = VCC or GND, 5.5 V 4 80 µA Ci VI = VCC or GND IO = 0 5V Submit Documentation Feedback 2.5 pF 3 SN74AC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS723B – OCTOBER 2003 – REVISED APRIL 2006 Switching Characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y tPLH tPHL tPZH tPZL tPHZ tPLZ TA = 25°C MIN MAX 9 1 12.5 6.5 9 1 12 2 6 10.5 1 11.5 2.5 7.5 10 1 13 MIN TYP MAX 2 6.5 2 3 7 10 1 12.5 2.5 7.5 10.5 1 13 UNIT ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCC = 5.5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y tPLH tPHL tPZH tPZL tPHZ tPLZ TA = 25°C MIN MAX 7 1 9.5 7 1 9 5 7 1 9 5.5 8 1 10.5 6.5 9 1 10.5 6.5 9 1 11 MIN TYP MAX 1.5 5 1.5 5 1.5 1.5 2.5 2 UNIT ns ns ns Operating Characteristics VCC = 5 V, TA = 25°C PARAMETER Cpd 4 TEST CONDITIONS Power dissipation capacitance per buffer/driver Submit Documentation Feedback CL = 50 pF, f = 1 MHz TYP 45 UNIT pF SN74AC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS723B – OCTOBER 2003 – REVISED APRIL 2006 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test CL = 50 pF (see Note A) Open 500 Ω Output Control (low-level enabling) LOAD CIRCUIT Input VCC 50% VCC 50% VCC 0V tPLH tPHL 50% VCC S1 Open 2 × VCC Open VCC 50% VCC 50% VCC VOL tPLZ Output Waveform 1 S1 at 2 × VCC (see Note B) VCC 50% VCC VOL + 0.3 V VOL tPHZ Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS 50% VCC 0V tPZL tPZH VOH Output TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 50% VCC VOH − 0.3 V VOH 0 V VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback 5 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AC244MDWREP ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AC244MNSREP ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/04622-01XE ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/04622-01YE ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF SN74AC244-EP : SN74AC244 • Catalog: • Military: SN54AC244 NOTE: Qualified Version Definitions: - TI's standard catalog product • Catalog • Military - QML certified for Military and Defense Applications Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AC244MDWREP SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74AC244MNSREP SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AC244MDWREP SOIC DW 20 2000 367.0 367.0 45.0 SN74AC244MNSREP SO NS 20 2000 367.0 367.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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