SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 FEATURES 1 • Controlled Baseline – One Assembly – One Test Site – One Fabrication Site • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • Available in Texas Instruments NanoStar™ and NanoFree™ Packages • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • One Unbuffered Inverter (SN74LVC1GU04) and One Buffered Inverter (SN74LVC1G04) • Suitable for Commonly Used Clock Frequencies: – 15 kHz, 3.58 MHz, 4.43 MHz, 13 MHz, 25 MHz, 26 MHz, 27 MHz, 28 MHz • Max tpd of 3.7 ns at 3.3 V 2 (1) • • • • • Low Power Consumption, 10 μA Max ICC ±24 mA Output Drive at 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DRL PACKAGE (TOP VIEW) NC 1 6 Y GND 2 5 VCC X1 3 4 X2 See mechanical drawings for dimensions. NC – No internal connection Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION/ORDERING INFORMATION The SN74LVC1GX04 is designed for 1.65-V to 5.5-V VCC operation. This device incorporates the SN74LVC1GU04 (inverter with unbuffered output) and the SN74LVC1G04 (inverter) functions into a single device. The LVC1GX04 is optimized for use in crystal oscillator applications. ORDERING INFORMATION (1) TA –55°C to 125°C (1) (2) (3) PACKAGE (2) SOT (SOT-553) – DRL ORDERABLE PART NUMBER Reel of 4000 CLVC1GX04MDRLREP TOP-SIDE MARKING (3) CDD For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DRL: The actual top-side marking has one additional character that designates the assembly/test site. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 DESCRIPTION/ORDERING INFORMATION (CONTINUED) X1 and X2 can be connected to a crystal or resonator in oscillator applications. The device provides an additional buffered inverter (Y) for signal conditioning (see Figure 3). The additional buffered inverter improves the signal quality of the crystal oscillator output by making it rail to rail. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff (Y output only). The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE INPUT X1 OUTPUTS X2 Y H L H L H L LOGIC DIAGRAM (POSITIVE LOGIC) 6 3 X1 4 Y X2 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 6.5 UNIT V (2) VI Input voltage range –0.5 6.5 V VO Voltage range applied to Y output in the high-impedance or power-off state (2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state (2) (3) –0.5 VCC + 0.5 IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA 142 °C/W 150 °C Continuous current through VCC or GND θJA Package thermal impedance Tstg Storage temperature range (1) (2) (3) (4) 2 (4) –65 V Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 Recommended Operating Conditions (1) Operating VCC Supply voltage Data retention only High-level input voltage VCC = 1.65 V to 5.5 V VIL Low-level input voltage VCC = 1.65 V to 5.5 V VI Input voltage VO Output voltage IOH High-level output current MAX 1.65 5.5 1.5 Crystal oscillator use VIH MIN 0.75 × VCC V 0 5.5 V X2, Y 0 VCC Y output only, Power-down mode, VCC = 0 V 0 5.5 VCC = 1.65 V –4 VCC = 2.3 V –8 –16 VCC = 3 V Input transition rise or fall rate TA Operating free-air temperature mA –32 4 8 16 VCC = 3 V mA 24 VCC = 4.5 V 32 VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20 VCC = 3.3 V ± 0.3 V 10 VCC = 5 V ±0.5 V (1) V –24 VCC = 2.3 V Δt/Δv V 0.25 × VCC VCC = 1.65 V Low-level output current V 2 VCC = 4.5 V IOL UNIT ns/V 10 –55 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP 3 SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 μA 1.65 V to 5.5 V IOH = –4 mA IOH = –8 mA VOH VI = 5.5 V or GND IOH = –16 mA 1.2 2.3 V 1.9 V 2.4 2.3 4.5 V IOL = 100 μA 1.65 V to 5.5 V 0.1 1.65 V 0.45 2.3 V 0.3 IOL = 8 mA VI = 5.5 V or GND IOL = 16 mA IOL = 32 mA II X1 VI = 5.5 V or GND Ioff X1, Y VI or VO = 5.5 V ICC VI = 5.5 V or GND, Ci VI = VCC or GND 3.8 0.4 3V IOL = 24 mA (1) 1.65 V IOH = –32 mA IOL = 4 mA V 0.63 4.5 V IO = 0 UNIT VCC – 0.1 3V IOH = –24 mA VOL MIN TYP (1) MAX VCC 0.70 0 to 5.5 V ±5 μA 0 ±10 μA 1.65 V to 5.5 V 10 μA 3.3 V 7 pF All typical values are at VCC = 3.3 V, TA = 25°C. Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) FROM (INPUT) PARAMETER tpd (1) X1 TO (OUTPUT) VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V UNIT MIN MAX MIN MAX X2 0.8 3.7 0.8 3.2 Y (1) 2 7.8 2 5 TEST CONDITIONS VCC = 3.3 V VCC = 5 V TYP TYP f = 10 MHz 24 35 ns X2 – no external load Operating Characteristics TA = 25°C PARAMETER Cpd 4 Power dissipation capacitance Submit Documentation Feedback UNIT pF Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 15 pF 15 pF 15 pF 15 pF 1 MΩ 1 MΩ 1 MΩ 1 MΩ 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VM VM VOL tPHL VM VM 0V tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + V∆ VOL tPHZ Output Waveform 2 S1 at GND (see Note B) VM VOH - V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP 5 SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VM VM VOL tPHL VM VM 0V tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + V∆ VOL tPHZ Output Waveform 2 S1 at GND (see Note B) VM VOH - V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms 6 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 APPLICATION INFORMATION Figure 3 shows a typical application of the SN74LVC1GX04 in a Pierce oscillator circuit. The buffered inverter (SN74LVC1G04 portion) produces a rail-to-rail voltage waveform. The recommended load for the crystal shown in this example is 16 pF. The value of the recommended load (CL) can be found in the crystal manufacturer's data sheet. Values of C1 and C2 are chosen so that and C1 ≡ C2. Rs is the current-limiting resistor, and the value depends on the maximum power dissipation of the crystal. Generally, the recommended value of Rs is specified in the crystal manufacturer's data sheet and, usually, this value is approximately equal to the reactance of C2 at resonance frequency, i.e., . RF is the feedback resistor that is used to bias the inverter in the linear region of operation. Usually, the value is chosen to be within 1 MΩ to 10 MΩ. SN74LVC1GU04 Portion SN74LVC1G04 Portion Y X2 X1 CLOAD RLOAD RF ≅ 2.2 MΩ CL ≅ 16 pF C1 ≅ 32 pF Rs ≅ 1 kΩ C2 ≅ 32 pF a) Logic Diagram View Figure 3. Oscillator Circuit Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP 7 SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER www.ti.com SGDS029 – SEPTEMBER 2007 APPLICATION INFORMATION 6 1 NC Y CLOAD GND X1 2 5 3 4 RLOAD VCC X2 RF ≅ 2.2 MΩ CL = 16 pF C1 ≅ 32 pF Rs ≅ 1 kΩ C2 ≅ 32 pF b) Oscillator Circuit in DBV or DCK Pinout Figure 3. Oscillator Circuit (continued) Practical Design Tips • • • • 8 The open-loop gain of the unbuffered inverter decreases as power-supply voltage decreases. This decreases the closed-loop gain of the oscillator circuit. The value of Rs can be decreased to increase the closed-loop gain, while maintaining the power dissipation of the crystal within the maximum limit. Rs and C2 form a low-pass filter and reduce spurious oscillations. Component values can be adjusted, based on the desired cutoff frequency. C2 can be increased over C1 to increase the phase shift and help in start-up of the oscillator. Increasing C2 may affect the duty cycle of the output voltage. At high frequency, phase shift due to Rs becomes significant. In this case, Rs can be replaced by a capacitor to reduce the phase shift. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP www.ti.com SN74LVC1GX04-EP CRYSTAL OSCILLATOR DRIVER SGDS029 – SEPTEMBER 2007 APPLICATION INFORMATION Testing After the selection of proper component values, the oscillator circuit should be tested using these components. To ensure that the oscillator circuit performs within the recommended operating conditions, follow these steps: 1. Without a crystal, the oscillator circuit should not oscillate. To check this, the crystal can be replaced by its equivalent parallel-resonant resistance. 2. When the power-supply voltage drops, the closed-loop gain of the oscillator circuit reduces. Ensure that the circuit oscillates at the appropriate frequency at the lowest VCC and highest VCC. 3. Ensure that the duty cycle, start-up time, and frequency drift over time is within the system requirements. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1GX04-EP 9 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty CLVC1GX04MDRLREP ACTIVE SOT DRL 6 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/07632-01XE ACTIVE SOT DRL 6 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF SN74LVC1GX04-EP : • Catalog: SN74LVC1GX04 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 31-Mar-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device CLVC1GX04MDRLREP Package Package Pins Type Drawing SOT DRL 6 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 4000 180.0 8.4 Pack Materials-Page 1 1.98 B0 (mm) K0 (mm) P1 (mm) 1.78 0.69 4.0 W Pin1 (mm) Quadrant 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 31-Mar-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CLVC1GX04MDRLREP SOT DRL 6 4000 202.0 201.0 28.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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