LMZ13608 LMZ13608 8A SIMPLE SWITCHER® Power Module with 36V Maximum Input Voltage Literature Number: SNVS710D LMZ13608 8A SIMPLE SWITCHER® Power Module with 36V Maximum Input Voltage Easy to use 11 pin package Performance Benefits ■ High efficiency reduces system heat generation ■ Low radiated emissions (EMI) complies with EN55022 class B standard (Note 2) ■ Only 7 external components ■ Low output voltage ripple ■ No external heat sink required System Performance Electrical Specifications 40W maximum total output power Up to 8A output current Input voltage range 6V to 36V Output voltage range 0.8V to 6V Efficiency up to 92% ■ ■ ■ ■ 70 60 50 40 24 Vin 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 8 30151402 Thermal derating curve VIN = 24V, VOUT = 3.3V 10 Integrated shielded inductor Simple PCB layout Fixed switching frequency (350 kHz) Flexible startup sequencing using external soft-start, tracking and precision enable Protection against inrush currents and faults such as input UVLO and output short circuit – 40°C to 125°C junction temperature range Single exposed pad and standard pinout for easy mounting and manufacturing Fully enabled for Webench® Power Designer Pin compatible with LMZ22010/08, LMZ12010/08, LMZ23610/08/06H, and LMZ13610/06H Applications ■ ■ ■ ■ 80 20 Point of load conversions from 12V and 24V input rail Time critical projects Space constrained / high thermal requirement applications Negative output voltage applications (See AN-2027) MAXIMUM OUTPUT CURRENT (A) ■ 90 30 Key Features ■ ■ ■ ■ 100 8 6 4 2 θJA = 9.9 °C/W θJA = 6.8 °C/W θJA = 5.2 °C/W 0 20 40 60 80 100 TEMPERATURE (C) 120 30151403 Radiated EMI (EN 55022) VIN = 24V, VOUT = 5V, IOUT = 8A 50 AMPLITUDE (dBμV/m) ■ ■ ■ ■ ■ Efficiency VIN = 24V VOUT = 3.3V EFFICIENCY (%) 30151401 TO-PMOD 11 Pin Package 15 x 17.79 x 5.9 mm (0.59 x 0.7 x 0.232 in) θJA = 9.9 °C/W, θJC = 1.0 °C/W (Note 1) RoHS Compliant 40 30 20 10 0 Horizontal Peak Vertical Peak Class B Limit Class A Limit 0 100 200 300 400 500 600 700 800 9001000 FREQUENCY (MHz) 30151417 Note 1: θJA measured on a 75mm x 90mm four layer PCB. Note 2: EN 55022:2006, +A1:2007, FCC Part 15 Subpart B, tested on Evaluation Board with EMI configuration © 2011 National Semiconductor Corporation 301514 www.national.com LMZ13608 8A SIMPLE SWITCHER® Power Module with 36V Maximum Input Voltage September 15, 2011 LMZ13608 Simplified Application Schematic 30151408 Connection Diagram 30151409 Top View 11-Lead TO-PMOD Ordering Information Order Number Package Type NSC Package Drawing LMZ13608TZ TO-PMOD-11 TZA11A 32 Units in a Rail LMZ13608TZE TO-PMOD-11 TZA11A 250 Units on Tape and Reel www.national.com 2 Supplied As Pin 1, 2 Name Description VIN Supply input — Nominal operating range is 6V to 36V . A small amount of internal capacitance is contained within the package assembly. Additional external input capacitance is required between this pin and PGND. 3, 5, 6 AGND Analog Ground — Reference point for all stated voltages. Must be externally connected to EP/PGND. 4 EN Enable — Input to the precision enable comparator. Rising threshold is 1.274V typical. Once the module is enabled, a 20 uA source current is internally activated to accommodate programmable hysteresis. 7 FB Feedback — Internally connected to the regulation, over-voltage, and short-circuit comparators. The regulation reference point is 0.8V at this input pin. Connect the feedback resistor divider between the output and AGND to set the output voltage. 8 SS Soft-Start/Track input — To extend the 1.6 mSec internal soft-start connect an external soft start capacitor. For tracking connect to an external resistive divider connected to a higher priority supply rail. See applications section. NC No Connect. This pin must remain floating, do not ground. 9 10, 11 VOUT Output Voltage — Output from the internal inductor. Connect the output capacitor between this pin and PGND. EP PGND Exposed Pad / Power Ground Electrical path for the power circuits within the module. — NOT Internally connected to AGND / pin 5. Used to dissipate heat from the package during operation. Must be electrically connected to pin 5 external to the package. 3 www.national.com LMZ13608 Pin Descriptions LMZ13608 ESD Susceptibility (Note 4) For soldering specifications: see product folder at www.national.com and www.national.com/ms/MS/MS-SOLDERING.pdf Absolute Maximum Ratings (Note 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN to PGND EN to AGND SS, FB to AGND AGND to PGND Junction Temperature Storage Temperature Range Operating Ratings -0.3V to 40V -0.3V to 5.5V -0.3V to 2.5V -0.3V to 0.3V 150°C -65°C to 150°C ± 2 kV (Note 3) VIN EN Operation Junction Temperature 6V to 36V 0V to 5.0V −40°C to 125°C Electrical Characteristics Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 12V, VOUT = 3.3V Symbol Parameter Conditions Min (Note 5) Typ (Note 6) Max (Note 5) 1.096 1.274 1.452 Units SYSTEM PARAMETERS Enable Control VEN EN threshold VEN rising EN hysteresis source current VEN > 1.274V ISS SS source current VSS = 0V tSS Internal soft-start interval IEN-HYS 13 V µA Soft-Start 40 50 60 1.6 µA msec Current Limit ICL Current limit threshold d.c. average 10.5 A Internal Switching Oscillator fosc Free-running oscillator frequency 314 359 404 kHz 0.775 0.795 0.815 V Regulation and Over-Voltage Comparator VFB VFB-OV In-regulation feedback voltage VSS >+ 0.8V IO = 8A Feedback over-voltage protection threshold 0.86 V IFB Feedback input bias current 5 nA IQ Non Switching Quiescent Current 3 mA ISD Shut Down Quiescent Current 32 μA 85 % 165 °C Dmax VEN = 0V Maximum Duty Factor Thermal Characteristics TSD Thermal Shutdown Rising TSD-HYST Thermal shutdown hysteresis Falling 15 °C θJA Junction to Ambient (Note 7) Natural Convection 9.9 °C/W 225 LFPM 6.8 500 LFPM 5.2 θJC Junction to Case 1.0 °C/W 24 mV PP ±0.2 % PERFORMANCE PARAMETERS(Note 8) ΔVO Output voltage ripple BW@ 20 MHz ΔVO/ΔVIN Line regulation VIN = 12V to 20V, IOUT= 8A ΔVO/ΔIOUT Load regulation VIN = 12V, IOUT= 0.001A to 8A 1 mV/A η Peak efficiency VIN = 12V VOUT = 3.3V IOUT = 5A 89.5 % η Full load efficiency VIN = 12V VOUT = 3.3V IOUT = 8A 88.5 % www.national.com 4 Note 4: The human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD-22-114. Note 5: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 6: Typical numbers are at 25°C and represent the most likely parametric norm. Note 7: Theta JA measured on a 3.0” x 3.5” four layer board, with two ounce copper on outer layers and one ounce copper on inner layers, two hundred and ten 12 mil thermal vias, and 2W power dissipation. Refer to evaluation board application note layout diagrams. Note 8: Refer to BOM in Typical Application Bill of Materials — Table 1. 5 www.national.com LMZ13608 Note 3: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. Unless otherwise specified, the following conditions apply: VIN = 12V; CIN = three x 10μF + 47nF X7R Ceramic; COUT = two x 330μF Specialty Polymer + 47 uF Ceramic + 47nF Ceramic; CFF = 4.7nF; Tambient = 25° C for waveforms. All indicated temperatures are ambient. Efficiency 5.0V output @ 25°C Dissipation 5.0V output @ 25°C 10 100 8 80 DISSIPATION (W) EFFICIENCY (%) 8 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 9 90 70 60 8 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 50 40 30 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 7 6 5 4 3 2 1 0 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151434 Efficiency 3.3V output @ 25°C Dissipation 3.3V output @ 25°C 10 90 8 DISSIPATION (W) 80 70 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 50 40 30 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 7 6 5 4 3 2 1 0 8 0 30151436 www.national.com 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 9 60 8 30151435 100 EFFICIENCY (%) LMZ13608 Typical Performance Characteristics 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 8 30151437 6 Dissipation 2.5V output @ 25°C 10 100 90 8 80 DISSIPATION (W) EFFICIENCY (%) 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 9 70 60 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 50 40 30 0 1 2 3 4 5 6 OUTPUT CURRENT (A) LMZ13608 Efficiency 2.5V output @ 25°C 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151438 30151439 Efficiency 1.8V output @ 25°C Dissipation 1.8V output @ 25°C 10 90 80 8 70 DISSIPATION (W) EFFICIENCY (%) 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 9 60 50 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 40 30 20 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151440 Dissipation 1.5V output @ 25°C 10 80 9 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 8 70 DISSIPATION (W) EFFICIENCY (%) Efficiency 1.5V output @ 25°C 60 50 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 30 20 10 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 8 30151441 90 40 8 7 6 5 4 3 2 1 0 7 8 0 30151442 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 8 30151443 7 www.national.com LMZ13608 Dissipation 1.2V output @ 25°C 90 10 80 9 70 8 DISSIPATION (W) EFFICIENCY (%) Efficiency 1.2V output @ 25°C 60 50 40 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 30 20 10 0 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151444 30151445 Dissipation 1.0V output @ 25°C 90 10 80 9 70 8 DISSIPATION (W) EFFICIENCY (%) Efficiency 1.0V output @ 25°C 60 50 40 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 30 20 10 0 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151446 Efficiency 5.0V output @ 85°C Dissipation 5.0V output @ 85°C 10 8 DISSIPATION (W) EFFICIENCY (%) 90 80 70 8 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 40 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 7 6 5 4 3 2 1 0 8 0 30151448 www.national.com 8 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 9 50 8 30151447 100 60 8 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 8 30151449 8 10 90 9 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 8 80 DISSIPATION (W) EFFICIENCY (%) Dissipation 3.3V output @ 85°C 100 70 60 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 50 40 30 20 0 1 2 3 4 5 6 OUTPUT CURRENT (A) LMZ13608 Efficiency 3.3V output @ 85°C 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151450 30151451 Dissipation 2.5V output @ 85°C 100 10 90 9 80 8 DISSIPATION (W) EFFICIENCY (%) Efficiency 2.5V output @ 85°C 70 60 50 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 40 30 20 10 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151452 Dissipation 1.8V output @ 85°C 10 80 9 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 8 70 DISSIPATION (W) EFFICIENCY (%) Efficiency 1.8V output @ 85°C 60 50 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 30 20 10 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 8 30151453 90 40 8 7 6 5 4 3 2 1 0 7 8 0 30151454 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 8 30151455 9 www.national.com LMZ13608 Dissipation 1.5V output @ 85°C 90 10 80 9 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 8 70 DISSIPATION (W) EFFICIENCY (%) Efficiency 1.5V output @ 85°C 60 50 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 40 30 20 10 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151456 30151457 Dissipation 1.2V output @ 85°C 90 10 80 9 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 8 70 DISSIPATION (W) EFFICIENCY (%) Efficiency 1.2V output @ 85°C 60 50 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 40 30 20 10 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 6 5 4 3 2 1 0 7 8 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 30151458 Efficiency 1.0V output @ 85°C Dissipation 1.0V output @ 85°C 12 80 DISSIPATION (W) EFFICIENCY (%) 60 50 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36Vin 20 10 0 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 8 6 4 2 0 7 8 0 30151460 www.national.com 6 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 30 Vin 36 Vin 10 70 30 8 30151459 90 40 8 1 2 3 4 5 6 OUTPUT CURRENT (A) 7 8 30151461 10 Thermal derating VIN = 24V, VOUT = 5.0V 10 MAXIMUM OUTPUT CURRENT (A) 1.002 NORMALIZED VOUT (V/V) LMZ13608 Normalized line and load regulation VOUT = 3.3V 1.001 1.000 6 Vin 8 Vin 10 Vin 12 Vin 16 Vin 20 Vin 24 Vin 36 Vin 0.999 0.998 0 1 2 3 4 5 6 7 OUTPUT CURRENT (A) 8 6 4 2 θJA = 9.9 °C/W θJA = 6.8 °C/W θJA = 5.2 °C/W 0 8 20 30 40 50 60 70 80 90 100 110 120 TEMPERATURE (C) 30151462 30151463 θJA vs copper heat sinking area Thermal derating VIN = 24V, VOUT = 3.3V 30 2 Layer 0 LFPM 2 Layer 225 LFPM 4 Layer 0 LFPM 4 Layer 225 LFPM 27 8 24 THETA JA (°C/W) MAXIMUM OUTPUT CURRENT (A) 10 6 4 2 0 21 18 15 12 9 θJA = 9.9 °C/W θJA = 6.8 °C/W θJA = 5.2 °C/W 6 3 20 30 40 50 60 70 80 90 100 110 120 TEMPERATURE (C) 0 2 4 6 8 COPPER AREA (in2) 10 12 30151464 30151465 Output ripple 12VIN, 5.0VOUT @ Full Load, BW = 20 MHz Output ripple 12VIN, 5.0VOUT@ Full Load, BW = 250 MHz 30151466 30151469 11 www.national.com LMZ13608 Output ripple 12VIN, 3.3VOUT @ Full Load, BW = 20 MHz Output ripple 12VIN, 3.3VOUT@ Full Load, BW = 250 MHz 30151470 30151467 Output ripple 12VIN, 1.2VOUT @ Full Load, BW = 20 MHz Output ripple 12VIN, 1.2VOUT@ Full Load, BW = 250 MHz 30151471 30151468 Transient response 12VIN, 5.0VOUT 1 to 8A Step Transient response 12VIN, 3.3VOUT 1 to 8A Step 30151472 www.national.com 30151473 12 LMZ13608 Transient response 12VIN, 1.2VOUT 1 to 8A Step Short circuit current vs input voltage 16 14 CURRENT (A) 12 10 8 6 4 Output Current Input Current 2 0 5 30151474 10 15 INPUT VOLTAGE (V) 20 30151475 3.3VOUT Soft Start, no CSS 3.3VOUT Soft Start, CSS = 0.47uF 30151476 301514a4 Block Diagram 30151478 13 www.national.com LMZ13608 voltage would exceed the EN input's range of operation. The zener clamp is not required if the target application prohibits the maximum Enable input voltage from being exceeded. Additional enable voltage hysteresis can be added with the inclusion of RENH. It is possible to select values for RENT and RENB such that RENH is a value of zero allowing it to be omitted from the design. Rising threshold can be calculated as follows: General Description The LMZ13608 SIMPLE SWITCHER© power module is an easy-to-use step-down DC-DC solution capable of driving up to 8A load. The LMZ13608 is available in an innovative package that enhances thermal performance and allows for hand or machine soldering. The LMZ13608 can accept an input voltage rail between 6V and 36V and deliver an adjustable and highly accurate output voltage as low as 0.8V. The LMZ13608 only requires two external resistors and three external capacitors to complete the power solution. The LMZ13608 is a reliable and robust design with the following protection features: thermal shutdown, input under-voltage lockout, output over-voltage protection, short-circuit protection, output current limit, and allows startup into a pre-biased output. VEN(rising) = 1.274 ( 1 + (RENT|| 2 meg)/ RENB) (2) Whereas the falling threshold level can be calculated using: VEN(falling) = VEN(rising) – 13 µA ( RENT|| 2 meg || RENTB + RENH ) (3) Design Steps for the LMZ13608 Application The LMZ13608 is fully supported by Webench® which offers: component selection, electrical and thermal simulations. Additionally, there are both evaluation and demonstration boards that may be used as a starting point for design. The following list of steps can be used to manually design the LMZ13608 application. All references to values refer to the typical applications schematic Figure 4 . • Select minimum operating VIN with enable divider resistors • Program VOUT with FB resistor divider selection • Select COUT • Select CIN • Determine module power dissipation • Layout PCB for required thermal performance 30151479 FIGURE 1. Enable input detail OUTPUT VOLTAGE SELECTION Output voltage is determined by a divider of two resistors connected between VOUT and AGND. The midpoint of the divider is connected to the FB input. The regulated output voltage determined by the external divider resistors RFBT and RFBB is: ENABLE DIVIDER, RENT, RENB AND RENHSELECTION Internal to the module is a 2 mega ohm pull-up resistor connected from VIN to Enable. For applications not requiring precision under voltage lock out (UVLO), the Enable input may be left open circuit and the internal resistor will always enable the module. In such case, the internal UVLO occurs typically at 4.3V (VIN rising). In applications with separate supervisory circuits Enable can be directly interfaced to a logic source. In the case of sequencing supplies, the divider is connected to a rail that becomes active earlier in the power-up cycle than the LMZ13608 output rail. Enable provides a precise 1.274V threshold to allow direct logic drive or connection to a voltage divider from a higher enable voltage such as VIN. Additionally there is 13 μA (typ) of switched offset current allowing programmable hysteresis. See Figure 1. The function of the enable divider is to allow the designer to choose an input voltage below which the circuit will be disabled. This implements the feature of a programmable UVLO. The two resistors should be chosen based on the following ratio: RENT / RENB = (VIN UVLO / 1.274V) – 1 VOUT = 0.795V * (1 + RFBT / RFBB) Rearranging terms; the ratio of the feedback resistors for a desired output voltage is: RFBT / RFBB = (VOUT / 0.795V) - 1 (5) These resistors should generally be chosen from values in the range of 1.0 kΩ to 10.0 kΩ. For VOUT = 0.8V the FB pin can be connected to the output directly and RFBB can be set to 8.06kΩ to provide minimum output load. A table of values for RFBT , and RFBB, is included in the simplified applications schematic on page 2. SOFT-START CAPACITOR SELECTION Programmable soft-start permits the regulator to slowly ramp to its steady state operating point after being enabled, thereby reducing current inrush from the input supply and slowing the output voltage rise-time. Upon turn-on, after all UVLO conditions have been passed, an internal 1.6msec circuit slowly ramps the SS input to implement internal soft start. If 1.6 msec is an adequate turn–on time then the Css capacitor can be left unpopulated. Longer soft-start periods are achieved by adding an external capacitor to this input. Soft start duration is given by the formula: (1) The LMZ13608 typical application shows 12.7kΩ for RENB and 42.2kΩ for RENT resulting in a rising UVLO of 5.51V. Note that this divider presents 4.62V to the EN input when VIN is raised to 20V. This upper voltage should always be checked, making sure that it never exceeds the Abs Max 5.5V limit for Enable. A 5.1V Zener clamp can be applied in cases where the upper www.national.com (4) 14 (6) ommended for obtaining lowest ripple. The output capacitor COUT may consist of several capacitors in parallel placed in close proximity to the module. The output voltage ripple of the module depends on the equivalent series resistance (ESR) of the capacitor bank, and can be calculated by multiplying the ripple current of the module by the effective impedance of your chosen output capacitors (for ripple current calculation, see equation 18). Electrolytic capacitors will have large ESR and lead to larger output ripple than ceramic or polymer types. For this reason a combination of ceramic and polymer capacitors is recommended for low output ripple performance. The output capacitor assembly must also meet the worst case ripple current rating of ΔiL, as calculated in equation (18) below. Loop response verification is also valuable to confirm closed loop behavior. For applications with dynamic load steps; the following equation provides a good first pass approximation of COUT for load transient requirements. CSS = tSS * 50μA / 0.795V (7) Using a 0.22μF capacitor results in 3.5 msec typical soft-start duration; and 0.47μF results in 7.5 msec typical. 0.47 μF is a recommended initial value. As the soft-start input exceeds 0.795V the output of the power stage will be in regulation and the 50 μA current is deactivated. Note that the following conditions will reset the soft-start capacitor by discharging the SS input to ground with an internal current sink. • The Enable input being pulled low • A thermal shutdown condition • VIN falling below 4.3V (TYP) and triggering the VCC UVLO TRACKING SUPPLY DIVIDER OPTION The tracking function allows the module to be connected as a slave supply to a primary voltage rail (often the 3.3V system rail) where the slave module output voltage is lower than that of the master. Proper configuration allows the slave rail to power up coincident with the master rail such that the voltage difference between the rails during ramp-up is small (i.e. <0.15V typ). The values for the tracking resistive divider should be selected such that the effect of the internal 50uA current source is minimized. In most cases the ratio of the tracking divider resistors is the same as the ratio of the output voltage setting divider. Proper operation in tracking mode dictates the soft-start time of the slave rail be shorter than the master rail; a condition that is easy to satisfy since the CSS cap is replaced by RTKB. The tracking function is only supported for the power up interval of the master supply; once the SS/TRK rises past 0.795V the input is no longer enabled and the 50 uA internal current source is switched off. (8) For 12VIN, 3.3VOUT, a transient voltage of 5% of VOUT = 0.165V (ΔVOUT), a 7A load step (ISTEP), an output capacitor effective ESR of 3 mOhms, and a switching frequency of 350kHz (fSW): (9) Note that the stability requirement for minimum output capacitance must always be met. One recommended output capacitor combination is two 330μF, 15 mOhm ESR tantalum polymer capacitors connected in parallel with a 47 uF 6.3V X5R ceramic. This combination provides excellent performance that may exceed the requirements of certain applications. Additionally some small 47nF ceramic capacitors can be used for high frequency EMI suppression. CIN SELECTION The LMZ13608 module contains two internal ceramic input capacitors. Additional input capacitance is required external to the module to handle the input ripple current of the application. The input capacitor can be several capacitors in parallel. This input capacitance should be located in very close proximity to the module. Input capacitor selection is generally directed to satisfy the input ripple current requirements rather than by capacitance value. Input ripple current rating is dictated by the equation: 30151480 FIGURE 2. Tracking option input detail (10) where D ≊ VOUT / VIN COUT SELECTION None of the required COUT output capacitance is contained within the module. A minimum value ranging from 330 μF for 6VOUT to 660 μF for 1.2VOUT applications is required based on the values of internal compensation in the error amplifier. These minimum values can be decreased if the effective capacitor ESR is higher than 15 mOhms. A Low ESR (15 mOhm) tantalum, organic semiconductor or specialty polymer capacitor types in parallel with a 47nF X7R ceramic capacitor for high frequency noise reduction is rec- (As a point of reference, the worst case ripple current will occur when the module is presented with full load current and when VIN = 2 * VOUT). Recommended minimum input capacitance is 30 uF X7R (or X5R) ceramic with a voltage rating at least 25% higher than the maximum applied input voltage for the application. It is also recommended that attention be paid to the voltage and temperature derating of the capacitor selected. It should be noted that ripple current rating of ceramic capacitors may be 15 www.national.com LMZ13608 tSS = VREF * CSS / Iss = 0.795V * CSS / 50uA This equation can be rearranged as follows: LMZ13608 as before but had 225 LFPM of airflow. We locate the required θJA of missing from the capacitor data sheet and you may have to contact the capacitor manufacturer for this parameter. If the system design requires a certain minimum value of peak-to-peak input ripple voltage (ΔVIN) to be maintained then the following equation may be used. (11) (16) If ΔVIN is 200 mV or 1.66% of VIN for a 12V input to 3.3V output application and fSW = 350 kHz then: On the Theta JA vs copper heatsinking curve, the copper area required for this application is now only 1 square inches. The airflow reduced the required heat sinking area by a factor of four. To reduce the heat sinking copper area further, this package is compatable with D3-PAK surface mount heat sinks. For an example of a high thermal performance PCB layout for SIMPLE SWITCHER© power modules, refer to AN-2093, AN-2084, AN-2125, AN-2020 and AN-2026. (12) Additional bulk capacitance with higher ESR may be required to damp any resonant effects of the input capacitance and parasitic inductance of the incoming supply lines. The LMZ13608 typical applications schematic and evaluation board include a 150 μF 50V aluminum capacitor for this function. There are many situations where this capacitor is not necessary. PC BOARD LAYOUT GUIDELINES PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DCDC converter and surrounding circuitry by contributing to EMI, ground bounce and resistive voltage drop in the traces. These can send erroneous signals to the DC-DC converter resulting in poor regulation or instability. Good layout can be implemented by following a few simple design rules. A good layout example is shown in Figure 5. POWER DISSIPATION AND BOARD THERMAL REQUIREMENTS When calculating module dissipation use the maximum input voltage and the average output current for the application. Many common operating conditions are provided in the characteristic curves such that less common applications can be derived through interpolation. In all designs, the junction temperature must be kept below the rated maximum of 125°C. For the design case of VIN = 12V, VOUT = 3.3V, IOUT = 8A, and TA-MAX = 50°C, the module must see a thermal resistance from case to ambient (θCA) of less than: (13) Given the typical thermal resistance from junction to case (θJC) to be 1.0 °C/W. Use the 85°C power dissipation curves in the Typical Performance Characteristics section to estimate the PIC-LOSS for the application being designed. In this application it is 3.9W. 30151481 FIGURE 3. High Current Loops (14) To reach θCA = 18.23, the PCB is required to dissipate heat effectively. With no airflow and no external heat-sink, a good estimate of the required board area covered by 2 oz. copper on both the top and bottom metal layers is: 1. Minimize area of switched current loops. From an EMI reduction standpoint, it is imperative to minimize the high di/dt paths during PC board layout as shown in the figure above. The high current loops that do not overlap have high di/dt content that will cause observable high frequency noise on the output pin if the input capacitor (CIN) is placed at a distance away from the LMZ13608. Therefore place CIN as close as possible to the LMZ13608 VIN and PGND exposed pad. This will minimize the high di/dt area and reduce radiated EMI. Additionally, grounding for both the input and output capacitor should consist of a localized top side plane that connects to the PGND exposed pad (EP). 2. Have a single point ground. The ground connections for the feedback, soft-start, and enable components should be routed to the AGND pin of the device. This prevents any switched or load currents from flowing in the analog ground traces. If not properly handled, poor grounding can result in degraded load regulation or erratic output voltage ripple behavior. Additionally provide a (15) As a result, approximately 27.42 square cm of 2 oz copper on top and bottom layers is the minimum required area for the example PCB design. This is 5.23 x 5.23 cm (2.06 x 2.06 in) square. The PCB copper heat sink must be connected to the exposed pad. For best performance, use approximately 100, 12mil (305 μm) thermal vias spaced 59 mil (1.5 mm) apart connect the top copper to the bottom copper. Another way to estimate the temperature rise of a design is using θJA. An estimate of θJA for varying heat sinking copper areas and airflows can be found in the typical applications curves. If our design required the same operating conditions www.national.com 16 PRE-BIASED STARTUP The LMZ13608 will properly start up into a pre-biased output. This startup situation is common in multiple rail logic applications where current paths may exist between different power rails during the startup sequence. The following scope capture shows proper behavior in this mode. Trace one is Enable going high. Trace two is 1.8V pre-bias rising to 3.3V. Trace three is the SS voltage with a CSS= 0.47uF. Risetime determined by CSS. Pre-Biased Startup 30151485 Additional Features DISCONTINUOUS CONDUCTION AND CONTINUOUS CONDUCTION MODES At light load the regulator will operate in discontinuous conduction mode (DCM). With load currents above the critical conduction point, it will operate in continuous conduction mode (CCM). When operating in DCM, inductor current is maintained to an average value equaling Iout . In DCM the low-side switch will turn off when the inductor current falls to zero, this causes the inductor current to resonate. Although it is in DCM, the current is allowed to go slightly negative to charge the bootstrap capacitor. In CCM, current flows through the inductor through the entire switching cycle and never falls to zero during the off-time. Following is a comparison pair of waveforms showing both the CCM (upper) and DCM operating modes. OUTPUT OVER-VOLTAGE PROTECTION If the voltage at FB is greater than a 0.86V internal reference, the output of the error amplifier is pulled toward ground, causing VOUT to fall. CURRENT LIMIT The LMZ13608 is protected by both low side (LS) and high side (HS) current limit circuitry. The LS current limit detection is carried out during the off-time by monitoring the current through the LS synchronous MOSFET. Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows through the load, the PGND pin and the internal synchronous MOSFET. If this current exceeds 13A (typical) the current limit comparator disables the start of the next switching period. Switching cycles are prohibited until current drops below the limit. It should also be noted that d.c. current limit is dependent on duty cycle as illustrated in the graph in the typical performance section. The HS current limit monitors the current of top side MOSFET. Once HS current limit is detected (16A typical) , the HS MOSFET is shutoff immediately, until the next cycle. Exceeding HS current limit causes VOUT to fall. Typical behavior of exceeding LS current limit is that fSW drops to 1/2 of the operating frequency. CCM and DCM Operating Modes VIN = 12V, VO = 3.3V, IO = 3A/0.3A THERMAL PROTECTION The junction temperature of the LMZ13608 should not be allowed to exceed its maximum ratings. Thermal protection is implemented by an internal Thermal Shutdown circuit which activates at 165 °C (typ) causing the device to enter a low power standby state. In this state the main MOSFET remains off causing VOUT to fall, and additionally the CSS capacitor is discharged to ground. Thermal protection helps prevent catastrophic failures for accidental device overheating. When the junction temperature falls back below 150 °C (typ Hyst = 15°C) the SS pin is released, VOUT rises smoothly, and normal operation resumes. Applications requiring maximum output current especially those at high input voltage may require additional derating at elevated temperatures. 30151486 The approximate formula for determining the DCM/CCM boundary is as follows: (17) 17 www.national.com LMZ13608 single point ground connection from pin 4 (AGND) to EP/ PGND. 3. Minimize trace length to the FB pin. Both feedback resistors, RFBT and RFBB should be located close to the FB pin. Since the FB node is high impedance, maintain the copper area as small as possible. The traces from RFBT, RFBB should be routed away from the body of the LMZ13608 to minimize possible noise pickup. 4. Make input and output bus connections as wide as possible. This reduces any voltage drops on the input or output of the converter and maximizes efficiency. To optimize voltage accuracy at the load, ensure that a separate feedback voltage sense trace is made to the load. Doing so will correct for voltage drops and provide optimum output accuracy. 5. Provide adequate device heat-sinking. Use an array of heat-sinking vias to connect the exposed pad to the ground plane on the bottom PCB layer. If the PCB has multiple copper layers, these thermal vias can also be connected to inner layer heat-spreading ground planes. For best results use a 10 x 10 via array or larger with a minimum via diameter of 12mil (305 μm) thermal vias spaced 46.8mil (1.5 mm). Ensure enough copper area is used for heat-sinking to keep the junction temperature below 125°C. LMZ13608 The inductor internal to the module is 2.2 μH. This value was chosen as a good balance between low and high input voltage applications. The main parameter affected by the inductor is the amplitude of the inductor ripple current (ΔiL). ΔiL can be calculated with: Where V IN is the maximum input voltage and fSW is typically 359 kHz. If the output current IOUT is determined by assuming that IOUT = IL, the higher and lower peak of ΔiL can be determined. (18) Typical Application Schematic Diagram and BOM 301514a1 FIGURE 4. Typical Application Bill of Materials — Table 1 Ref Des Description Case Size Manufacturer Manufacturer P/N U1 SIMPLE SWITCHER ® TO-PMOD-11 National Semiconductor LMZ13608TZ CIN1,6 (OPT) 0.047 µF, 50V, X7R 1206 Yageo America CC1206KRX7R9BB473 UMK325BJ106MM-T CIN2,3,4 10 µF, 50V, X7R 1210 Taiyo Yuden CIN5 (OPT) CAP, AL, 150µF, 50V Radial G Panasonic EEE-FK1H151P CO1,5 (OPT) 0.047 µF, 50V, X7R 1206 Yageo America CC1206KRX7R9BB473 CO2 (OPT) 47 µF, 10V, X7R 1210 Murata GRM32ER61A476KE20L CO3,4 330 μF, 6.3V, 0.015 ohm CAPSMT_6_UE Kemet T520D337M006ATE015 RFBT 3.32 kΩ 0805 Panasonic ERJ-6ENF3321V RFBB 1.07 kΩ 0805 Panasonic ERJ-6ENF1071V RENT 42.2 kΩ 0805 Panasonic ERJ-6ENF4222V RENB 12.7 kΩ 0805 Panasonic ERJ-6ENF1272V CSS 0.47 μF, ±10%, X7R, 16V 0805 AVX 0805YC474KAT2A D1 (OPT) 5.1V, 0.5W SOD-123 Diodes Inc. MMSZ5231BS-7-F www.national.com 18 LMZ13608 30151488 30151489 FIGURE 5. Layout example 19 www.national.com LMZ13608 www.national.com 20 LMZ13608 Physical Dimensions inches (millimeters) unless otherwise noted 11-Lead TZA Package NS Package Number TZA11A 21 www.national.com LMZ13608 8A SIMPLE SWITCHER® Power Module with 36V Maximum Input Voltage Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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