Universal Operational Amplifier Evaluation Module User’s Guide March 1999 Mixed-Signal Products SLVU006A IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1999, Texas Instruments Incorporated Preface Related Documentation From Texas Instruments J J Amplifiers, Comparators, and Special Functions Data Book (literature number SLYD011). This data book contains data sheets and other information on the TI operational amplifiers that can be used with this evaluation module. Power Supply Circuits Data Book (literature number SLVD002). This data book contains data sheets and other information on the TI shunt regulators that can be used with this evaluation module. FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. Trademarks TI is a trademark of Texas Instruments Incorporated. Chapter Title—Attribute Reference iii iv Running Title—Attribute Reference Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 2 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Physical Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Area 100 – SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Area 200 – TSSOP or MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 Area 300 – SOT23-5A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Area 400 – SOT23-5B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 3 Example Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Schematic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Sallen-Key Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Sallen-Key High-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Noninverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 Two Operational Amplifier Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7 Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3-1 3-2 3-3 3-5 3-6 3-7 3-9 Chapter Title—Attribute Reference v Running Title—Attribute Reference Figures 2–1 2–2 2–3 2–4 2–5 2–6 2–7 2–8 2–9 Area 100 Schematic – SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Area 200 Schematic – TSSOP and MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TLV22X1 Device Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Area 300 Schematic – SOT23–5A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TLV2771 and TLV2461 Device Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Area 400 Schematic – SOT23–5B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Operational Amplifier EVM Board Component Placement . . . . . . . . . . . . . . . . . Universal Operational Amplifier EVM Board Layout Top . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Operational Amplifier EVM Board Layout Bottom . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2-4 2-5 2-5 2-6 2-6 2-7 2-8 2-9 3–1 3–2 3–3 3–4 3–5 3–6 Sallen-Key Low-Pass Filter with Dual Supply Using Area 100 . . . . . . . . . . . . . . . . . . . . . . . Sallen-Key High-Pass Filter with Single Supply Using Area 200 . . . . . . . . . . . . . . . . . . . . . Inverting Amplifier with Dual Supply Using Area 300 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noninverting Amplifier with Single Supply Using Area 400 . . . . . . . . . . . . . . . . . . . . . . . . . . Two Operational Amplifier Instrumentation Amplifier with Single Supply . . . . . . . . . . . . . . Single Operational Amplifier Differential Amplifier with Single Supply . . . . . . . . . . . . . . . . . 3-2 3-4 3-5 3-6 3-8 3-9 vi Chapter 1 Introduction This User’s Guide describes a universal operational amplifier (op amp) evaluation module (EVM) that simplifies evaluation of surface-mount op amp. Topic Page 1.1 Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 Introduction 1-1 Design Features 1.1 Design Features The evaluation module board design allows many different circuits to be constructed easily and quickly. The board has four separate circuit development areas that can be snapped apart and separated. Areas 100 and 200 are for dual op amps in the SOIC and TSSOP/MSOP packages. Areas 300 and 400 are for SOT23–5 single operational amplifier packages. A few possible circuits are listed below: J J J J J J J J J J J Voltage Follower Noninverting Amplifier Inverting Amplifier Simple or Algebraic Summing Amplifier Difference Amplifier Current-to-Voltage Converter Voltage–to-Current Converter Integrator/Low-Pass Filter Differentiator/High-Pass Filter Instrumentation Amplifier Sallen-Key Filter The EVM PCB is of two-layer construction, with a ground plane on the solder side. Circuit performance should be comparable to final production designs. 1.2 Power Requirements The devices and designs that are used dictate the input power requirements. Three input terminals are provided for each area of the board: Vx+ GNDx Vx– Positive input power for area x00 i.e., V1+ ⇒ area 100 Ground reference for area x00 i.e., GND2 ⇒ area 200 Negative input power for area x00 i.e., V4– ⇒ area 400 Each area has four bypass capacitors, two for the positive supply, and two for the negative supply. Each supply should have a 1-µF to 10-µF capacitor for low frequency bypassing and a 0.01-µF to 0.1-µF capacitor for high frequency bypassing. When using single supply circuits, the negative supply is shorted to ground by bridging Cx02 or Cx06, and power input is between Vx+ and GNDx. The voltage reference circuitry is provided for single supply applications that require a reference voltage to be generated. 1-2 Introduction Chapter 2 Evaluation Module Layout This chapter describes and shows the universal op amp EVM board layout and the relationships between the four areas. Topic Page 2.1 Physical Consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2 2.2 Area 100 – SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3 2.3 Area 200 – TSSOP or MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4 2.4 Area 300 – SOT23-5A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5 2.5 Area 400 – SOT23-5B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6 2.6 Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7 2.7 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–8 Evaluation Module Layout 2-1 Physical Considerations 2.1 Physical Considerations The EVM board has four circuit development areas. If a specific area is desired, it can be separated from the others by breaking along the score lines. The circuit layout in each area supports an op amp package, voltage reference, and ancillary devices. The op amp package is unique to each area as described in the following paragraphs. The voltage reference and supporting devices are the same for all areas. Surface-mount or through-hole devices can be used for all capacitors and resistors on the board. The voltage reference can be either surface mount or through hole. If surfacemount is desired, the TLV431ACDBV5 or TLV431AIDBV5 adjustable shunt regulators can be used. If through hole is desired, then the TLV431ACLP, TLV431AILP, TL431CLP, TL431ACLP, TL431ILP or TL431AILP adjustable shunt regulators can be used. Refer to Texas Instruments’ Power Supply Circuits Data Book (literature number SLVD002) for details on usage of these shunt regulators. Each passive component, resistor and capacitor, has a surface-mount 1206 foot print with through holes at 0.2″ spacing on the outside of the 1206 pads. Therefore, either surface-mount or through-hole parts can be used. 2-2 Evaluation Module Layout Area 100 – SOIC 2.2 Area 100 – SOIC Area 100 uses 1xx reference designators, and is compatible with dual op amps in 8-pin SOIC packages. Most dual op amps are available in this package. This surface-mount package is designated by a D suffix in TI part numbers as in TLV2422CD, TLV2342ID, TLV2252ID, etc. Refer to Figure 2–1 for a schematic. Figure 2–1. Area 100 Schematic – SOIC C105 R118 V1+ R106 R105 C112 A101– V1+ C104 V1+ R107 C103 A102– GND1 R108 2 R119 A103+ C109 C110 3 + 1 4 R109 A104+ V1– Power Supply Bypass 8 – U101a A1OUT 1/2 Dual OP Amp V1– V1– R117 C111 C106 V1+ C102 R112 R114 VREF1 R103 R104 C107 B101– R115 R C R102 U102 A B102– R101 6 R111 B103+ – 5 + 7 U101b R110 R116 B1OUT 1/2 Dual OP Amp B104+ Voltage Reference R113 C108 C101 Evaluation Module Layout 2-3 Area 200 – TSSOP or MSOP 2.3 Area 200 – TSSOP or MSOP Area 200 uses 2xx reference designators, and is compatible with dual op amps in an 8-pin TSSOP or MSOP package. The TSSOP package is designated by a PW suffix in TI part numbers as in TLV2422CPWLE, TLV2342IPWLE, TLV2252AIPWLE, etc. The MSOP package is designated by a DGK suffix in TI part numbers as in TLV2462CDGK. Refer to Figure 2–2 for a schematic. Figure 2–2. Area 200 Schematic – TSSOP and MSOP C205 R218 V2+ R206 R205 C212 A201– V2+ C204 V2+ R207 C203 A202– GND2 R208 2 R219 A203+ C209 C210 8 – 3 + Power Supply Bypass 4 R209 A204+ V1– 1 U201a A2OUT 1/2 Dual OP Amp V2– V2– R217 C211 C206 V2+ C202 R212 R214 VREF2 R203 R204 C207 B201– R215 R C R202 U202 A B202– R201 6 R211 B203+ 5 – 7 + U201b R210 R216 B2OUT 1/2 Dual OP Amp B204+ Voltage Reference R213 C208 C201 2-4 Evaluation Module Layout Area 300 – SOT23-5A 2.4 Area 300 – SOT23-5A Area 300 uses 3xx reference designators, and is compatible with single op amps in the 5-pin SOT-23 package with the pinout used for the TLV22X1 as shown in Figure 2–3. This surface-mount package is designated by a DBV suffix in TI part numbers as in TLV2211CDBV, TLV2221CDBV, TLV2361CDBV, TLV2231IDBV, etc. Note: other parts like TLV2771CDBV, TLV2711CDBV, TLV2461CDBV, etc., follow different pin-out schemes, which are not compatible with this layout. See Figure 2–4 for a schematic. Figure 2–3. TLV22X1 Device Pinout IN+ 1 VDD–/GND 2 IN– 3 5 VDD+ 4 OUT Figure 2–4. Area 300 Schematic – SOT23-5A C305 R318 V3+ R306 R305 C312 301– V3+ C304 V3+ R307 C303 302– GND3 R308 3 R319 303+ C309 C310 R309 304+ V3– Power Supply Bypass 5 – 1 + 4 2 3OUT U301 V3– V3– R317 C311 C306 V3+ R314 VREF3 R315 R C U302 A R316 Voltage Reference Evaluation Module Layout 2-5 Area 400 – SOT23-5B 2.5 Area 400 – SOT23-5B Area 400 uses 4xx reference designators, and is compatible with single op amps in the 5-pin SOT-23 package with the pinout used for the TLV2271CDBV and TLV2461CDBV as shown in Figure 2–5. This surface-mount package is designated by a DBV suffix in TI part numbers as in TLV2771CDBV and TLV2461CDBV. Note: earlier parts like TLV2221CDBV, TLV2231IDBV, TLV2361CDB, and TLV2711CDBV, etc., follow a different pin-out scheme, which is not compatible with this layout. Refer to Figure 2–6 for a schematic. Figure 2–5. TLV2771 and TLV2461 Device Pinout OUT 1 VDD–/GND 2 IN+ 3 5 VDD+ 4 IN– Figure 2–6. Area 400 Schematic – SOT23-5B C405 R418 V4+ R406 R405 C412 401– V4+ C404 V4+ R407 C403 402– GND4 R408 4 R419 403+ C409 C410 R409 404+ V4– Power Supply Bypass 5 – 3 + 1 2 4OUT U401 V4– V4– R417 C411 C406 V4+ R414 VREF4 R415 R C U402 A R416 Voltage Reference 2-6 Evaluation Module Layout Component Placement 2.6 Component Placement Figure 2–7 shows component placement for the EVM board. Figure 2–7. Universal Operational Amplifier EVM Board Component Placement Area 100 – SOIC Area 200 – TSSOP/MSOP UNIVERSAL OP AMP EVM SOIC SLOP120-1 1998 UNIVERSAL OP AMP EVM TSSOP/MSOP SLOP120-2 1998 R101 R110 R219 R209 C101 R111 C212 R208 B104+ R102 C107 R218 C206 A204+ B103+ R103 R112 R217 R207 A203+ B102– R104 R113 C211 R206 A202– B101– C102 C108 C210 R205 A201– B1OUT C103 R114 C209 C205 A2OUT V1+ C104 U102 VREF1 GND1 R216 V2– R215 VREF2 U201 GND2 U101 R115 V1– U202 R116 A1OUT V2+ C204 B2OUT C105 C109 R214 C203 A101– R105 C110 C208 C202 B201– A102– R106 C111 R213 R204 B202– A103+ R107 R117 R212 R203 B203+ A104+ C106 R118 C207 R202 B204+ R108 C112 R211 C201 R109 R119 R210 R201 Score Line R417 R415 R416 U402 R414 VREF4 404+ V4– 403+ 4OUT V4+ C411 R409 R408 R419 C406 C410 C409 U401 C404 C403 402– GND4 401– C405 R407 R405 R418 R316 UNIVERSAL OP AMP EVM SOT23-5A SLOP120-3 1998 C412 R315 R406 R317 U302 R314 VREF3 304+ V3+ 303+ GND3 V3– 3OUT 302– 301– C311 R309 R308 R319 C303 C306 C304 C309 C310 C305 R305 R307 C312 R306 R318 U301 UNIVERSAL OP AMP EVM SOT23-5B SLOP120-4 1998 Area 300 – SOT23-5A Area 400 – SOT23-5B Score Line Evaluation Module Layout 2-7 Board Layout 2.7 Board Layout Figures 2–8 and 2–9 show the EVM top and bottom board layouts, respectively. Figure 2–8. Universal Operational Amplifier EVM Board Layout Top 2-8 Evaluation Module Layout Board Layout Figure 2–9. Universal Operational Amplifier EVM Board Layout Bottom Evaluation Module Layout 2-9 2-10 Evaluation Module Layout Chapter 3 Example Circuits This chapter shows and discusses several example circuits that can be constructed using the universal operational amplifier EVM. The circuits are all classic designs that can be found in most operational amplifier design books. Topic Page 3.1 Schematic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1 3.2 Sallen-Key Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2 3.3 Sallen-Key High-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3 3.4 Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5 3.5 Noninverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6 3.6 Two Operational Amplifier Instrumentation Amplifiers . . . . . . . . . . . 3–7 3.7 Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–9 3.1 Schematic Conventions Figures 3–1 through 3–6 show schematics for a sampling of circuits that can be constructed on the Universal Operational Amplifier EVM. The components that are placed on the board are shown in bold and unused components are blanked out. Jumpers and other changes are noted. These examples are only a few of the many circuits that can be built on the EVM. Example Circuits 3-1 Sallen-Key Low-Pass Filter 3.2 Sallen-Key Low-Pass Filter Figure 3–1 shows area 100 equipped with a dual operational amplifier configured as a second-order Sallen-Key low-pass filter using dual-power supplies. Basic set up is done by proper choice of resistors R and mR, and capacitors C and nC. The transfer function is: V OUT V IN Where: + 1 ǒ ń Ǔ ) ǒjńQǓǒfńfoǓ 1 – f fo 2 fo + 2p Ǹm1 n RC Q + mǸm) n1 And Figure 3–1. Sallen-Key Low-Pass Filter with Dual Supply Using Area 100 R118 C105 V1+ R105 R106 C104 0.1 µ F C103 1µ F R107 A102– GND1 C109 0.1 µ F A103+ C110 1µ F R108 mR 2 R119 1 U101a Vin A1OUT 1/2 Dual OP Amp V1– + R117 C111 – 1 1– (f/fo)2 + (j/Q)(f/fo) = 8 4 R A104+ V1– – 3 + R109 Power Supply Bypass Vout Vin Jumper V1+ A101– V1+ V1– C112 fo = 1 2π √mn RC Q= √mn m+1 C106 nC V1+ R112 C102 R101 R104 VREF1 R103 C107 Jumper B101– R114 R C R102 U102 A B102– B103+ R115 R101 6 – 5 + R111 7 U101b R110 B1OUT 1/2 Dual OP Amp Voltage Reference Not Used Jumper B104+ Not Used R113 C108 C101 3-2 Example Circuits Sallen-Key High-Pass Filter 3.3 Sallen-Key High-Pass Filter Figure 3–2 shows area 200 equipped with a dual operational amplifier configured as a second-order Sallen-Key high-pass filter using single-supply power input. Basic setup is done by proper choice of resistors R and mR, and capacitors C and nC. Note that capacitors should be used for components R210 and R211, and a resistor for C201. The transfer function for the circuit as shown is: V OUT Where: + VIN ȡȧ ǒ ń Ǔ Ȣ ) ǒ ń Ǔǒ ń Ǔ – f fo 1 fo + 2p Ǹm1 n RC Q + nǸm) n1 And 2 ȣȧ) ǒń Ǔ Ȥ j Q f fo – f fo 2 VREF2 The TL431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V2+ in a 5 V system. Another option is to adjust resistors R215 and R216 for the desired VREF2 voltage. The formula for calculating VREF2 is: VREF2 ǒ Ǔ ) R216 + 2.50 V R215R216 Example Circuits 3-3 Sallen-Key High-Pass Filter Figure 3–2. Sallen-Key High-Pass Filter with Single Supply Using Area 200 R218 C205 V2+ R205 R206 Jumper C204 0.1 µF C203 1 µF R207 A202– R208 R219 A203+ C209 C210 R209 A204+ V2– V2– Power Supply Bypass C211 Jumper V1– Jumper V2+ 8 2 – 1 3 + U201a 4 A201– V2+ GND2 C212 A2OUT 1/2 Dual OP Amp Not Used R217 C206 R212 VREF2 = 2.5 V V2+ R204 R203 C207 Jumper B202– 6 R201 5 B204+ R215 R mR R210 C A C + R216 Vin VOUT = VIN – 7 + U201b 1+(j/Q)(f/fo) – (f/fo)2 + VREF2 B2OUT 1/2 Dual OP Amp R211 B203+ U202 TL431ACLP –(f/fo)2 Jumper B201– R202 R214 2.2 kΩ C202 fo = 1 2π √mn RC Q= √mn m+1 nC C208 R213 – Jumper B204 + to VREF2 Voltage Reference 3-4 C201 R Example Circuits Inverting Amplifier 3.4 Inverting Amplifier Figure 3–3 shows area 300 equipped with a single operational amplifier configured as an inverting amplifier using dual power supplies. Note the pinout for the operational amplifier in area 300 follows the TLV2211 type pinout. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: V OUT + –VIN R305 R307 To cancel the effects of input bias current, set R317 = R305 || R307, or use a 0 Ω jumper for R317 if the operational amplifier is a low input bias operational amplifier. Figure 3–3. Inverting Amplifier with Dual Supply Using Area 300 C305 R318 V3+ R306 301– V3+ C304 0.1 µF C309 0.1 µF R305 VOUT = –VIN R307 V3+ C303 1 µF R307 302– GND3 V3– R305 C312 R308 3 R319 303+ C310 1 µF R309 + 304+ – 1 + 5 4 2 V3– Vin Power Supply Bypass V3– V3+ – C311 3OUT U301 R317 = R305 II R307, or Short if Using Low Input Bias Op Amp R317 C306 R314 VREF3 R315 R C U302 A R316 Voltage Reference Not Used Example Circuits 3-5 Noninverting Amplifier 3.5 Noninverting Amplifier Figure 3–4 shows area 400 equipped with a single operational amplifier configured as a noninverting amplifier with single supply power input. Note the pinout for the operational amplifier in area 400 follows the TLV2771 type pinout. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: V OUT ǒ Ǔ ) VREF4 + VIN 1 ) R405 R407 Note that the input signal must be referenced to VREF4. To cancel the effects of input bias current, set R409 = R405 || R407, or use a 0 Ω jumper for R409 if the operational amplifier is a low input bias operational amplifier. The TL431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V4+ in a 3 V system. Another option is to adjust resistors R415 and R416 for the desired VREF4 voltage. The formula for calculating VREF4 is: VREF4 ǒ Ǔ ) R416 + 1.24 V R415R416 Figure 3–4. Non-Inverting Amplifier with Single Supply Using Area 400 V4+ R418 C405 V4+ C404 0.1 µF V4– R406 C409 R405 C412 401– C410 R407 5 402– R408 403+ Power Supply Bypass V4– ( V4+ Jumper 402 – to VREF4 Jumper GND4 C403 1 µF R419 R409 VOUT = VIN +1 4 – 3 + 4 2 R405 R407 ) + VREF4 4OUT U401 404+ V4– V4+ + R414 2.2 kΩ C411 R417 Vin – Jumper VREF4 = 1.24 V C406 R415 C R U402 = TLV431ACDBV5 A R416 Input Signal With Reference to VREF4 R409 = R405 II R407, or Short if Using Low Input Bias Op Amp Voltage Reference 3-6 Example Circuits Two Operational Amplifier Instrumentation Amplifier 3.6 Two Operational Amplifier Instrumentation Amplifier Figure 3–5 shows area 200 equipped with a dual operational amplifier configured as a two-operational-amplifier instrumentation amplifier using a voltage reference and single power supply. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: V OUT ǒ Ǔ + VIN 1 ) 2R205 ) R205 ) VREF2 R207 R206 Where R205 = R202 and R206 = R204 To cancel the effects of input bias current, set R209 = R205 || R207 and set R210 = R202 ||R204, or use a 0 Ω jumper for R209 and R210 if the operational amplifier is a low input bias operational amplifier. The TLV431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V2+ in a 3 V system. Another option is to adjust resistors R215 and R216 for the desired VREF2 voltage. The formula for calculating VREF2 is: VREF2 ǒ Ǔ ) R216 + 1.24 V R215R216 Example Circuits 3-7 Two Operational Amplifier Instrumentation Amplifier Figure 3–5. Two Operational Amplifier Instrumentation Amplifier with Single Supply Using Area 200 C205 R218 Jumper A201 – to B2OUT R205 R206 R209 = R205– II R207 or Short if Using Low Input Bias Op Amp C212 Jumper R207 A202– V2+ R208 A204+ Jumper V1– – 3 + R209 V2+ GND2 V2+ 2 R219 A203+ C204 0.1 µF C209 C211 Jumper A202– to B201– V2– C206 Vin C202 R212 Jumper VREF2 to B202– R203 B201– Jumper B202– C R204 C207 Jumper R202 R215 B203+ R201 6 R211 5 – + 7 U201b U202 A TL431ACDBV5 R216 Voltage Reference A2OUT 1/2 Dual OP Amp R217 – Jumper 4 V2– + R 1 U201a R205 = R202 R206 = R204 C210 R214 2.2 kΩ VREF2 = 1.24 V )+ VREF2 8 C203 1 µF Power Supply Bypass V2+ ( 2R205 R205 VOUT = Vin 1+ R207 + R206 A201– B2OUT 1/2 Dual OP Amp R210 B204+ R210 = R202 II R204 or Short if Using Low Input Bias Op Amp R213 C208 C201 3-8 Example Circuits Differential Amplifier 3.7 Differential Amplifier Figure 3–6 shows area 300 equipped with a single operational amplifier configured as a differential amplifier using a voltage reference and single power supply. Basic setup is done by choice of input and feedback resistors. The transfer function for the circuit as shown is: V OUT Where R305 R307 ǒ Ǔ) + VIN R305 R307 VREF3 + R309 R308 The TLV431 adjustable precision shunt regulator, configured as shown, provides a low impedance reference for the circuit at about 1/2 V3+ in a 3 V system. Another option is to adjust resistors R315 and R316 for the desired VREF3 voltage. The formula for calculating VREF3 is: VREF3 ǒ Ǔ ) R316 + 1.24 V R315R316 Figure 3–6. Single Operational Amplifier Differential Amplifier with Single Supply Using Area 300 R318 C305 V3+ R305 R306 301– V3+ C310 + R307 302– Vin 303+ – R308 R309 3 R319 Jumper 304+ V3– Power Supply Bypass ( R305 Vout = Vin R307 V3+ C303 1 µF Jumper C304 0.1 µF GND3 C312 – 1 + ) + VREF3 5 4 2 3OUT U301 V3– R305 R309 = R307 R308 V3– C311 V3+ R317 R314 2.2 kΩ C306 VREF3 = 1.24 V R315 R C A Jumper 304+ to VREF3 U302 TL431ACDBV5 R316 Voltage Reference Example Circuits 3-9 3-10 Example Circuits