TI SM73303

SM73303
SM73303 5 MHz, Low Noise, RRO, Dual Operational Amplifier with CMOS Input
Literature Number: SNOSB94A
SM73303
5 MHz, Low Noise, RRO, Dual Operational Amplifier with
CMOS Input
General Description
Features
The SM73303 is a dual operational amplifier with both low
supply voltage and low supply current, making it ideal for
portable applications. The SM73303 CMOS input stage
drives the IBIAS current down to 0.6 pA; this coupled with the
makes the SM73303 perfect
low noise voltage of 12.8 nV/
for applications requiring active filters, transimpedance amplifiers, and HDD vibration cancellation circuitry.
Along with great noise sensitivity, small signal applications
will benefit from the large gain bandwidth of 5 MHz coupled
with the minimal supply current of 1.6 mA and a slew rate of
5.8 V/μs.
The SM73303 provides rail-to-rail output swing into heavy
loads. The input common-mode voltage range includes
ground, which is ideal for ground sensing applications.
The SM73303 has a supply voltage spanning 2.7V to 5V and
is offered in an 8-pin MSOP package that functions across the
wide temperature range of −40°C to 85°C. This small package
makes it possible to place the SM73303 next to sensors, thus
reducing external noise pickup.
(Typical values, V+ = 3.3V, TA = 25°C, unless otherwise specified)
12.8 nV/
■ Input noise voltage
0.6 pA
■ Input bias current
1.6 mV
■ Offset voltage
80 dB
■ CMRR
122 dB
■ Open loop gain
■ Rail-to-rail output
5 MHz
■ GBW
5.8 V/µs
■ Slew rate
1.6 mA
■ Supply current
2.7V to 5V
■ Supply voltage range
−40°C to 85°C
■ Operating temperature
■ 8-pin MSOP package
Applications
■
■
■
■
Active filters
Transimpedance amplifiers
Audio preamp
HDD vibration cancellation circuitry
Typical Application Circuit
30157839
High Gain Band Pass Filter
© 2011 National Semiconductor Corporation
301578
www.national.com
SM73303 5 MHz, Low Noise, RRO, Dual Operational Amplifier with CMOS Input
July 5, 2011
SM73303
Junction Temperature (Note 3)
Mounting Temperature
Infrared or Convection (20 sec)
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
Machine Model
Supply Voltage (V+ – V−)
Storage Temperature Range
Operating Ratings
260°C
(Note 1)
Supply Voltage
Temperature Range
2000V
200V
5.5V
−65°C to 150°C
150°C max
2.7V to 5V
−40°C to 85°C
Thermal Resistance (θJA)
8-Pin MSOP
195°C/W
3.3V Electrical Characteristics (Note 4) Unless otherwise specified, all limits are guaranteed for
TJ = 25°C, V+ = 3.3V, V− = 0V. VCM = V+/2. Boldface limits apply at the temperature extremes (Note 5).
Symbol
Parameter
Condition
Min
(Note 6)
Typ
(Note 7)
Max
(Note 6)
Units
VOS
Input Offset Voltage
VCM = 1V
1.6
5
6
mV
IB
Input Bias Current
(Note 8)
0.6
115
130
pA
IOS
Input Offset Current
CMRR
Common Mode Rejection Ratio
0 ≤ VCM ≤ 2.1V
PSRR
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 5V, VCM = 1V
CMVR
Common Mode Voltage Range
For CMRR ≥ 50 dB
−0.2
AVOL
Open Loop Voltage Gain
Sourcing
RL = 10 kΩ to V+/2,
VO = 1.65V to 2.9V
80
76
122
Sinking
RL = 10 kΩ to V+/2,
VO = 0.4V to 1.65V
80
76
122
Sourcing
RL = 600Ω to V+/2,
VO = 1.65V to 2.8V
80
76
105
Sinking
RL = 600Ω to V+/2,
VO = 0.5V to 1.65V
80
76
112
RL = 10 kΩ to V+/2
3.22
3.17
3.29
RL = 600Ω to V+/2
3.12
3.07
3.22
VO
Output Swing High
Output Swing Low
IOUT
Output Current
1
pA
60
50
80
dB
70
60
82
dB
2.2
dB
RL = 10 kΩ to V+/2
0.03
0.12
0.16
RL = 600Ω to V+/2
0.07
0.23
0.27
Sourcing, VO = 0V
20
15
31
Sinking, VO = 3.3V
30
25
41
V
V
mA
IS
Supply Current
VCM = 1V
1.6
SR
Slew Rate
(Note 9)
5.8
V/µs
GBW
Gain Bandwidth
5
MHz
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2
2.0
3
mA
Parameter
Min
(Note 6)
Condition
Typ
(Note 7)
Max
(Note 6)
Units
en
Input-Referred Voltage Noise
f = 1 kHz
12.8
nV/
in
Input-Referred Current Noise
f = 1 kHz
0.01
pA/
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 100 pF.
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX)-TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factor testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >
TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device maybe permanently degraded, either mechanically or electrically.
Note 5: Boldface limits apply to temperature range of −40°C to 85°C.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Typical values represent the most likely parametric norm.
Note 8: Input bias current is guaranteed by design.
Note 9: Number specified is the lower of the positive and negative slew rates.
Connection Diagram
8-Pin MSOP
30157840
Top View
Ordering Information
Package
Part Number
Package Marking
SM73303MM
8-Pin MSOP
SM73303MME
Transport Media
NSC Drawing
1k Units Tape and Reel
S303
250 Units Tape and Reel
SM73303MMX
MUA08A
3.5k Units Tape and Reel
3
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SM73303
Symbol
SM73303
Simplified Schematic
30157829
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4
SM73303
Typical Performance Characteristics
Unless otherwise specified, V+ 3.3V, TJ = 25°C.
Supply Current vs. Supply Voltage
Offset Voltage vs. Common Mode
30157806
30157805
Input Bias Current vs. Common Mode
Input Bias Current vs. Common Mode
30157827
30157826
Input Bias Current vs. Common Mode
Output Positive Swing vs. Supply Voltage
30157885
30157825
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SM73303
Output Negative Swing vs. Supply Voltage
Output Positive Swing vs. Supply Voltage
30157802
30157801
Output Negative Swing vs. Supply Voltage
Sinking Current vs. VOUT
30157884
30157803
Sourcing Current vs. VOUT
PSRR vs. Frequency
30157804
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30157831
6
SM73303
CMRR vs. Frequency
Crosstalk Rejection
30157836
30157837
Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response
30157835
30157833
Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
30157834
30157832
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SM73303
Open Loop Frequency vs. RL
Open Loop Frequency Response over Temperature
30157821
30157822
Open Loop Frequency Response vs. CL
Open Loop Frequency Response vs. CL
30157823
30157828
Voltage Noise vs. Frequency
30157824
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8
With the low supply current of only 1.6 mA, the SM73303 offers users the ability to maximize battery life. This makes the
SM73303 ideal for battery powered systems. The SM73303’s
rail-to-rail output swing provides the maximum possible dynamic range at the output. This is particularly important when
operating on low supply voltages.
CAPACITIVE LOAD TOLERANCE
The SM73303, when in a unity-gain configuration, can directly
drive large capacitive loads in unity-gain without oscillation.
The unity-gain follower is the most sensitive configuration to
capacitive loading; direct capacitive loading reduces the
phase margin of amplifiers. The combination of the amplifier’s
output impedance and the capacitive load induces phase lag.
This results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, the circuit in
Figure 1 can be used.
30157809
FIGURE 2. Indirectly Driving a Capacitive Load with DC
Accuracy
DIFFERENCE AMPLIFIER
The difference amplifier allows the subtraction of two voltages
or, as a special case, the cancellation of a signal common to
two inputs. It is useful as a computational amplifier in making
a differential to single-ended conversion or in rejecting a common mode signal.
30157807
FIGURE 1. Indirectly Driving a Capacitive Load using
Resistive Isolation
In Figure 1, the isolation resistor RISO and the load capacitor
CL form a pole to increase stability by adding more phase
margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO resistor value,
the more stable VOUT will be.
The circuit in Figure 2 is an improvement to the one in Figure
1 because it provides DC accuracy as well as AC stability. If
there were a load resistor in Figure 1, the output would be
voltage divided by RISO and the load resistor. Instead, in Figure 2, RF provides the DC accuracy by using feed-forward
techniques to connect VIN to RL. Due to the input bias current
of the SM73303, the designer must be cautious when choosing the value of RF. CF and RISO serve to counteract the loss
of phase margin by feeding the high frequency component of
the output signal back to the amplifier’s inverting input, there-
30157810
FIGURE 3. Difference Amplifier
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SM73303
by preserving phase margin in the overall feedback loop.
Increased capacitive drive is possible by increasing the value
of CF. This in turn will slow down the pulse response.
Application Information
SM73303
SINGLE-SUPPLY INVERTING AMPLIFIER
There may be cases where the input signal going into the
amplifier is negative. Because the amplifier is operating in
single supply voltage, a voltage divider using R3 and R4 is
implemented to bias the amplifier so the inverting input signal
is within the input common voltage range of the amplifier. The
capacitor C1 is placed between the inverting input and resistor
R1 to block the DC signal going into the AC signal source,
VIN. The values of R1 and C1 affect the cutoff frequency, fc =
½π R1C1. As a result, the output signal is centered around
mid-supply (if the voltage divider provides V+/2 at the noninverting input). The output can swing to both rails, maximizing the signal-to-noise ratio in a low voltage system.
FIGURE 4. Single-supply Inverting Amplifier
INSTRUMENTATION AMPLIFIER
Measurement of very small signals with an amplifier requires
close attention to the input impedance of the amplifier, the
overall signal gain from both inputs to the output, as well as,
the gain from each input to the output. This is because we are
only interested in the difference of the two inputs and the
common signal is considered noise. A classic solution is an
instrumentation amplifier. Instrumentation amplifiers have a
finite, accurate, and stable gain. Also they have extremely
high input impedances and very low output impedances. Finally they have an extremely high CMRR so that the amplifier
can only respond to the differential signal.
Three-Op-Amp Instrumentation Amplifier
A typical instrumentation amplifier is shown in Figure 5.
30157815
30157842
FIGURE 5. Three-Op-Amp Instrumentation Amplifier
By Ohm’s Law:
There are two stages in this configuration. The last stage, the
output stage, is a differential amplifier. In an ideal case the
two amplifiers of the first stage, the input stage, would be set
up as buffers to isolate the inputs. However they cannot be
connected as followers due to the mismatch of real amplifiers.
The circuit in Figure 5 utilizes a balancing resistor between
the two amplifiers to compensate for this mismatch. The product of the two stages of gain will be the gain of the instrumentation amplifier circuit. Ideally, the CMRR should be infinite.
However the output stage has a small non-zero common
mode gain which results from resistor mismatch.
In the input stage of the circuit, current is the same across all
resistors. This is due to the high input impedance and low
input bias current of the SM73303. With the node equations
we have:
(2)
However:
(3)
So we have:
(4)
(1)
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10
SM73303
Now looking at the output of the instrumentation amplifier:
Low Pass Filter
The following shows a very simple low pass filter.
(5)
Substituting from Equation 4:
(6)
This shows the gain of the instrumentation amplifier to be:
−K(2a+1)
Typical values for this circuit can be obtained by setting: a =
12 and K = 4. This results in an overall gain of −100.
Three SM73303 amplifiers are used along with 1% resistors
to minimize resistor mismatch. Resistors used to build the
circuit are: R1 = 21.6 kΩ, R11 = 1.8 kΩ, R2 = 2.5 kΩ with K =
40 and a = 12. This results in an overall gain of −K(2a+1) =
−1000.
30157853
FIGURE 7. Low Pass Filter
The transfer function can be expressed as follows:
By KCL:
Two-Op-Amp Instrumentation Amplifier
A two-op-amp instrumentation amplifier can also be used to
make a high-input impedance DC differential amplifier Figure
6). As in the three op amp circuit, this instrumentation amplifier requires precise resistor matching for good CMRR. R4
should be equal to R1, and R3 should equal R2.
(7)
Simplifying this further results in:
(8)
or
(9)
Now, substituting ω=2πf, so that the calculations are in f(Hz)
rather than in ω(rad/s), and setting the DC gain
and
30157813
(10)
FIGURE 6. Two-Op-Amp Instrumentation Amplifier
set:
ACTIVE FILTERS
Active filters are circuits with amplifiers, resistors, and capacitors. The use of amplifiers instead of inductors, which are
used in passive filters, enhances the circuit performance
while reducing the size and complexity of the filter. The simplest active filters are designed using an inverting op amp
configuration where at least one reactive element has been
added to the configuration. This means that the op amp will
provide "frequency-dependent" amplification, since reactive
elements are frequency dependent devices.
(11)
Low pass filters are known as lossy integrators because they
only behave as integrators at higher frequencies. The general
form of the bode plot can be predicted just by looking at the
transfer function. When the f/fO ratio is small, the capacitor is,
in effect, an open circuit and the amplifier behaves at a set
DC gain. Starting at fO, which is the −3 dB corner, the capacitor will have the dominant impedance and hence the circuit
will behave as an integrator and the signal will be attenuated
and eventually cut. The bode plot for this filter is shown in
Figure 8.
11
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SM73303
Looking at the transfer function, it is clear that when f/fO is
small, the capacitor is open and therefore, no signal is getting
to the amplifier. As the frequency increases the amplifier
starts operating. At f = fO the capacitor behaves like a short
circuit and the amplifier will have a constant, high frequency
gain of HO. Figure 10 shows the transfer function of this high
pass filter.
30157859
FIGURE 8. Low Pass Filter Transfer Function
High Pass Filter
The transfer function of a high pass filter can be derived in
much the same way as the previous example. A typical first
order high pass filter is shown below:
30157864
FIGURE 10. High Pass Filter Transfer Function
Band Pass Filter
Combining a low pass filter and a high pass filter will generate
a band pass filter. Figure 11 offers an example of this type of
circuit.
30157860
FIGURE 9. High Pass Filter
Writing the KCL for this circuit :
(V1 denotes the voltage between C and R1)
(12)
30157866
FIGURE 11. Band Pass Filter
(13)
In this network the input impedance forms the high pass filter
while the feedback impedance forms the low pass filter. If the
designer chooses the corner frequencies so that f1 < f2, then
all the frequencies between, f1 ≤ f ≤ f2, will pass through the
filter while frequencies below f1 and above f2 will be cut off.
The transfer function can be easily calculated using the same
methodology as before and is shown in Figure 12.
Solving these two equations to find the transfer function and
using:
(high frequency gain)
and
(15)
Which gives:
(14)
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12
(16)
30157870
30157868
FIGURE 12. Band Pass Filter Transfer Function
STATE VARIABLE ACTIVE FILTER
State variable active filters are circuits that can simultaneously represent high pass, band pass, and low pass filters.
The state variable active filter uses three separate amplifiers
to achieve this task. A typical state variable active filter is
shown in Figure 13. The first amplifier in the circuit is connected as a gain stage. The second and third amplifiers are
connected as integrators, which means they behave as low
pass filters. The feedback path from the output of the third
amplifier to the first amplifier enables this low frequency signal
to be fed back with a finite and fairly low closed loop gain. This
is while the high frequency signal on the input is still gained
up by the open loop gain of the first amplifier. This makes the
first amplifier a high pass filter. The high pass signal is then
fed into a low pass filter. The outcome is a band pass signal,
meaning the second amplifier is a band pass filter. This signal
is then fed into the third amplifiers input and so, the third amplifier behaves as a simple low pass filter.
30157871
For A1 the relationship between input and output is:
(17)
This relationship depends on the output of all the filters. The
input-output relationship for A2 can be expressed as:
(18)
And finally this relationship for A3 is as follows:
(19)
Re-arranging these equations, one can find the relationship
between VO and VIN (transfer function of the low pass filter),
VO1 and VIN (transfer function of the high pass filter), and
VO2 and VIN (transfer function of the band pass filter) These
relationships are as follows:
30157869
FIGURE 13. State Variable Active Filter
13
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SM73303
The transfer function of each filter needs to be calculated. The
derivations will be more trivial if each stage of the filter is
shown on its own.
The three components are:
Where
SM73303
Designing a band pass filter with a center frequency of 10 kHz
and Quality Factor of 5.5
To do this, first consider the Quality Factor. It is best to pick
convenient values for the capacitors. C2 = C3 = 1000 pF. Also,
choose R1 = R4 = 30 kΩ. Now values of R5 and R6 need to be
calculated. With the chosen values for the capacitors and resistors, Q reduces to:
Low Pass Filter
(20)
High Pass Filter
(24)
or
R5 = 10R6
R6 = 1.5 kΩ
R5 = 15 kΩ
(21)
Band Pass Filter
(25)
Also, for f = 10 kHz, the center frequency is
ωc = 2πf = 62.8 kHz.
Using the expressions above, the appropriate resistor values
will be R2 = R3 = 16 kΩ.
The DC gain of this circuit is:
(22)
The center frequency and Quality Factor for all of these filters
is the same. The values can be calculated in the following
manner:
(26)
(23)
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14
SM73303
Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin MSOP
NS Package Number MUA08A
15
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SM73303 5 MHz, Low Noise, RRO, Dual Operational Amplifier with CMOS Input
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