NJRC NJU6539FG1

NJU6539
PRELIMINARY
1/8, 1/9, 1/10 Duty
BITMAP LCD DRIVER with KEY SCAN
GENERAL DESCRIPTION
The NJU6539 is a 10-common x 65-segment bitmap LCD driver
to display graphics or characters.
It contains 650 bits display data RAM, microprocessor interface
circuit, common and segment drivers, key scan circuit, and general
output ports.
An image data from MPU through the serial interface is stored
into the 650 bits internal displayed on the LCD panel through the
commons and segments drivers.
The NJU6539 displays 10 x 65 dots graphics or 11-character
1-line by 5 x 7 dots character + 3 x 65 dots icons.
It contains key scan circuit transmitting the 25-keys maximum (5 x 5
= 25) to MPU.
Also it provides 4 general purpose output ports with PWM output
function maximum to drive LEDs or others directly.
Furthermore, the NJU6539 can select a LCD driving voltage out
of 16 steps voltage by the instruction adjust the display contrast of
LCD panel.
PACKAGE OUTLINE
NJU6539FG1
NJU6539FC2
FEATURES
Direct Correspondence between Display Data RAM and LCD Pixel
Display Data RAM
: 650-bits
LCD Drivers
: 65-seg, 10-com
Serial interface (SIO, SCL, CS)
Programmable Duty Ratio
1/8 Duty, 1/9 Duty, 1/10Duty
Bias Ratio
1/4 bias
25-key scan Function (5 x 5 matrix)
Needless for anti-reverse current diodes in key scan
General Output Ports with 128-steps PWM output (possible LED driving) maximum 4-ports
Useful Instruction Set
Display ON/OFF, Page Address Set, Column Address Set, ADC Select, Inverse Display ON/OFF, whole display
ON/OFF, Reset, EVR Register Set, Duty Select, Power Save mode set, General Output Port set, General Output Port
PWM data set, PWM slope set, PWM program Execute, General Output Port / Key scan output select, Display
Data write,
Bleeder Resistance On-chip
Software Contrast Control (16 steps)
Operating Voltage
Logic Operating Voltage
2.7 to 5.5V
LCD Driving Voltage
5.0 to 10.0V
Package Outline
QFP100-G1
QFP100-C2
C-MOS Technology
(Substrate: P)
Ver.2004-03-01
-1-
SCL
SIO
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
Po3
Po2
Po1
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
SEG65
SEG64
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
SEG65
SEG64
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
NJU6539
PIN CONFIGRATION
Po1
Po2
Po3
S1/Po4
S2
S3
S4
S5
K1
K2
K3
K4
K5
VDD
VLCD1
VLCD2
V0
V1
V2
VSS
OSC
RESb
CE
SCL
SIO
S1/Po4
S2
S3
S4
S5
K1
K2
K3
K4
K5
VDD
VLCD1
VLCD2
V0
V1
V2
VSS
OSC
RESb
CE
-2-
NJU6539FG1
NJU6539FC2
SEG50
SEG49
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
Ver.2004-03-01
NJU6539
SEG63
SEG64
SEG65
SEG1
SEG2
SEG3
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
BLOCK DIAGRAM
VLCD1
E.V.R.
Segment Driver
Common Driver
VLCD2
V0
V2
VSS
Ver.2004-03-01
Display Data RAM
Input
Buffer
Column Address Decoder
Key Data Buffer
Po3
Po2
Po1
General Output
Driver
Po4/S1
Key Scan
Control
S5
S4
S3
S2
Serial I/F
K1
K2
K3
K4
K5
RESET
CE
Power ON
Reset
Reset
RESb
Timing
Generator
SIO
Oscillator
SCL
OSC
Instruction Data Buffer
Page Address
Decoder
Instruction Decoder
V1
-3-
NJU6539
TERMINAL DESCRIPTION
No.
FG1
FC2
1 to 65
3 to 67
66 to 72 68 to 74
73 to 75 75 to 77
Symbol
I/O
Description
SEG1 to SEG65
COM1 to COM7
COM8 to COM10
O
O
O
Segment output terminal.
Common output terminal.
Icon common output terminal.
General output port
128-step PWM waveform output by MPU control.
General output port / Key scanning input terminal
Select General output port or Key scanning input terminal by the
instruction.
A function must be selected either Po3 or S0
76 to 78
78 to 80
Po1 to Po3
O
79
81
Po4/S1
O
General output port
128-step PWM waveform output by MPU control.
Key scanning input terminals
(No need for anti-reverse current diode in key scan)
80 to 83
82 to 85
S2 to S5
O
84 to 88
86 to 90
K1 to K5
I
89
90
91
92
93
94
95
91
92
93
94
94
96
97
VDD
VLCD1
VLCD2
V0
V1
V2
VSS
I
-4-
I
-
96
98
OSC
I/O
97
99
RESb
I
98
99
100
100
1
2
CE
SCL
SIO
I
I
I/O
Key scanning input terminals.
(No need for anti-reverse current diode in key scan)
Key scanning input terminals.
(with internal pull-down resistor)
Power supply terminal.(2.7V to 5.5V)
LCD driving voltage input terminal.
LCD driving voltage stabilization capacitor terminals.
Connect the capacitor between each terminal and Vss.
Ground terminal.
Osclator terminal.
Conect the external resistor.
Reset terminal. (with internal pull-up resistor)
In case of only Power-on Reset should be open.
Chip enable terminal
Serial clock input terminal
Serial Data input or output terminal
Ver.2004-03-01
NJU6539
APPLICATION CIRCUIT
VDD
VDD
COM1
VSS
COM10
RESb
CE
SC
SIO
SEG1
----
*1
VSS
MPU
VLCD1
VLCD2
V0
V1
V2
VLCD
*3
*3
*3
*3
----
*2
NJU6539
*3
VSS
10com 65seg
matrix LCD panel
SEG65
General output ports
Po1
Po2
Po3
Po4/S1
VSS
OSC
Po4/S1
S2
S3
S4
S5
K1
K2
K3
K4
K5
5 x5 key matrix *4
*1
*2
*3
*4
The rising time of Power source voltage at Power on and the falling time at Power off must keep over than 1ms because of
Voltage detection type Reset circuit operation.
SO terminal requires external pull-up resistor connecting to Power source of external MPU because of Open-drain type output.
This capacitor for bias voltage stabilization should be connected in accordance with display quality in application.
PO3 / S0 terminal is general output ports and Key scan signal output duplicated-function terminals. A function must be selected
either Segment output or other.
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
Ver.2004-03-01
-5-