NJRC NJU72040

NJU72040
Ground Referenced Stereo Headphone Amplifier
■ PACKAGE OUTLINE
„ GENERAL DESCRIPTION
The NJU72040 is an audio headphone amplifier .
Ground-referenced outputs eliminate output coupling
capacitor. The pop noise suppression circuit removes a pop
noise at the power-on and power-off.
It is suitable for audio headphone amplifer application
NJU72040V
„ APPLICATIONS
● Audio applications which have audio headphone interface
„ FEATURES
● Operating Voltage
● Operating Current
●
●
●
●
●
+2.7 to +3.6V
IDD=10.5mA typ.
+
at V =3.3V, No load, No Signal
Output Coupling Capacitor-less
Pop Noise Suppression Circuit
Gain Select
C-MOS Technology
Package Outline
SSOP14
„ BLOCK DIAGRAM
V+
inverted
phase
INL-
INRV+
INL+
OUTL
32Ω
Headphone
Reg
Pop Noise
Suppression
V+
INR+
Pop Noise
Suppression
V+
Bias
GAIN 100kΩ
Ver. 1.2E
OUTR
GND
CP
CN
Regulator
inverted
phase
MUTE
3MΩ
32Ω
Headphone
V+
V-
REF
Gain Select
–1–
NJU72040
„ PIN CONFIGURATION
1
14
INL-
INR-
INL+
INR+
OUTL
OUTR
NJU72040
V+
CP
MUTE
CN
V-
GAIN
REF
7
No.
1
2
3
4
5
6
7
–2–
GND
Symbol
Function
INLLch Inverted Input
INL+
Lch Noninverted Input
OUTL
Lch Output
V+
V+ Power Supply
CP
Flying Capacitor Positive Terminal
CN
Flying Capacitor Negative Terminal
GAIN
Gain Select
8
No.
8
9
10
11
12
13
14
Symbol
REF
VMUTE
GND
OUTR
INR+
INR-
Function
Reference Voltage Input
V- Power Supply
MUTE / Pop Noise Suppression
Ground
Rch Output
Rch Inverted Input
Rch Noninverted Input
NJU72040
„ ABSOLUTE MAXIMUM RATING (Ta=25°C)
PARAMETER
SYMBOL
Supply Voltage
V
Power Dissipation
RATING
+
UNIT
+4
V
(Note1)
PD
SSOP14 : 550
mW
+
Maximum Input Voltage
VIM
V +0.3
V
Operating Temperature Range
Topr
-40 ~ +85
°C
Storage Temperature Range
Tstg
-40 ~ +125
°C
(Note1) EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting
■ RECOMMENDED OPERATING CONDITIONS
(Ta=25°C unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITION
+
Operating Voltage
V
MIN.
TYP.
MAX.
UNIT
2.7
3.3
3.6
V
„ ELECTRICAL CHARACTERISTICS
+
(Ta=25°C, V =3.3V, f=1kHz, Vin=0.1Vrms[differential input], Gv=6.4dB, MUTE=OFF, RL=32Ω unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
-
10.5
15.5
mA
Operating Current
IDD
No signal, No load
Input Resistance1
Rin1
INL-, INR-
49
61
73
kΩ
Input Resistance2
Rin2
INL+, INR+
103
129
155
kΩ
Voltage Gain1
GV1
Gain Terminal=Low
5.4
6.4
7.4
dB
Voltage Gain2
GV2
Gain Terminal=High
11.4
12.4
13.4
dB
Voltage Gain3
GV3
Gain Terminal=Low, RL=10kΩ
6.6
7.1
7.6
dB
Voltage Gain4
GV4
Gain Terminal=High, RL=10kΩ
12.6
13.1
13.6
dB
-
80
-
mW
-
55
-
mW
THD=3%, RL=32Ω
Input=Lch or Rch
THD=3%, RL =32Ω
Input=Lch and Rch
Maximum Output Power1
POMAX1
Maximum Output Power2
POMAX2
Maximum Output Voltage Level
VOMAX
THD=1%, RL=10kΩ
-
2.2
-
Vrms
Mute Level
VMUTE
Rg=0Ω , Mute=ON
-
-90
-80
dB
VNI
Rg=0Ω , BW:400Hz-22kHz
-
-100
-95
dBV
Total Harmonic Distortion1
THD1
BW:400Hz-22kHz, RL=32Ω
-
0.08
0.3
%
Total Harmonic Distortion2
THD2
BW:400Hz-22kHz, RL=10kΩ
-
0.007
0.05
%
Equivalent Input Noise Voltage
Channel Separation1
CS1
Rg=600Ω , (*1)
65
75
-
dB
Channel Separation2
CS2
Rg=600Ω , f=10kHz, (*1)
55
65
-
dB
Output Offset Voltage
VOS
Rg=0Ω , Gv=12.4Db, No load
-
1
5
mV
(*1)OUTL(measured terminal): 20log(OUTR/OUTL) , OUTR(measured terminal): 20log(OUTL/OUTR)
„ CONTROL CHARACTERISTICS
+
(Ta=25°C, V =3.3V, Gv=6.4dB, MUTE=OFF, RL=32Ω unless otherwise specified)
PARAMETER
Mute terminal High
Mute terminal Low
Gain terminal High
Gain terminal Low
SYMBOL
MuteH
MuteL
GainH
GainL
TEST CONDITION
Mute=OFF
Mute=ON
Gv=12.4dB
Gv=6.4dB
MIN.
0.8 V
+
0
0.8 V
0
TYP.
-
+
-
MAX.
+
V
UNIT
V
+
0.2 V
+
V
V
V
+
0.2 V
V
–3–
NJU72040
„TEST CIRCUIT (IDD)
V+
Regulator
INL-
INR-
C1=1uF
C10=1uF
INL+
INR+
C2=1uF
C8=1uF
OUTL
OUTR
Pop Noise
Suppression
V+
A
Pop Noise
Suppression
V+
GND
CP
(*2)
Negative
Voltage
Regulator
C4=1uF
CN
Bias
3MΩ
MUTE
(*2)
V-
C6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
„TEST CIRCUIT (GV1, GV2, GV3, GV4, POMAX1, VOMAX)
V+
inverted phase
Regulator
INL-
INR-
C1=1uF
C10=1uF
INL+
INR+
C2=1uF
Gv1,2,POMAX1
RL=32Ω
Gv3,4,VOMAX
RL=10kΩ
C8=1uF
OUTL
OUTR
Pop Noise
Suppression
V
Pop Noise
Suppression
V+
GND
Gv1,2,POMAX1
RL=32Ω
Gv3,4,VOMAX
RL=10kΩ
V+
(*2)
CP
C4=1uF
CN
Negative
Voltage
Regulator
Bias
3MΩ
MUTE
V-
(*2)
C6=10uF
GAIN 100kΩ
(*2): Monolithic Ceramic Capacitors
–4–
REF
Gain Select
NJU72040
„TEST CIRCUIT (POMAX2)
V+
inverted phase
Regulator
INL-
C1=1uF
C10=1uF
INL+
INR+
C2=1uF
C8=1uF
OUTL
RL=32Ω
OUTR
Pop Noise
Suppression
V
inverted phase
INR-
Pop Noise
Suppression
V+
RL=32Ω
GND
V+
CP
(*2)
Negative
Voltage
Regulator
C4=1uF
CN
Bias
MUTE
3MΩ
(*2)
V-
C6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
„TEST CIRCUIT (VMUTE)
V+
inverted phase
Regulator
INR-
INL-
C1=1uF
C10=1uF
INR+
INL+
C2=1uF
C8=1uF
OUTR
OUTL
RL=32Ω
Pop Noise
Suppression
V
Pop Noise
Suppression
GND
V+
(*2)
CP
C4=1uF
CN
RL=32Ω
Negative
Voltage
Regulator
Bias
3MΩ
MUTE
V-
(*2)
C6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
–5–
NJU72040
„TEST CIRCUIT (VNI)
VNI=(measurement)-Gv1
V+
Regulator
INL-
INR-
C1=1uF
C10=1uF
INL+
INR+
C2=1uF
C8=1uF
OUTL
RL=32Ω
OUTR
Pop Noise
Suppression
V
Pop Noise
Suppression
V+
GND
CP
(*2)
RL=32Ω
V
Negative
Voltage
Regulator
C4=1uF
CN
Bias
3MΩ
MUTE
V+
(*2)
V-
C6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
„TEST CIRCUIT (THD1, THD2)
V+
inverted phase
Regulator
INR-
INL-
C1=1uF
INR+
INL+
Ex)
AudioPrecision
aux-0025
C2=1uF
C8=1uF
OUTR
OUTL
Filter
V
C10=1uF
Pop Noise
Suppression
THD1
RL=32Ω
THD2
RL=10kΩ
Pop Noise
Suppression
GND
V+
V+
(*2)
CP
C4=1uF
CN
Negative
Voltage
Regulator
Bias
3MΩ
MUTE
V-
THD1
RL=32Ω
THD2
RL=10kΩ
(*2)
C6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
(*3): Connect a low-pass filter circuit with the corner frequency of more than 20kHz in front of an analyzer for
rejecting the switching noise generated from NJU72040. Otherwise, the characteristic result may change
because of the switching noise.
–6–
NJU72040
„TEST CIRCUIT (CS1, CS2)
OUTL (measured terminal) : CS1=CS2=20log(OUTR/OUTL)
OUTR (measured terminal) : CS1=CS2=20log(OUTL/OUTR)
V+
inverted phase
Regulator
C1=1uF
C10=1uF
Rg=600Ω
INR+
INL+
C2=1uF
C8=1uF
OUTR
OUTL
Pop Noise
Suppression
RL=32Ω
Rg=600Ω
INR-
INL-
Pop Noise
Suppression
RL=32Ω
V
GND
V+
CP
Negative
Voltage
Regulator
C4=1uF
CN
Bias
3MΩ
MUTE
V+
VC6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
„TEST CIRCUIT (VOS)
V+
Regulator
INR-
INLC1=1uF
C10=1uF
INR+
INL+
C2=1uF
C8=1uF
OUTR
OUTL
Pop Noise
Suppression
V
Pop Noise
Suppression
CP
C4=1uF
CN
V
GND
V+
Negative
Voltage
Regulator
Bias
3MΩ
MUTE
V+
VC6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
–7–
NJU72040
„APPLICATION CIRCUIT
(Single-end input)
V+
Regulator
INR-
INLC1=1uF
C10=1uF
INR+
INL+
C2=1uF
C8=1uF
OUTR
OUTL
32Ω
Headphone
Pop Noise
Suppression
V+
Pop Noise
Suppression
32Ω
Headphone
GND
V+
V+
CP
Negative
Voltage
Regulator
C4=1uF
CN
Bias
3MΩ
MUTE
R2=100kΩ
C7=1uF
V-
V+
C6=10uF
GAIN 100kΩ
REF
Gain Select
(Differential input)
V+
inverted phase
Regulator
INL-
C1=1uF
C10=1uF
INL+
INR+
C2=1uF
C8=1uF
OUTL
OUTR
Pop Noise
Suppression
32Ω
Headphone
V+
Pop Noise
Suppression
V+
C4=1uF
CN
32Ω
Headphone
GND
CP
Negative
Voltage
Regulator
Bias
3MΩ
MUTE
R2=100kΩ
C7=1uF
V-
V+
C6=10uF
GAIN 100kΩ
REF
Gain Select
(*2): Monolithic Ceramic Capacitors
(*3): V- terminal (8pin) shouldn’t be tied to V+ terminal (4pin)
–8–
inverted phase
INR-
V+
NJU72040
„ APPLICATION NOTE
The NJU72040 is an audio headphone amplifier that eliminates the need for external dc-blocking output
capacitors. The NJU72040 has built-in pop suppression circuitry to eliminate disturbing pop noise during
power-on, power-off and mute-control.
1. Operating Principle
The NJU72040 has the built-in differential input operational amplifiers, voltage inverter, pop noise
suppression circuitry, gain selectable circuitry and thermal-overload protection circuitry (Fig.1).
For single-ended input signals, connect inverted terminal (INL-, INR-) or non-inverted terminal (INL+, INR+)
to ground through the capacitor. The voltage gain is selectable. In the differential circuitry, the setting gain is
+6.4dB or +12.4dB for the RL=32Ω. In the single-end input circuitry, the setting gain is +0.4dB or +6.4dB for
the RL=32Ω.
The voltage inverter for NJU72040 eliminates the need for external dc-blocking output capacitors. The pop
suppression circuitry for NJU72040 eliminates the pop noise during power-on, power-off and mute-control.
V+
inverted phase
Regulator
C10
C1
INR+
INL+
C2
C8
OUTR
OUTL
32Ω
Headphone
Pop Noise
Suppression
V+
inverted phase
INR-
INL-
Pop Noise
Suppression
V+
32Ω
Headphone
GND
V+
CP
Negative
Voltage
Regulator
C4
CN
Bias
MUTE
3MΩ
R2
C7
V-
V+
C6
GAIN 100kΩ
REF
Gain Select
Fig.1 The NJU72040 functional block diagram
1.1 External parts
1.1.1 Input coupling capacitors Ci (C1, C2, C8, C10)
The input coupling capacitor (Ci) and the input resistance (Rin=61kΩ typ.) for the inverted terminal
form a high-pass filter with the corner frequency determined in [fc=1/(2π x 61kΩ x Ci)]. It is necessary to
adjust 1uF or more.
–9–
NJU72040
1.1.2 Flying capacitor (C4)
Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide
low impedance for the wiring between CP terminal (5pin), CN terminal (6pin), and the flying capacitor
(C4).
CP(5pin)
C4=1uF
CN(6pin)
Fig.2 The NJU72040 block diagram (5pin, 6pin)
1.1.3 Hold capacitor (C6)
Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide
low impedance for the wiring between the hold capacitor (C6), V- terminal (9pin) and the GND on the
PCB.
Separate the GND pattern connecting to the hold capacitor (C6) from that connecting to the REF
terminal (8pin), thus suppressing the influence of switching noise by removing the common impedance
of the GND wiring.
Design no short-circuits of V- terminal (9pin) and V+ terminal (4pin) on the PCB pattern.
V-(9pin)
C6
REF(8pin)
Fig.3 The NJU72040 block diagram (8pin, 9pin)
1.1.4 Mute terminal pop noise countermeasures (C7, R2)
Mute terminal needs time constant more than R2 x C7=0.1. It is necessary to adjust 100kΩ or less.
MUTE(10pin)
R2=100kΩ
Vcnt
3MΩ
C7=1uF
Fig.4 The NJU72040 block diagram (10pin)
– 10 –
NJU72040
1.2 Control of V+ terminal and Mute terminal
1.2.2 Power-on procedure
1. Turn on the V+.
2. After 5msec from power on, change the control voltage of MUTE terminal (Vcnt) from "Low" to "High".
* It is necessary to stabilize an IC for 5msec.
By releasing the MUTE function, the output terminal output the signal.
1.2.3 Power-off procedure
1. Change the control voltage of MUTE terminal (Vcnt) from "High" to "Low".
By the MUTE function, the output signals are stopped from output terminal.
2. Turn off the V+ after “2RC” sec from MUTE.
* It is necessary to stabilize a MUTE condition for “2RC” sec.
Ex.) R2=100kΩ, C7=1uF -> 2R2 x C7=200msec
V+
(4pin)
t
5msec
2RC=200msec
Vcnt
MUTE ON
MUTE OFF
MUTE ON
t
MUTE
(10pin)
t
Fig.5 Turn-on / Turn-off timing chart
– 11 –
NJU72040
„TERMINAL DESCRIPTION
Terminal
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
V+
1
2
13
14
INLINL+
INRINR+
V+
VOLTAGE
V+
40k
AC Input
0V
V-
V-
V+
3
12
OUTL
OUTR
FB
AC Output
10
5.5k
0V
20k
V-
VREF
V+
7
GAIN
V+
V+
2k
Gain Select
20k
0V
100k
VV+
10
MUTE
1k
MUTE/Pop Noise
Suppression
V+
20k
3M
V-
– 12 –
0V
NJU72040
„TERMINAL DESCRIPTION
Terminal
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLTAGE
V+
5
CP
Flying Capacitor
Positive Terminal
-
V-
6
CN
Flying Capacitor
Positive Terminal
-
V40k
INL+
INR+
V+
8
REF
V-
69k
5.5k
10
Reference Voltage
Input
OUTL
OUTR
VV-
– 13 –
NJU72040
„ TYPICAL CHARACTERISTICS
Supply Current vs Tem perature
V+=3.3V, RL=NoLoad, MUTE=H
25
25
20
20
Supply Current[mA]
Supply Current[mA]
Supply Current vs Tem perature
V+=3.3V, RL=NoLoad, MUTE=L
15
GAIN=L,H
10
5
15
GAIN=L,H
10
5
0
0
-50
-25
0
25
50
75
100
125
-50
-25
0
o
50
20
20
Supply Current[mA]
25
15
10
15
10
Ta=85oC
Ta=85oC
5
5
Ta=25oC
Ta=25oC
Ta=-40oC
0
Ta=-40oC
0
1
1.5
2
2.5
3
3.5
4
0
0.5
1
Supply Voltage[V]
2
25
25
20
20
15
10
4
3.5
4
10
5
Ta=25oC
Ta=25oC
Ta=-40oC
0
Ta=-40oC
0
1.5
2
2.5
Supply Voltage[V]
– 14 –
3.5
Ta=85oC
5
1
3
15
Ta=85oC
0.5
2.5
Supply Current vs Supply Voltage
RL=NoLoad, MUTE=H, GAIN=H
Supply Current[mA]
Supply Current[mA]
1.5
Supply Voltage[V]
Supply Current vs Supply Voltage
RL=NoLoad, MUTE=L, GAIN=H
0
125
Supply Current vs Supply Voltage
RL=NoLoad, MUTE=H, GAIN=L
25
0.5
100
Temperature[ C]
Supply Current vs Supply Voltage
RL=NoLoad, MUTE=L, GAIN=L
0
75
o
Temperature[ C]
Supply Current[mA]
25
3
3.5
4
0
0.5
1
1.5
2
2.5
Supply Voltage[V]
3
NJU72040
Equivalent Input Noise vs Tem perature
V+=3.3V, RL=32Ω, Rg=0Ω, MUTE=H, GAIN=L, INL+=0Vrms ,
INL-=0Vrms, Measure:OUTL, BW=400Hz - 22kHz
0
Equivalent Input Noise vs Tem perature
V+=3.3V, RL=10kΩ, Rg=0Ω, MUTE=H, GAIN=L, INL+=0Vrms
INL-=0Vrms, Measure:OUTL, BW=400Hz - 22kHz
0
-20
Equivalent Input Noise[dBV]
Equivalent Input Noise[dBV]
-20
-40
-60
-80
-100
-40
-60
-80
-100
-120
-120
-50
-25
0
25
50
75
100
125
-50
-25
0
o
GAIN=L
Ta=-40,25,85oC
VoltageGain[dB]
VoltageGain[dB]
125
GAIN=H
Ta=-40,25,85oC
15
5
10
GAIN=L
Ta=-40,25,85oC
5
0
0
10
100
1000
10000
100000
10
100
Frequency[Hz]
0
-20
-40
-40
MuteLevel[dB]
-20
-60
-80
1000
10000
100000
Frequency[Hz]
MuteLevel vs Frequency
V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, INL+=0.1Vrms
INL-=0.1Vrms(inverted), Measure=OUTL, Filter=Bandpass
0
MuteLevel[dB]
100
VoltageGain vs Frequency
V+=3.3V, RL=10kΩ, MUTE=H, INL+=0.1Vrms
INL-=0.1Vrms(inverted), Measure=OUTL
20
GAIN=H
Ta=-40,25,85oC
10
75
Temperature[ C]
VoltageGain vs Frequency
V+=3.3V, RL=32Ω, MUTE=H, INL+=0.1Vrms
INL-=0.1Vrms(inverted), Measure=OUTL
15
50
o
Temperature[ C]
20
25
MuteLevel vs Frequency
V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L, INL+=0.1Vrms
INL-=0.1Vrms(inverted), Measure=OUTL, Filter=Bandpass
-60
-80
Ta=-40,25,85oC
-100
Ta=-40,25,85oC
-100
-120
-120
10
100
1000
Freauency[Hz]
10000
100000
10
100
1000
10000
100000
Freauency[Hz]
– 15 –
NJU72040
100
ChannelSeparation vs Frequency
V+=3.3V, RL=32Ω, Rg=600Ω , MUTE=H, GAIN=L,
INL+=0.1Vrms, INL-=0.1Vrms(inverted), Measure=OUTR
Filter=Bandpass
ChannelSeparation vs Frequency
V+=3.3V, RL=10kΩ, Rg=600Ω, MUTE=H, GAIN=L,
INL+=0.1Vrms, INL-=0.1Vrms(inverted), Measure=OUTR
Filter=Bandpass
100
Ta=85oC
80
Ta=-40oC
Ta=25oC
ChannelSeparation[dB]
ChannelSeparation[dB]
80
60
40
20
Ta=85oC
Ta=-40oC
1000
10000
60
40
20
0
0
10
100
1000
10000
100000
10
100
Freauency[Hz]
100
Ta=25oC
100000
Freauency[Hz]
ChannelSeparation vs Frequency
V+=3.3V, RL=32Ω, Rg=600Ω, MUTE=H, GAIN=L
INR+=0.1Vrms, INR-=0.1Vrms(inverted), Measure=OUTL
Filter=Bandpass
ChannelSeparation vs Frequency
V+=3.3V, RL=10kΩ, Rg=600Ω, MUTE=H, GAIN=L
INR+=0.1Vrms, INR-=0.1Vrms(inverted), Measure=OUTL
Filter=Bandpass
100
Ta=85oC
o
Ta=25 C
Ta=-40oC
ChannelSeparation[dB]
ChannelSeparation[dB]
Ta=25oC
80
80
60
40
20
Ta=-40oC
Ta=85oC
60
40
20
0
0
10
100
1000
10000
100000
10
100
Freauency[Hz]
1000
10000
100000
Freauency[Hz]
PSRR vs Frequency
V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, Vripple=0.1Vrms
INL+=INR+=0Vrms, INL-=INR-=0Vrms, Measure=OUTL,OUTR
Filter=Bandpass
100
PSRR vs Frequency
V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L, Vripple=0.1Vrms
INL+=INR+=0Vrms, INL-=INR-=0Vrms, Measure=OUTL,OUTR
Filter=Bandpass
100
Ta=-40oC
80
60
Ta=25oC
PSRR[dB]
PSRR[dB]
80
Ta=85oC
40
20
Ta=25oC
60
Ta=85oC
40
20
0
0
10
100
1000
Freauency[Hz]
– 16 –
Ta=-40oC
10000
100000
10
100
1000
Freauency[Hz]
10000
100000
NJU72040
CMRR vs Frequency
V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, INL+(INR+)=0.1Vrms
INL-(INR-)=0.1Vrms, Measure=OUTL(OUTR), BW=Bandpass
100
100
80
CMRR vs Frequency
V+=3.3V, RL=10kΩ , MUTE=H , GAIN=L,INL+(INR+)=0.1Vrms
INL-(INR-)=0.1Vrms, Measure=OUTL(OUTR), BW=Bandpass
80
OUTR
Ta=-40,25,85oC
60
CMRR[dB]
CMRR[dB]
OUTR
Ta=-40,25,85oC
OUTL
Ta=-40,25,85oC
40
20
60
OUTL
Ta=-40,25,85oC
40
20
0
0
10
100
1000
10000
100000
10
100
Freauency[Hz]
10000
100000
Freauency[Hz]
Pow er Dissipation vs Output Pow er
V+=3.3V, RL=16Ω, MUTE=H, GAIN=L, Ta=25oC
f=1kHz, Measure=OUTL, BW=400Hz to 22kHz
300
1000
Pow er Dissipation vs Output Pow er
V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, Ta=25oC
f=1kHz, Measure=OUTL, BW=400Hz to 22kHz
300
THD+N=3%
250
250
Power Dissipation [mW]
Power Dissipation [mW]
THD+N=3%
Input=Lch,Rch
200
150
Input=Lch
100
50
200
Input=Lch,Rch
150
100
Input=Lch
50
0
0
0
20
40
60
80
100
Output Pow er [mW/ch]
0
20
40
60
80
100
Output Pow er [mW/ch]
Therm al Shut Dow n(SupplyCurrent)
V+=3.3V , RL=32Ω , MUTE=H , GAIN=L
14
12
SupplyCurrent [mA]
10
8
6
120oC
->160oC
160oC
->120oC
4
2
0
120
130
140
150
160
o
Temperature[ C]
– 17 –
NJU72040
10
THD+N vs Output Pow er
V+=3.3V, RL=16Ω, MUTE=H , GAIN=L
Input=INL+,INL-(inverted), AC_GND=INR+,INR-, f=1kHz
Measure=OUTL, BW=400Hz to 22kHz
10
1
THD+N[%]
THD+N[%]
1
o
Ta=-40 C
0.1
0.01
0.1
1
10
100
Ta=-40,25,85oC
0.1
Ta=25,85oC
0.01
0.001
10
THD+N vs Output Pow er
V+=3.3V, RL=32Ω, MUTE=H, GAIN=L
Input=INL+,INL-(inverted), AC_GND=INR+,INR-, f=1kHz
Measure=OUTL, BW=400Hz to 22kHz
1000
0.01
0.001
0.01
0.1
1
10
100
Output Pow er[mW]
Output Pow er[mW]
THD+N vs Output Pow er
V+=3.3V, RL=16Ω, MUTE=H, GAIN=L, Ta=25oC
Input=INL+,INL-(inverted), AC_GND=INR+,INR-, f=1kHz
Measure=OUTL, BW=22Hz to 22kHz
THD+N vs Output Pow er
V+=3.3V, RL=32Ω, MUTE=H, GAIN=L, Ta=25oC
Input=INL+,INL-(inverted), AC_GND=INR+,INR-, f=1kHz
Measure=OUTL, BW=22Hz to 22kHz
1
10
1
f=100Hz,1kHz
THD+N[%]
THD+N[%]
f=100Hz,1kHz
0.1
1000
0.1
f=10kHz
f=10kHz
0.01
0.001
10
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
Output Pow er[mW]
Output Pow er[mW]
THD+N vs Output Pow er
V+=3.3V, RL=16Ω, MUTE=H , GAIN=L
Input=INL+/R+,INL-/R-(inverted), f=1kHz, Measure=OUTL,
BW=400Hz to 22kHz
THD+N vs Output Pow er
V+=3.3V, RL=32Ω, MUTE=H, GAIN=L
Input=INL+/R+,INL-/R-(inverted), f=1kHz, Measure=OUTL
BW=400Hz to 22kHz
1
10
1
THD+N[%]
THD+N[%]
Input=Lch , Rch
0.1
0.01
0.001
0.01
0.1
1
10
100
Input=Lch , Rch
0.1
Input=Lch
Output Pow er[mW]
– 18 –
0.01
0.001
Input=Lch
1000
0.01
0.001
0.01
0.1
1
10
Output Pow er[mW]
100
1000
NJU72040
10
THD+N vs Output Voltage
V+=3.3V, RL=10kΩ, MUTE=H , GAIN=L
Input=INL+,INL-(inverted), AC_GND=INR+,INR-, f=1kHz
Measure=OUTL, BW=400Hz to 22kHz
10
1
THD+N[%]
1
THD+N[%]
THD+N vs Output Voltage
V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L, Ta=25oC
Input=INL+,INL-(inverted), AC_GND=INR+,INR-, f=1kHz
Measure=OUTL, BW=22Hz to 22kHz
0.1
Ta=-40,25,85oC
0.1
f=100,1k,10kHz
0.01
0.01
0.001
0.01
0.1
1
10
0.001
0.01
Output Voltage[Vrms]
10
0.1
1
10
Output Voltage[Vrms]
THD+N vs Output Voltage
V+=3.3V, RL=10kΩ, MUTE=H, GAIN=L
Input=INL+/R+,INL-/R-(inverted), f=1kHz, Measure=OUTL
BW=400Hz to 22kHz
10
THD+N vs Output Voltage
V+=3.3V, MUTE=H, GAIN=L, Ta=25oC
Input=INL+,INL-(inverted), f=1kHz, Measure=OUTL ,
BW=400Hz to 22kHz
RL=16
1
1
0.1
THD+N[%]
THD+N[%]
RL=32
Input=Lch , Rch
Input=Lch
0.01
RL=64
0.1
RL=1k
0.01
RL=10k
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
Output Voltage[Vrms]
10
Output Voltage[Vrms]
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
– 19 –