NJU72013 2Vrms Ground Referenced Stereo Line Amplifier with LPF Q PACKAGE OUTLINE Q GENERAL DESCRIPTION The NJU72013 is an audio line Amplifier . It can swing 2Vrms (5.6V peak-to-peak) signal at 3.3V operating voltage. Ground-referenced outputs eliminate output coupling capacitor. The pop noise suppression circuit removes a pop noise at the power-on and power-off. It is suitable for audio line interface of audio equipment which does not have over 9V regulator. NJU72013RB2 Q APPLICATIONS O Audio applications requiring 2Vrms outputs Q FEATURES O Operating Voltage +2.7 to +3.6V O Operating Current IDD=4.5mA typ.at V+=3.3V, RL=47kΩ, No Signal O Output Coupling Capacitor-less O Pop Noise Suppression Circuit O 2nd order LPF O C-MOS Technology O Package Outline MSOP10 (TVSP10) Q BLOCK DIAGRAM V Q PIN CONFIGURATION + 1 10 5 6 OUTR OUTL INL INR No. Symbol Pop Noise Suppression MUTE Bias GND Ver.1.7E Charge Pump CP CM V - Function 1 INL Lch Input 2 OUTL 3 V+ V+ Power Supply 4 CP Flying Capacitor Positive Terminal 5 6 7 CN VMUTE Flying Capacitor Negative Terminal V- Power Supply Mute Control 8 GND 9 OUTR 10 INR Lch Output Ground Rch Output Rch Input –1– NJU72013 Q ABSOLUTE MAXIMUM RATING (Ta=25°C) PARAMETER SYMBOL Supply Voltage Power Dissipation RATING UNIT V +4 V PD (Note1)) + 530 + mW + Maximum Input Voltage VIMAX -V -0.3 ~ V +0.3 V Operating Temperature Range Topr -40 ~ +85 °C Storage Temperature Range Tstg -40 ~ +125 °C (Note1) EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting Q RECOMMENDED OPERATING CONDITIONS (Ta=25°C unless otherwise specified) PARAMETER Operating Voltage SYMBOL V TEST CONDITION + MIN. TYP. MAX. UNIT 2.7 3.3 3.6 V MIN. TYP. MAX. UNIT - 4.5 10 mA Q ELECTRICAL CHARACTERISTICS (Ta=25°C, V+=3.3V, f=1kHz, Vin=1Vrms, Mute=OFF, RL=47kΩ unless otherwise specified) PARAMETER SYMBOL TEST CONDITION Operating Current IDD Output Gain GV 5.2 6.2 7.2 dB ∆GV -0.5 0 0.5 dB Output Gain Error No signal Maximum Output Voltage Level VOMAX THD=1% - 2.3 - Vrms Mute Level VMUTE Rg=0Ω, Mute=ON - -110 - dB Equivalent Input Noise Voltage VNO Rg=0Ω, BW:400Hz-22kHz - -106 - dB Total Harmonic Distortion THD BW:400Hz-22kHz - 0.003 - % 80 - - dB 100 150 200 kHz Rg=0Ω - 1 5 mV Vripple=1kHz / 100mVrms - 50 - dB - 300 - Ω TYP. MAX. UNIT Channel Separation Cut-off Frequency Output Offset Voltage Power Supply Rejection Ratio Output Impedance CS fC VOS PSRR Rg=600Ω nd 2 order LPF ROUT Q CONTROL CHARACTERISTICS (Ta=25°C, V+=3.3V, RL=47kΩ unless otherwise specified) PARAMETER Mute terminal High Mute terminal Low –2– SYMBOL MuteH MuteL TEST CONDITION Mute=OFF Mute=ON MIN. 0.8V 0 + - + V V + 0.2V V NJU72013 TEST CIRCUIT ♦IDD 1uF 1 2 V+ ♦GV, VOMAX, THD INL INR OUTR OUTL Mute-Tr 1uF 1uF 1 10 9 2 47kΩ INL INR V Mute-Tr OUTR OUTL Mute-Tr A 1uF 10 9 47kΩ V Mute-Tr V+ 3 V+ GND Pop Noise Suppression 3 8 V+ GND Pop Noise Suppression 10uF 8 V+ V+ 4 CP 1uF MUTE Bias 7 4 1uF Charge Pump 5 CP V- CN 6 Bias 7 Charge Pump 10uF 5 ♦VMUTE MUTE V- CN 6 10uF ♦VNO [VNO=(measurement)-Gv1] 1uF 1 2 47kΩ INL INR OUTR OUTL V Mute-Tr 1uF 1uF 10 1 9 2 47kΩ V Mute-Tr INL INR V V+ OUTR OUTL Mute-Tr 1uF 10 9 47kΩ V Mute-Tr V+ 3 V+ GND Pop Noise Suppression 10uF 8 3 V+ GND Pop Noise Suppression 10uF 8 V+ 4 CP 1uF MUTE Bias 7 4 1uF Charge Pump 5 CP V- CN 6 Bias 7 Charge Pump 10uF 5 ♦CS MUTE CN V- INL INR 6 10uF ♦fC 1uF 1 INL INR 1uF 1uF 1kΩ Rg=620Ω 10 1 1kΩ 1uF 10 820pF 820pF 2 47kΩ OUTR OUTL Mute-Tr 9 47kΩ V Mute-Tr 2 47kΩ V V+ OUTR OUTL Mute-Tr 9 47kΩ V Mute-Tr V+ 3 V+ Pop Noise Suppression 10uF GND 8 3 V+ Pop Noise Suppression 10uF GND 8 V+ 4 CP 1uF Bias MUTE 7 4 1uF Charge Pump 5 CN V+ CP V- 6 10uF Bias MUTE 7 Charge Pump 5 CN V- 6 10uF –3– NJU72013 APPLICATION NOTE The NJU72013 is an audio line amplifier that eliminates the need for external dc-blocking output capacitors. The NJU72013 has built-in pop suppression circuitry to eliminate disturbing pop noise during power-on, power-off and mute-control. 1. Operating Principle The NJU72013 has the built-in non-inverted input operational amplifiers, voltage inverter, and pop noise suppression circuitry (Fig.1). The voltage inverter for NJU72013 eliminates the need for external dc-blocking output capacitors. The pop suppression circuitry for NJU72013 eliminates the pop noise during power-on, power-off and mute-control. 1uF 1kΩ C2 R3 R1 1 INL INR 10 1kΩ 1uF 820pF 820pF C8 C9 C3 2 OUTR OUTL Mute-Tr 9 Mute-Tr V+ 10uF 3 V+ Pop Noise Suppression C11 4 CP 1uF Bias GND MUTE 8 7 Charge Pump C4 5 CN V- 6 10uF C6 *1) *1) Connect a zener diode between V- terminal[6pin] and GND terminal[8pin] to prevent connecting V- terminal[6pin] and V+ terminal[3pin]. Fig.1 The NJU72013 functional block diagram 1.1 External parts 1.1.1 Input coupling capacitors Ci (C2, C8) The input coupling capacitor (Ci) and the total of the external resistance (R1, R3) and the input resistance (Rin=218kΩ typ.) for the non-inverted terminal form a high-pass filter with the corner frequency determined in [fc=1/(2π x (R1+218kΩ) x Ci)). It is necessary to adjust 1uF or more. –4– NJU72013 1.1.2 Flying capacitor (C4) Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide low impedance for the wiring between CP terminal (4pin), CN terminal (5pin), and the flying capacitor (C4). CP(4pin) C4=1uF CN(5pin) Fig.2 The NJU72013 block diagram (4pin, 5pin) 1.1.3 Hold capacitor (C6) Use capacitors with a low-ESR (ex. ceramic capacitors) for optimum performance. Design to provide low impedance for the wiring between the hold capacitor (C6), V- terminal (6pin) and the GND on the PCB. Separate the GND pattern connecting to the hold capacitor (C6) from that connecting to the GND terminal (8pin), thus suppressing the influence of switching noise by removing the common impedance of the GND wiring. Design no short-circuits of V- terminal (6pin) and V+ terminal (3pin) on the PCB pattern. V-(6pin) C6 GND(8pin) Fig.3 The NJU72013 block diagram (6pin, 8pin) –5– NJU72013 1.2 Control of V+ terminal and Mute terminal 1.2.2 Power-on procedure Turn on the V+ in the condition of MUTE terminal is “Low”. After 100msec from power on, change the control voltage of MUTE terminal (Vcnt) from "Low" to "High". * It is necessary to stabilize an IC for 100msec. 1.2.3 Power-off procedure Change the control voltage of MUTE terminal (Vcnt) from "High" to "Low".By the MUTE function, the output signals are stopped from output terminal. Turn off the V+. V+ (3pin) t 100msec 100msec MUTE (7pin) t MUTE OFF MUTE ON MUTE ON Fig.4 Power-on / Power-off timing chart –6– NJU72013 TERMINAL DESCRIPTION Terminal SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE V+ 1 10 INL INR 18kΩ AC Input 0V 30pF 200kΩ GND V- V+ 2 9 OUTL OUTR 100Ω AC Output 100Ω 100Ω 14.8kΩ 0V 12kΩ V - V+ 3 V+ Supply Voltage V+ V- V+ 4 CP Flying Capacitor Positive Terminal - –7– NJU72013 TERMINAL DESCRIPTION Terminal SYMBOL FUNCTION 5 CN Flying Capacitor Negative Terminal EQUIVALENT CIRCUIT VOLTAGE - V- V+ 6 V- V- Voltage -[V+] V- V+ 7 MUTE 100Ω MUTE Control 400kΩ V –8– - GND 0V NJU72013 TYPICAL CHARACTERISTICS IDD vs Supply Voltage Maximum Output Voltage vs Supply Voltage No signal THD+N=1%, RL=47kohm, I/O=INL-OUTL 3.0 Maximum Output Voltage [Vrms] 7.5 Ta=-40℃ IDD [mA] 5.0 Ta=+25℃ 2.5 Ta=+85℃ 0.0 Ta=-40, +25, +85℃ 2.5 2.0 1.5 1.0 2.5 3.0 3.5 2.5 4.0 4.0 Output Voltage vs Road Resistance V+=3.3V, THD+N=1%, RL=47kohm, I/O=INL-OUTL V+=3.3V, Vin=1.15Vrms, f=1kHz, I/O:INL-OUTL 3.0 2.5 2.5 2.0 Output Voltage [Vrms] Maximum Output Voltage [Vrms] 3.5 Maximum Output Voltage vs Frequency 3.0 Ta=-40, +25, +85℃ 1.5 2.0 Ta=-40, +25, +85℃ 1.5 1.0 1.0 10 100 1000 10000 1000 100000 10000 100000 Road Resistance [Ω] Frequency [Hz] Output Gain vs Frequency (2nd LPF) THD+N vs Output Voltage V+=3.3V, Vin=1Vrms, RL=47kohm, 2nd LPF, I/O:INL-OUTL V+=3.3V, f=1kHz, BW: 400-22kHz(f=1kHz), I/O=INL-OUTL, 10 100 10 8 1 THD+N [%] Output Gain [dB] 3.0 Supply Voltage [V] Supply Voltage [V] 6 4 0.1 Ta=+25, +85℃ 0.01 Ta=-40, +25, +85℃ 2 0.001 Ta=-40℃ 0 10 100 1000 10000 Frequency [Hz] 100000 1000000 0.0001 0.01 0.1 1 10 Output Voltage [Vrms] –9– NJU72013 TYPICAL CHARACTERISTICS THD+N vs Frequency Channel Separation vs Frequency V+=3.3V, Vin=1Vrms, RL=47kohm, BW=10-80kHz, I/O:INL-OUTL V+=3.3V, RL=47kohm, Vin=1Vrms, BW:10-80kHz, Rg=600Ω, I/O: INR-OUTL 1 100 80 Channel Separation [dB] Ta=+85℃ THD+N [%] 0.1 Ta=+25℃ Ta=-40℃ 0.01 0.001 Ta=-40, +25, +85℃ 60 40 20 0 10 100 1000 10000 100000 10 100 10000 100000 Frequency [Hz] Frequency [Hz] PSRR vs Frequency Output Gain vs Mute Control Voltage V+=3.3V, Vripple=100mVrms, f=1kHz, BW: Bandpass V+=3.3V, Vin=1Vrms, f=1kHz, BW: 400-22kHz 70 20 Ta=+85℃ 60 Ta=+85℃ 0 50 -20 Output Gain [dB] Ta=-40, +25℃ PSRR [dB] 1000 40 30 20 10 Ta=+25℃ -40 -60 -80 Ta=-40℃ -100 0 -120 10 100 1000 Frequency [Hz] 10000 100000 0 1 2 3 4 Mute Control Voltage [V] [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. – 10 –