NJW4180 High Voltage Low current consumption Regulator GENERAL DESCRIPTION The NJW4180 is a high voltage and low current consumption linear regulator. Low current consumption make the NJW4180 possible to supply 2.5 to 5.0 V regulated voltage from high voltage input. Therefore, it is suitable for a power supply for micro controllers, battery related applications, LED and other applications where low power consumption is essential. FEATURES • Operating Voltage Range • Low Current Consumption • MLCC correspond • Output Current • High Precision Output • Internal Thermal Overload Protection • Internal Over Current Protection • Internal Reverse Current Protection • Package Outline PACKAGE OUTLINE NJW4180KG1 NJW4180F 35V (max.) 9µA (typ.) IO(min.)=20mA VO ±1.5% ESON6-G1, SOT23-5 PIN CONNECTION PIN CONFIGURATION 1. N.C. 2. GND NJW4180 3. N.C. 4. VIN 1 2 3 5. N.C. 6. VOUT NJW4180KG1 6 5 4 5 PIN CONFIGURATION 1. N.C. 2. GND 3. N.C. 4. VOUT 5. VIN 4 1 2 3 NJW4180F BLOCK DIAGRAM VIN Current Limit Thermal Protection VOUT Bandgap Reference GND Ver.2011-01-27 -1- NJW4180 OUTPUT VOLTAGE LANK LIST Device Name VOUT NJW4180F25 2.5V NJW4180F33 3.3V NJW4180F05 5.0V Device Name NJW4180KG1-25 NJW4180KG1-33 NJW4180KG1-05 VOUT 2.5V 3.3V 5.0V ABSOLUTE MAXIMUM RATINGS PARAMETER SYNBOL Input Voltage VIN Output Voltage VOUT (Ta=25°C) RATINGS UNIT +40 V +7 V 330 (*1) ESON6-G1 905 (*2) Power Dissipation PD mW 390 (*3) SOT-23-5 520 (*4) Operating Temperature Topr -40 to +85 °C Storage Temperature Tstg -50 to +125 °C (*1): Mounted on glass epoxy board based on EIA/JEDEC STANDARD. (101.5×114.5×1.6mm: 2Layers with Exposed Pad FR-4) (*2): Mounted on glass epoxy board based on EIA/JEDEC STANDARD. (101.5×114.5×1.6mm: 4Layers with Exposed Pad FR-4, Internal foil area size: 99.5×99.5mm, Applying a thermal via hole to a board based on JEDEC standard JESD51-5) (*3): Mounted on glass epoxy board based on EIA/JEDEC. (114.3×76.2×1.6mm: 2Layers FR-4) (*4): Mounted on glass epoxy board based on EIA/JEDEC. (114.3×76.2×1.6mm: 4Layers FR-4) PROTECTION CIRCUIT Over Current Protection Thermal Shutdown Reverse Current Protection INPUT VOLTAGE RANG VO≤3V: VIN = +5.5V to +35V VO>3V: VIN = VO+2.5V to +35V -2- Ver.2011-01-27 NJW4180 ELECTRICAL CHARACTERISTICS (Unless otherwise specified, VIN=Vo+2.5V (Vo≤3V: VIN =5.5V), CIN=0.1 µF, CO=1µF, Ta=25°C) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Output Voltage VO IO=10mA -1.5% +1.5% V Quiescent Current IQ IO=0mA 9 15 µA 20 30 mA Output Current Io VO × 0.9 VIN = 5.5V to 35V, IO=10mA (VO≤3V) Line Regulation 0.02 0.05 %/V ∆VO/∆VIN VIN = VO+2.5V to 35V, IO=10mA (VO>3V) IO=0mA to 20mA Load Regulation 0.005 0.02 %/mA ∆VO/∆IO Average Temperature Coefficient of ± 100 ppm/°C ∆VO/∆Ta Ta=0 to 85°C, IO=10mA Output Voltage Sink Current under IREVERSE Reverse Current VIN = 0V, VO = 5V 50 75 µA Protection operating 5.5 35 VO≤3V V Input Voltage VIN VO+2.5 35 VO>3V The above specification is a common specification for all output voltages. Therefore, it may be different from the individual specification for a specific output voltage. Ver.2011-01-27 -3- NJW4180 POWER DISSIPATION vs. AMBIENT TEMPERATURE NJW4180KG1 Power Dissipation (Topr=-40~+85°C,Tj=125°C) 1000 on 4 layers board (101.5×114.5×1.6mm) Power Dissipation PD(mW) 800 600 400 on 2 layers board (101.5×114.5×1.6mm) 200 0 -50 -25 0 25 50 75 100 Temperature Ta(°C) NJW4180F Power Dissipation (Topr=-40~+85°C,Tj=125°C) 800 Power Dissipation PD(mW) 700 on 4 layers board (114.3×76.2×1.6mm) 600 500 400 on 2 layers board (114.3×76.2×1.6mm) 300 200 100 0 -50 -25 0 25 50 75 100 Temperature Ta(°C) -4- Ver.2011-01-27 NJW4180 TEST CIRCUIT A IIN VIN VOUT NJW4180 IOUT VIN 0.1µF V VOUT 1µF (ceramic) GND TYPICAL APPLICATION VIN VIN VOUT VOUT NJW4180 0.1µF GND 1µF *Input Capacitance CIN Input Capacitance (CIN)) is required to prevent oscillation and reduce power supply ripple for applications with high power supply impedance or a long power supply line. Use the CIN value of 0.1µF greater to avoid the problem. CIN should connect between GND and VIN as short as possible. *Output Capacitance CO Output capacitor (CO) is required for a phase compensation of the internal error amplifier. The capacitance and the equivalent series resistance (ESR) influences stability of the regulator. This product is designed to work with a low ESR capacitor for the CO; however, use of recommended capacitance or greater value is essential for stable operation. Use of a smaller CO may cause excess output noise or oscillation of the regulator due to lack of the phase compensation. Therefore, use CO with the recommended capacitance or greater value and connect between VO terminal and GND terminal with minimal wiring. The recommended capacitance depends on the output voltage. Low voltage regulator requires greater value of the CO. Thus, check the recommended capacitance for each output voltage. Use of a greater CO reduces output noise and ripple output, and also improves transient response of the output voltage against rapid load change. Ver.2011-01-27 -5- NJW4180 TYPICAL CHARACTERISTICS NJW4180 5.0V Output Voltage vs. Output Current 7 6 6 5 Output Voltage : Vo [V] Output Voltage : Vo [V] NJW4180 5.0V Output Voltage vs. Input Voltage 5 4 3 Ta = 25°C Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) Io = 3mA 2 1 4 3 2 Ta = 25°C Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 1 0 0 0 10 20 30 0 40 20 30 40 50 NJW4180 5.0V Dropout Voltage vs. Output Current NJW4180 5.0V Ground Pin Current vs. Output Current 2.5 6 Ta = 25°C Vin = 7.5V Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) Dropout Voltage : dVi-o [V] Ground Pin Current : Ignd [mA] 10 Output Current : Io [mA] Input Voltage : Vin [V] 4 2 Ta = 25°C Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 2.0 1.5 1.0 0.5 0 0 10 20 30 0.0 0 Output Current : Io [mA] 10 20 30 Output Current : Io [mA] NJW4180 5.0V Queiscent Current vs. Input Voltage NJW4180 5.0V Load Regulation vs.Output Current 12 Ta = 25°C Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 8 6 4 2 0 20 15 10 5 0 0 10 20 Input Voltage : Vin [V] -6- Ta = 25°C Vin=7.5V Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 25 Load Regulation : dVo/dIo [mV] Quiescent Current : Iq [uA] 10 30 40 0 10 20 30 Output Current : Io [mA] Ver.2011-01-27 NJW4180 NJW4180 5.0V Line Regulation NJW4180 5.0V Peak Output Current vs. Input Voltage 5.05 50 Peak Output Current : Ipeak [mA] 5.04 Io = 10mA 5.03 Output Voltage : Vo [V] 40 30 20 Ta = 25°C Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 10 Io = 20mA 5.02 5.01 5.00 4.99 Io = 0mA 4.98 Ta = 25°C Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 4.97 4.96 0 4.95 0 10 20 30 40 7.5 12.5 17.5 Input Voltage : Vin [V] Ta = 25°C Vin = 0V Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 37.5 Vin = 7.5V Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) Io = 10mA 5.15 Output Voltage : Vo [V] Reverse Current : Irev [uA] 32.5 5.2 80 60 27.5 NJW4180 5.0V Output Voltage vs. Temperature NJW4180 5.0V Reverse Current vs. Output Voltage 70 22.5 Input Voltage : Vin [V] 50 40 30 5.1 5.05 5 20 4.95 10 4.9 0 0 2 4 -50 6 -25 0 NJW4180 5.0V Quiescent Current vs. Temperature 50 75 100 125 NJW4180 5.0V Over Current Protection vs. Temperature 15 6 Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) Vin = 7.5V Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 12 5 Quiescent Current : Iq [uA] Quiescent Current : Iq [uA] 25 Temperture : Ta [°C] Output Voltage : Vo [V] 9 6 3 4 100°C 25°C -50°C 3 2 1 0 0 -50 0 50 Temperture : Ta [°C] Ver.2011-01-27 100 150 0 20 40 60 Output Current : Io [mA] -7- NJW4180 NJW4180 5.0V Ipeak vs. Temperature NJW4180 5.0V Ishort vs. Temperature 60 Short Circuit Current : Ishort [mA] Peak Output Current : Ipeak [mA] 60 40 20 Vin = 7.5V Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 0 40 20 Vin = 7.5V Vo = 0V Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 0 -50 0 50 100 150 -50 0 Temperture : Ta [°C] 100 150 NJW4180 5.0V Line Regulation vs. Temperature NJW4180 5.0V Load Regulation vs. Temperature 100 100 Vin = 7.5V Io = 0 to 20mA Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 80 Line Regulation : dVo/dVin [mV] Load Regulation : dVo/dIo [mV] 50 Temperture : Ta [°C] 60 40 20 0 Vin = 7.5V to 35V Io = 10mA Cin = 0.1uF(Ceramic) Co = 1uF(Ceramic) 80 60 40 20 0 -50 -25 0 25 50 Temperture : Ta [°C] 75 100 125 -50 -25 0 25 50 75 100 Temperture : Ta [°C] [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -8- Ver.2011-01-27