E2F0011-29-32 ¡ Semiconductor MSM9560 ¡ Semiconductor This version: Mar. 1999 MSM9560 Previous version: Jun. 1998 IC for FM Multiplex Data Demodulation GENERAL DESCRIPTION The MSM9560 is an IC which demodulates FM character multiplex signals in the DARC (Data Radio Channel)*1 format to obtain digital data. The MSM9560 operates at 4.5 to 5.5 V. In the DARC system, 16 kbps of digital data L-MSK modulated at 76 kHz is multiplexed on an ordinary FM broadcast base band signal. The MSM9560 contains on one chip a band pass filter using a switched capacitor filter (SCF) and a group of circuits including a frame synchronization circuit and an error correction circuit. By connecting an external FM receiver and memory for temporary data storage and by controlling them by the CPU, a system for obtaining digital data can easily be constructed. The FM multiplex demodulation ICs, the MSM9500-series devices, are configured with minimum functions; so they will, merely by making changes to the software of the external microcomputer, be able to respond flexibly to the many FM multiplex broadcast services that are going to come about in the future. The MSM9560 is best suited to radios and information processing devices that support DARC FM multiplex broadcasting. It is also best suited to car radios and car navigation systems. *1 DARC is a registered trademark of NHK Engineering Services. Any manufacturer licensed by NHK Engineering Service can manufacture and sell products that utilize the DARC technology. For detailed information on license, please contact: NHK Engineering Service Phone: 81-3481-2650 FEATURES • Pin compatible with MSM9552/MSM9553 • Built-in bandpass filter (SCF) • Built-in block synchronization circuit and frame synchronization circuit • Setting of the number of synchronization protection steps can be changed • Data clocks are regenerated by digital PLL • 1T delay detection • Built-in vertical and horizontal error correction circuits • Built-in layer 4 and layer 2 CRC processing circuit • Parallel interface with microcontroller • Clock output for external devices (64 kHz to 8.192 MHz variable) • Compatible with the international standard frame format (ITU-R Rec. BS1194) • Power supply: 4.5 to 5.5 V • Package: 44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM9560GS-2K) 1/7 LPF + Clock regeneration – Block synchronization Frame synchronization Timing control ¡ Semiconductor AIN BPF (SCF) BLOCK DIAGRAM Limiter Variable gain AMP Vref SG Filter Section PN Descrambler 34Byte RAM ¥ 2 Error correction & Layer 2 CRC Read/Write register IC internal clock DB2 WR31 Layer 4 CRC D CK Q Data bus 1T delay circuit CLR DVDD Address bus Limiter LPF Frequency divider Digital Signal Processing Section CPU interface + – Delay Detection Section XOUT XTAL2 XTAL1 Data bus DB0-DB7 Address AD0-AD5 RD WR CS CLR INT 2/7 MSM9560 XOUTC , ¡ Semiconductor MSM9560 34 A1 35 A2 36 A3 37 A4 38 A5 39 NC 40 CLR 41 IORD 42 IOWR 43 NC 44 NC PIN CONFIGURATION (TOP VIEW) MON 1 33 A0 ADETIN 2 32 XOUT 31 CS AVDD 3 SG 5 30 XTAL2 29 XTAL1 AIN 6 28 DVDD AGND 4 DB3 22 DB2 21 23 DB4 DB1 20 MOUT3 11 DB0 19 24 DB5 RD 18 MOUT2 10 NC 17 25 DB6 WR 16 MOUT1 9 INT 15 26 DB7 MOUT6 14 MOUT0 8 MOUT5 13 27 DGND MOUT4 12 XOUTC 7 NC : No-connection pin 44-Pin Plastic QFP 3/7 ¡ Semiconductor MSM9560 PIN DESCRIPTIONS Function Microcontroller Interface Pin Symbol Type Description 16 WR I Write signal to internal register. 18 RD I Read signal to internal register. 15 INT O Interrupt signal to microcontroller. "L": An interrupt is generated. 31 CS I Chip select signal. "L": Read, write, and data bus signals become active. 40 CLR I "L" : the internal registers are initialized and the device enters power down mode. 33 to 38 A0 to A5 I Address signal to internal register. 19 to 26 DB0 to DB7 I/O Data bus signal to internal register. Tuner Interface 6 AIN I FM multiplex signal input. 5 SG O Analog reference voltage output pin. Connect a capacitor between this pin and analog ground to prevent noise. Analog Section Test 1 MON O Analog section waveform monitoring pin. The analog block mode setting is specified by the analog control register. 2 ADETIN I Analog signal input pin for testing. 41 IORD I Digital section test signal input pins. Internally pulled up. Digital Section Test Clock Power Supply 42 IOWR 8 to 14 MOUT0 to MOUT6 O Digital section test signal output and monitor output pins. 29 XTAL1 I 8.192 MHz crystal connection pin. 30 XTAL2 O 8.192 MHz crystal connection pin. 32 XOUT O Pin for supply of 64 kHz to 8.192 MHz variable clock to the outside. 7 XOUTC I XOUT output control pin. "L" = Clock output, "H" = Output disabled. Pulled up internally. 3 AVDD — Analog section power supply pin. 4 AGND — Analog ground pin. 28 DVDD — Digital section power supply pin. 27 DGND — Digital ground pin. 4/7 ¡ Semiconductor MSM9560 ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Symbol Condition DVDD AVDD = DVDD Input Voltage VI Ta = 25°C Output Voltage VO Maximum Power Dissipation PD Storage Temperature Rating AVDD Unit –0.3 to +7.0 V –0.3 to AVDD + 0.3 –0.3 to DVDD + 0.3 Ta = 25°C, per package 400 Ta = 25°C, per output 50 — –55 to +150 TSTG mW °C RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage Crystal Oscillation Frequency FM Multiplex Signal Input Voltage Symbol AVDD DVDD Condition Range Unit AVDD = DVDD 4.5 to 5.5 V fXTAL — Applied Pin AVDD DVDD XTAL1, 8.192 MHz ±100 ppm — 0.5 to 2 VP-P AIN –40 to +85 °C — XTAL2 Composite signals VAIN including multiplex signals Operating Temperature Top — ELECTRICAL CHARACTERISTICS Parameter Symbol Condition When operating, no load Supply Current IDD f = 8.192 MHz When in power down mode, no load Min. Typ. Max. Unit Applied Pin — 14 28 mA — — 20 mA AVDD, DVDD BPF Pass Band Attenuation GAIN1 72 to 80 kHz Variable gain amplifier gain: 0 dB — — 3.0 dB MON BPF Stop Band Attenuation GAIN2 0 to 53 kHz Variable gain amplifier gain: 0 dB 50 — — dB MON BPF Stop Band Attenuation GAIN3 100 to 500 kHz Variable gain amplifier gain: 0 dB 50 — — dB MON 5/7 ¡ Semiconductor APPLICATION CIRCUIT MSM9560 8 bits FM tuner FM multiplex data demodulation IC Microcomputer Buffer RAM Font ROM LCD driver CPU ROM 16 kanji characters¥2 lines LCD display MSM9560 6/7 ¡ Semiconductor MSM9560 PACKAGE DIMENSIONS (Unit : mm) QFP44-P-910-0.80-2K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Epoxy resin 42 alloy Solder plating 5 mm or more Package weight (g) 0.41 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 7/7 E2Y0002-29-11 NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents cotained herein may be reprinted or reproduced without our prior permission. 9. MS-DOS is a registered trademark of Microsoft Corporation. Copyright 1999 Oki Electric Industry Co., Ltd. Printed in Japan