PEREGRINE PE4240

Product Specification
PE4240
SPST UltraCMOS™ CATV Switch
DC - 1300 MHz
Product Description
The PE4240 is a high-isolation MOSFET Switch designed for
CATV applications, covering a broad frequency range from
DC up to 1.3 GHz. This single-supply SPST switch offers a
single-pin CMOS control interface with industry leading CTB
performance. It also provides low insertion loss, high isolation
and extremely low bias requirements while operating on a
single 3-volt supply. In a typical CATV application, the
PE4240 provides for a cost effective and manufacturable
solution vs. mechanical relays.
The PE4240 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Diagram
Features
• 75-ohm switch
• Non-reflective at RF1, open reflective
at RF2 when OFF
• Integrated 0.25 watt terminations
• CTB performance of 100dBc
• High isolation: 85 dB at 5 MHz, 47 dB
at 1 GHz
• Low insertion loss: 0.5 dB at 5 MHz,
0.75 dB at 1 GHz
• High input IP2: >80 dBm
• CMOS/TTL single-pin control
• Single +3 volt supply operation
Figure 2. Package Type
6-lead DFN
RF1
RF2
75
CMOS
Control
Driver
CTRL
Table 1. Electrical Specifications @ +25 °C (ZS = ZL = 75 Ω)
Parameter
Condition
1
Operating Frequency
Minimum
Typical
DC
Maximum
Units
1300
MHz
30/24
dBm
0.65
1.0
dB
Operating Power
On / Off
Insertion Loss
DC – 50 MHz
1000 MHz
Isolation
DC – 50 MHz
1000 MHz
71
44
85
47
Return Loss
DC - 1000 MHz
14
20
dB
Input 1 dB Compression2,4
1000 MHz
30
33
dBm
Input IP22
1000 MHz
80
CTB / CSO
Input IP32
0.5
0.75
77 & 110 channels;
PO = 44 dBmV
1000 MHz
dB
dBm
-100
dBc
50
dBm
Video Feedthrough3
Switching Time
15
2
mVpp
µs
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. Measured in a 50 Ω system.
3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth.
4. Note Absolute Maximum ratings in Table 3.
Document No. 70-0067-03 │ www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 8
PE4240
Product Specification
Figure 3. Pin Configuration
RF2
1
6
Table 4. DC Electrical Specifications @ 25 °C
RFC
Parameter
Min
Typ
Max
Unit
VDD Power Supply
2.7
3.0
3.3
V
33
40
µA
IDD Power Supply Current
GND
2
RF1
3
Exposed Solder
Pad - Shorted
to Pin 2
(bottom side)
5
CTRL
4
VDD
(VDD = 3V, VCNTL = 3V)
Pin
Name
Description
1
VDD
Nominal 3 V supply connection.1
2
GND
Ground connection. 3
RF1
RF port.
4
CTRL
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
5
GND
Ground connection. 3
6
RF2
RF port. 2
Notes: 1. A bypass capacitor should be placed as close as possible
to the pin.
2. Both RF pins must be held at 0 VAC or require external DC
blocking capacitors.
3. The exposed pad must be soldered to the ground plane for
proper switch performance.
Table 3. Absolute Maximum Ratings
Symbol
Max
Unit
Power supply voltage
-0.3
4.0
V
Voltage on CTRL input
-0.3
5.5
V
TST
Storage temperature
-65
150
°C
TOP
Operating temperature
-40
85
°C
PIN
Input power (50Ω),
CTRL=1/CTRL=0
33/24
dBm
VI
VESD
ESD voltage
(Human Body Model)
200
V
Absolute Maximum Ratings are those values listed
in the above table. Exceeding these values may
cause permanent device damage. Functional
operation should be restricted to the limits in the DC
Electrical Specifications table. Exposure to absolute
maximum ratings for extended periods may affect
device reliability.
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
V
Control Voltage Low
0
30% VDD
V
Device Description
The PE4240 high isolation SPST CATV Switch is
designed to support CATV applications such as
premium channel service connect/disconnect switch
blocks. This function is typically performed by bulky
and expensive mechanical switches. The high
isolation characteristics (>44 dB at 1 GHz, 85 dB
at 5 MHz), high compression point, and an
integrated 75-ohm terminations make the PE4240
an ideal, low cost solution.
Figure 4. Typical Application Block Diagram
Min
VDD
Parameter/Condition
5
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
2
3
70% VDD
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Table 2. Pin Descriptions
Pin
No.
Control Voltage High
Premium
Channel
Filter
PE4240
2-way
Splitter
CATVin
CATVout
PE4240
Table 5. Control Logic Truth Table
Control Voltage (CTRL)
1
Signal Path (RF1 to RF2)
High
ON
Low
OFF
Notes: 1. CTRL accepts both CMOS and TTL voltage leads.
The control logic input pin (CTRL) is typically driven
by a 3-volt CMOS logic level signal, and has a
threshold of 50% of VDD. For flexibility to support
systems that have 5-volt control logic drivers, the
control logic input has been designed to handle a 5volt logic HIGH signal. (A minimal current will be
sourced out of the VDD pin when the control logic input voltage level exceeds VDD.)
Document No. 70-0067-03 │ UltraCMOS™ RFIC Solutions
PE4240
Product Specification
Typical Performance Data @ 25 °C (Unless Otherwise Noted)
(75 Ω impedance except as indicated)
Figure 5. Insertion Loss
Figure 6. Input 1dB Compression Point and IIP3
50 Ω system impedance
0
60
60
-0.2
50
50
IIP3
IIP3 (dBm)
Insertion Loss (dB)
-0.6
85 C
-0.8
40
40
25 C
30
30
1dB Compression Point (dBm)
-40 C
-0.4
Input 1dB Compression
-1
-1.2
20
0
200
400
600
800
1000
1200
Frequency (MHz)
20
0
200
400
600
800
1000
1200
Frequency (MHz)
Figure 7. Isolation
0
Isolation (dB)
-20
-40
-60
-80
-100
0
200
400
600
800
1000
1200
Frequency (MHz)
Document No. 70-0067-03 │ www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 8
PE4240
Product Specification
Typical Performance Data @ 25 °C
(75 Ω impedance except as indicated)
Figure 8. RF1 Return Loss (Switch = ON)
Figure 9. RF1 Return Loss (Switch = OFF)
0
0
-5
-6
Return Loss (dB)
Return Loss (dB)
-10
-15
-20
-12
-18
-24
-25
-30
-30
0
200
400
600
800
1000
1200
Frequency (MHz)
0
200
400
600
800
1000
1200
Frequency (MHz)
Figure 10. RF2 Return Loss (Switch = ON)
0
-5
Return Loss (dB)
-10
-15
-20
-25
-30
0
200
400
600
800
1000
1200
Frequency (MHz)
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 8
Document No. 70-0067-03 │ UltraCMOS™ RFIC Solutions
PE4240
Product Specification
Evaluation Kit
The SPST Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4240 SPST switch. The RF1 port is connected
through a 75 Ω transmission line to the top left
BNC connector, J1. The RF2 port is connected
through a 75 Ω transmission line to the BNC
connector on the top right side of the board, J2. A
through transmission line connects BNC
connectors J3 and J4. This transmission line can
be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
Figure 11. Evaluation Board Layouts
Peregrine Specification 101/0079
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide model with
trace width of 0.021”, trace gaps of 0.030”,
dielectric thickness of 0.028”, metal thickness of
0.0021” and εR of 4.3. Note that the predominate
mode for these transmission lines is coplanar
waveguide with a ground plane.
J5 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J5-3) is connected
to the device VDD input. The fourth pin to the right
(J5-7) is connected to the device CTRL input. It is
the responsibility of the customer to determine
proper supply decoupling for their design
application. Removing these components from
the evaluation board has not been shown to
degrade RF performance.
Document No. 70-0067-03 │ www.psemi.com
Figure 12. Evaluation Board Schematic
Peregrine Specification 102/0081
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 8
PE4240
Product Specification
Figure 13. Package Drawing
6-lead DFN
-A-
3.00
6
5
CL
-B4
0.125
CL
3.00
PIN
MAR
1
K
0.10 C
4
1
2
3
0.10 C
4
0.125
+2°
10° -10°
TOP
VIEW
DETAIL C
0.025
±0.025
0.100 C
0.70 ± 0.05
0.90 ±0.10
0.20 ±0.05
SEATING
PLANE
0.080 C
3
SIDE
VIEW
SEE DETAIL B
0.025±0.025
CL
0.35 +0.08
-0.02
0.10
0.05
C
0.95
EXPOSED PAD
1
2
DETAIL B
-C-
0.17 MIN.
0.29 +0.21
-0.08
3
SEE DETAIL A
0.24 +0.20
-0.08
C A B
0.125
EXPOSED SLUG/
HEAT SINK
0.17
0.30
R0.127 TYP
R 0.15 TYP
1.21 ±0.10
0.605 ±0.05
EXPOSED
(2X)
6
5
3
4
.20 MIN.
THIS FEATURE
APPLIES TO
BOTH ENDS OF
THE PKG.
EXPOSED METALIZED
FEATURE
DETAIL A
EDGE OF PLASTIC BODY
1.05±0.05
2.01±0.10
BOTTOM VIEW
1. DIMENSIONS AND TOLERANCES ARE PER ANSi Y14.5
2. DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES.
3
COPLANARITY APPLIES TO EXPOSED HEAT SLUG AS W ELL AS THE TERMINALS.
4
PROFILE TOLERANCE APPLIES TO PLASTIC BODY ONLY.
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 8
Document No. 70-0067-03 │ UltraCMOS™ RFIC Solutions
PE4240
Product Specification
Figure 14. Tape and Reel Specifications
6-lead DFN
Table 6. Dimensions
Dimension
DFN 3x3 mm
Ao
3.23 ± 0.1
Bo
3.17 ± 0.1
Ko
1.37 ± 0.1
P
4 ± 0.1
W
8 +0.3, -0.1
T
0.254 ± 0.02
R7 Quantity
3000
R13 Quantity
N.A.
Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lock Reel
Table 7. Ordering Information
Order Code
Part Marking
Description
Package
Shipping Method
4240-01
4240
PE4240-06DFN 3x3mm-12800F
6-lead 3x3 mm DFN
12800 units / Canister
4240-02
4240
PE4240-06DFN 3x3mm-3000C
6-lead 3x3 mm DFN
3000 units / T&R
4240-00
PE4240-EK
PE4240-06DFN 3x3mm-EK
Evaluation Kit
1 / Box
Document No. 70-0067-03 │ www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 8
PE4240
Product Specification
Sales Offices
The Americas
North Asia Pacific
Peregrine Semiconductor Corporation
Peregrine Semiconductor K.K.
9450 Carroll Park Drive
San Diego, CA 92121
Tel 858-731-9400
Fax 858-731-9499
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
Peregrine Semiconductor, Korea
Peregrine Semiconductor Europe
#B-2402, Kolon Tripolis, #210
Geumgok-dong, Bundang-gu, Seongnam-si
Gyeonggi-do, 463-480 S. Korea
Tel: +82-31-728-4300
Fax: +82-31-728-4305
Bâtiment Maine
13-15 rue des Quatre Vents
F-92380 Garches, France
Tel: +33-1-47-41-91-73
Fax : +33-1-47-41-91-73
South Asia Pacific
Space and Defense Products
Peregrine Semiconductor, China
Americas:
Tel: 505-881-0438
Fax: 505-881-0443
Europe, Asia Pacific:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
Shanghai, 200040, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 8 of 8
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS and HaRP are trademarks of Peregrine
Semiconductor Corp.
Document No. 70-0067-03 │ UltraCMOS™ RFIC Solutions