HCS201 KEELOQ® Code Hopping Encoder FEATURES DESCRIPTION Security The HCS201 from Microchip Technology Inc. is a code hopping encoder designed for secure Remote Keyless Entry (RKE) systems. The HCS201 utilizes the KEELOQ code hopping technology, incorporating high security, a small package outline and low cost. The HCS201 is a perfect solution for unidirectional remote keyless entry systems and access control systems. • • • • • • Programmable 28-bit serial number Programmable 64-bit encryption key Each transmission is unique 66-bit transmission code length 32-bit hopping code 34-bit fixed code (28-bit serial number, 4-bit button code, 2-bit status) • Encryption keys are read protected PACKAGE TYPES PDIP, SOIC S0 1 • 3.5V-13V operation (2.0V min. using the Step up feature) • Three button inputs • 7 functions available • Selectable baud rate • Automatic code word completion • Battery low signal transmitted to receiver • Non-volatile synchronization data S1 2 S2 3 VDDB 4 HCS201 Operating 2001 Microchip Technology Inc. STEP DATA 5 VSS Step Up Controller VDD Controller RESET circuit EEPROM STEP Power latching and switching Oscillator DATA • The HCS201 is ideal for Remote Keyless Entry (RKE) applications. These applications include: • Automotive RKE systems • Automotive alarm systems • Automotive immobilizers • Gate and garage door openers • Identity tokens • Burglar alarm systems 7 6 VDDB Simple programming interface On-chip EEPROM On-chip oscillator and timing components Button inputs have internal pull-down resistors Minimum component count Synchronous Transmission mode Built-in step up regulator Typical Applications VDD HCS201 BLOCK DIAGRAM Other • • • • • • • 8 Encoder 32-bit shift register VSS Button input port VDD S2 S1 S0 The HCS201 combines a 32-bit hopping code, generated by a nonlinear encryption algorithm, with a 28-bit serial number and 6 information bits to create a 66-bit code word. The code word length eliminates the threat of code scanning and the code hopping mechanism makes each transmission unique, thus rendering code capture and resend schemes useless. DS41098C-page 1 HCS201 The crypt key, serial number and configuration data are stored in an EEPROM array which is not accessible via any external connection. The EEPROM data is programmable but read-protected. The data can be verified only after an automatic erase and programming operation. This protects against attempts to gain access to keys or manipulate synchronization values. The HCS201 provides an easy-to-use serial interface for programming the necessary keys, system parameters and configuration data. 1.0 SYSTEM OVERVIEW Key Terms The following is a list of key terms used throughout this data sheet. For additional information on KEELOQ and Code Hopping, refer to Technical Brief 3 (TB003). • RKE - Remote Keyless Entry • Button Status - Indicates what button input(s) activated the transmission. Encompasses the 4 button status bits S3, S2, S1 and S0 (Figure 4-2). • Code Hopping - A method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. • Code word - A block of data that is repeatedly transmitted upon button activation (Figure 4-1). • Transmission - A data stream consisting of repeating code words (Figure 8-1). • Crypt key - A unique and secret 64-bit number used to encrypt and decrypt data. In a symmetrical block cipher such as the KEELOQ algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. • Encoder - A device that generates and encodes data. • Encryption Algorithm - A recipe whereby data is scrambled using a crypt key. The data can only be interpreted by the respective decryption algorithm using the same crypt key. • Decoder - A device that decodes data received from an encoder. • Decryption algorithm - A recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. • Learn – Learning involves the receiver calculating the transmitter’s appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in EEPROM. The KEELOQ product family facilitates several learning strategies to be implemented on the decoder. The following are examples of what can be done. - Simple Learning The receiver uses a fixed crypt key, common to all components of all systems by the same manufacturer, to decrypt the received code word’s encrypted portion. - Normal Learning The receiver uses information transmitted during normal operation to derive the crypt key and decrypt the received code word’s encrypted portion. - Secure Learn The transmitter is activated through a special button combination to transmit a stored 60-bit seed value used to generate the transmitter’s crypt key. The receiver uses this seed value to derive the same crypt key and decrypt the received code word’s encrypted portion. • Manufacturer’s code – A unique and secret 64bit number used to generate unique encoder crypt keys. Each encoder is programmed with a crypt key that is a function of the manufacturer’s code. Each decoder is programmed with the manufacturer code itself. The HCS201 code hopping encoder is designed specifically for keyless entry systems; primarily vehicles and home garage door openers. The encoder portion of a keyless entry system is integrated into a transmitter, carried by the user and operated to gain access to a vehicle or restricted area. The HCS201 is meant to be a cost-effective yet secure solution to such systems, requiring very few external components (Figure 2-1). Most low-end keyless entry transmitters are given a fixed identification code that is transmitted every time a button is pushed. The number of unique identification codes in a low-end system is usually a relatively small number. These shortcomings provide an opportunity for a sophisticated thief to create a device that ‘grabs’ a transmission and retransmits it later, or a device that quickly ‘scans’ all possible identification codes until the correct one is found. The HCS201, on the other hand, employs the KEELOQ code hopping technology coupled with a transmission length of 66 bits to virtually eliminate the use of code ‘grabbing’ or code ‘scanning’. The high security level of the HCS201 is based on the patented KEELOQ technology. A block cipher based on a block length of 32 bits and a key length of 64 bits is used. The algorithm obscures the information in such a way that even if the transmission information (before coding) differs by only one bit from that of the previous transmission, the next DS41098C-page 2 2001 Microchip Technology Inc. HCS201 coded transmission will be completely different. Statistically, if only one bit in the 32-bit string of information changes, greater than 50 percent of the coded transmission bits will change. As indicated in the block diagram on page one, the HCS201 has a small EEPROM array which must be loaded with several parameters before use; most often programmed by the manufacturer at the time of production. The most important of these are: The crypt key generation typically inputs the transmitter serial number and 64-bit manufacturer’s code into the key generation algorithm (Figure 1-2). The manufacturer’s code is chosen by the system manufacturer and must be carefully controlled as it is a pivotal part of the overall system security. • A 28-bit serial number, typically unique for every encoder • A crypt key • An initial 16-bit synchronization value • A 16-bit configuration value FIGURE 1-1: CREATION AND STORAGE OF CRYPT KEY DURING PRODUCTION Production Programmer HCS201 Transmitter Serial Number EEPROM Array Serial Number Crypt Key Sync Counter Manufacturer’s Code Key Generation Algorithm The 16-bit synchronization counter is the basis behind the transmitted code word changing for each transmission; it increments each time a button is pressed. Due to the code hopping algorithm’s complexity, each increment of the synchronization value results in greater than 50% of the bits changing in the transmitted code word. Figure 1-2 shows how the key values in EEPROM are used in the encoder. Once the encoder detects a button press, it reads the button inputs and updates the synchronization counter. The synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypted information. This data will change with every button press, its value appearing externally to ‘randomly hop around’, hence it is referred to as the hopping portion of the code word. The 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. The code word format is explained in greater detail in Section 4.0. Crypt Key . . . A transmitter must first be ‘learned’ by the receiver before its use is allowed in the system. Learning includes calculating the transmitter’s appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in EEPROM. In normal operation, each received message of valid format is evaluated. The serial number is used to determine if it is from a learned transmitter. If from a learned transmitter, the message is decrypted and the synchronization counter is verified. Finally, the button status is checked to see what operation is requested. Figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. A receiver may use any type of controller as a decoder, but it is typically a microcontroller with compatible firmware that allows the decoder to operate in conjunction with an HCS201 based transmitter. Section 7.0 provides detail on integrating the HCS201 into a system. 2001 Microchip Technology Inc. DS41098C-page 3 HCS201 FIGURE 1-2: BUILDING THE TRANSMITTED CODE WORD (ENCODER) EEPROM Array KEELOQ Encryption Algorithm Crypt Key Sync Counter Serial Number Button Press Information Serial Number 32 Bits Encrypted Data Transmitted Information FIGURE 1-3: BASIC OPERATION OF RECEIVER (DECODER) 1 Received Information EEPROM Array Button Press Information Serial Number 2 32 Bits of Encrypted Data Manufacturer Code Check for Match Serial Number Sync Counter Crypt Key 3 KEELOQ Decryption Algorithm Decrypted Synchronization Counter 4 Check for Match Perform Function 5 Indicated by button press NOTE: Circled numbers indicate the order of execution. DS41098C-page 4 2001 Microchip Technology Inc. HCS201 2.0 ENCODER OPERATION TABLE 2-1: As shown in the typical application circuits (Figure 2-1), the HCS201 is a simple device to use. It requires only the addition of buttons and RF circuitry for use as the transmitter in your security application. A description of each pin is given in Table 2-1. FIGURE 2-1: TYPICAL CIRCUITS VDD B0 S0 VDD B1 S1 STEP S2 DATA Tx out VSS VDDB Two button remote control VDD B3 B2 B1 B0 S0 VDD S1 STEP S2 DATA VDDB Tx out VSS Four button remote control VDD Pin Pin Name Number PIN DESCRIPTIONS Pin Description S0 1 Switch input 0 S1 2 Switch input 1 S2 3 Switch input 2 / Clock pin for Programming mode VDDB 4 Battery input pin, supplies power to the step up control circuitry VSS 5 Ground reference connection DATA 6 Pulse Width Modulation (PWM) output pin / Data pin for Programming mode STEP 7 Step up regulator switch control VDD 8 Positive supply voltage The HCS201 will wake-up upon detecting a button press and delay approximately 10 ms for button debounce (Figure 2-2). The synchronization counter, discrimination value and button information will be encrypted to form the hopping code. The hopping code portion will change every transmission, even if the same button is pushed again. A code word that has been transmitted will not repeat for more than 64K transmissions. This provides more than 18 years of use before a code is repeated; based on 10 operations per day. Overflow information sent from the encoder can be used to extend the number of unique transmissions to more than 192K. If in the transmit process it is detected that a new button(s) has been pressed, a RESET will immediately occur and the current code word will not be completed. Please note that buttons removed will not have any effect on the code word unless no buttons remain pressed; in which case the code word will be completed and the power-down will occur. L D S0 VDD S1 STEP S2 DATA R VDDB Q C Tx out VSS 2.0-6.0V Three button remote control with Step up regulator External components sample values: R = 5.1 KΩ L = 390 uH C = 1.0 uF D = ZHCS400CT (40V 0.4A Zetex) Q = 2N3904 (see Section 5.6 for a description of the Step Up circuit) Note: Up to 7 functions can be implemented by pressing more than one button simultaneously or by using a suitable diode array. 2001 Microchip Technology Inc. DS41098C-page 5 HCS201 FIGURE 2-2: ENCODER OPERATION 3.0 EEPROM MEMORY ORGANIZATION Power-Up (A button has been pressed) RESET and Debounce Delay (10 ms) Sample Inputs The HCS201 contains 192 bits (12 x 16-bit words) of EEPROM memory (Table 3-1). This EEPROM array is used to store the encryption key information, synchronization value, etc. Further descriptions of the memory array is given in the following sections. TABLE 3-1: Update Sync Info Encrypt With Crypt Key WORD ADDRESS MNEMONIC 0 KEY_0 64-bit encryption key (word 0) 1 KEY_1 64-bit encryption key (word 1) 2 KEY_2 64-bit encryption key (word 2) 3 KEY_3 64-bit encryption key (word 3) 4 SYNC 16-bit synchronization value Load Transmit Register Transmit Yes Buttons Added ? No All Buttons Released ? EEPROM MEMORY MAP No 5 Yes Complete Code Word Transmission Stop 3.1 DESCRIPTION RESERVED Set to 0000H 6 SER_0 Device Serial Number (word 0) 7 SER_1 Device Serial Number (word 1) 8 SEED_0 Seed Value (word 0) 9 SEED_1 Seed Value (word 1) 10 DISC Discrimination Word 11 CONFIG Config Word KEY_0 - KEY_3 (64-Bit Crypt Key) The 64-bit crypt key is used to create the encrypted message transmitted to the receiver. This key is calculated and programmed during production using a key generation algorithm. The key generation algorithm may be different from the KEELOQ algorithm. Inputs to the key generation algorithm are typically the transmitter’s serial number and the 64-bit manufacturer’s code. While the key generation algorithm supplied from Microchip is the typical method used, a user may elect to create their own method of key generation. This may be done providing that the decoder is programmed with the same means of creating the key for decryption purposes. 3.2 SYNC (Synchronization Counter) This is the 16-bit synchronization value that is used to create the hopping code for transmission. This value will increment after every transmission. DS41098C-page 6 2001 Microchip Technology Inc. HCS201 3.3 Reserved Must be initialized to 0000H. serial number then it may merely be compared to the respective bits of the received serial number; saving EEPROM space. 3.4 3.7 SER_0, SER_1 (Encoder Serial Number) SER_0 and SER_1 are the lower and upper words of the device serial number, respectively. Although there are 32 bits allocated for the serial number, only the lower order 28 bits are transmitted. The serial number is meant to be unique for every transmitter. 3.5 SEED_0, SEED_1 (Seed Word) The 2-word (32-bit) seed code will be transmitted when all three buttons are pressed at the same time (see Figure 4-2). This allows the system designer to implement the secure learn feature or use this fixed code word as part of a different key generation/tracking process. TABLE 3-2: Bit Number 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 3.6 The Configuration Word is a 16-bit word stored in EEPROM array that is used by the device to store information used during the encryption process, as well as the status of option configurations. Further explanations of each of the bits are described in the following sections. TABLE 3-3: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Bit Description DISC (Discrimination Word) The discrimination value aids the post-decryption check on the decoder end. It may be any value, but in a typical system it will be programmed as the 12 Least Significant bits of the serial number. Values other than this must be separately stored by the receiver when a transmitter is learned. The discrimination bits are part of the information that form the encrypted portion of the transmission (Figure 4-2). After the receiver has decrypted a transmission, the discrimination bits are checked against the receiver’s stored value to verify that the decryption process was valid. If the discrimination value was programmed as the 12 LSb’s of the 2001 Microchip Technology Inc. CONFIGURATION WORD Bit Number DISCRIMINATION WORD Discrimination Bit 0 Discrimination Bit 1 Discrimination Bit 2 Discrimination Bit 3 Discrimination Bit 4 Discrimination Bit 5 Discrimination Bit 6 Discrimination Bit 7 Discrimination Bit 8 Discrimination Bit 9 Discrimination Bit 10 Discrimination Bit 11 Not Used Not Used Not Used Not Used CONFIG (Configuration Word) 3.7.1 Bit Name OSC0 OSC1 OSC2 OSC3 VLOWS BRS MTX4 TXEN S3SET XSER Not Used Not Used Not Used Not Used Not Used Not Used OSCILLATOR TUNING BITS (OSC0 AND OSC3) These bits are used to tune the frequency of the HCS201 internal clock oscillator to within ±10% of its nominal value over temperature and voltage. 3.7.2 LOW VOLTAGE TRIP POINT SELECT (VLOWS) The low voltage trip point select bit (VLOWS) and the S3 setting bit (S3SET) are used to determine when to send the VLOW signal to the receiver. TABLE 3-4: TRIP POINT SELECT VLOWS S3SET* Trip Point 0 0 1 1 0 1 0 1 4.4 4.4 9 6.75 * See also Section 3.7.6 DS41098C-page 7 HCS201 3.7.3 BAUD RATE SELECT BITS (BRS) BRS selects the speed of transmission and the code word blanking. Table 3-5 shows how the bit is used to select the different baud rates and Section 5.5 provides detailed explanation in code word blanking. TABLE 3-5: BAUDRATE SELECT 0 Basic Pulse Element 400 µs Code Words Transmitted All 1 200 µs 1 out of 2 BRS 3.7.4 MINIMUM FOUR TRANSMISSIONS (MTX4) If this bit is cleared, only one code is completed if the HCS201 is activated. If this bit is set, at least four complete code words are transmitted, even if code word blanking is enabled. 3.7.5 TRANSMIT PULSE ENABLE (TXEN) If this bit is cleared, no transmission pulse is transmitted before a transmission. If the bit is set, a START pulse (1 TE long) is transmitted after button de-bouncing, before the preamble of the first code word. 3.7.6 S3 SETTING (S3SET) This bit determines the value of S3 in the function code during a transmission and the high trip point selected by VLOWS in section 3.6.2. If this bit is cleared, S3 mirrors S2 during a transmission. If the S3SET bit is set, S3 in the function code (Button Status) is always set, independent of the value of S2. 3.7.7 EXTENDED SERIAL NUMBER (XSER) If this bit is set, a long 32-bit Serial Number is transmitted. If this bit is cleared, a standard 28-bit Serial Number is transmitted followed by 4 bits of the function code (Button Status). DS41098C-page 8 2001 Microchip Technology Inc. HCS201 4.0 TRANSMITTED WORD 4.2 4.1 Code Word Format The HCS201 transmits a 66-bit code word when a button is pressed. The 66-bit word is constructed from a Fixed Code portion and an Encrypted Code portion (Figure 4-2). The HCS201 code word is made up of several parts (Figure 4-1). Each code word contains a 50% duty cycle preamble, a header, 32 bits of encrypted data and 34 bits of fixed data followed by a guard period before another code word can begin. Refer to Table 8-4 for code word timing. Code Word Organization The 32 bits of Encrypted Data are generated from 4 button bits, 12 discrimination bits and the 16-bit sync value. The encrypted portion alone provides up to four billion changing code combinations. The 34 bits of Fixed Code Data are made up of 2 status bits, 4 button bits and the 28-bit serial number. The fixed and encrypted sections combined increase the number of code combinations to 7.38 x 1019. FIGURE 4-1: CODE WORD FORMAT TE TE TE LOGIC ‘0’ LOGIC ‘1’ Bit Period 50% Duty Cycle Preamble TP FIGURE 4-2: Header TH Encrypted Portion of Transmission THOP VLOW (1 bit) MSb Button Status S2 S1 S0 S3 Serial Number (28 bits) 32 bits of Encrypted Portion Button Status S2 S1 S0 S3 DISC (12 bits) Sync Counter (16 bits) 66 Data bits Transmitted LSb first. 1 MSb Guard Time TG CODE WORD ORGANIZATION 34 bits of Fixed Portion 1 Fixed Portion of Transmission TFIX VLOW (1 bit) Button Status 1 1 1 1 Serial Number (28 bits) LSb SEED (32 bits) LSb SEED replaces Encrypted Portion when all button inputs are activated at the same time. 2001 Microchip Technology Inc. DS41098C-page 9 HCS201 4.3 Synchronous Transmission Mode Synchronous Transmission mode can be used to clock the code word out using an external clock. To enter Synchronous Transmission mode, the Programming mode start-up sequence must be executed as shown in Figure 4-3. If either S1 or S0 is set on the falling edge of S2 (or S3), the device enters Synchronous Transmission mode. In this mode, it functions as a normal transmitter, with the exception that the timing of the PWM data string is controlled externally and 16 extra bits are transmitted at the end with the code word. FIGURE 4-3: The button code will be the S0, S1 value at the falling edge of S2 or S3. The timing of the PWM data string is controlled by supplying a clock on S2 or S3 and should not exceed 20 kHz. The code word is the same as in PWM mode with 16 reserved bits at the end of the word. The reserved bits can be ignored. When in Synchronous Transmission mode S2 or S3 should not be toggled until all internal processing has been completed as shown in Figure 4-4. SYNCHRONOUS TRANSMISSION MODE (TXEN=0) TPS TPH1 TPH2 t = 50ms Preamble Header Data PWM S2 S[1:0] FIGURE 4-4: “01,10,11” CODE WORD ORGANIZATION (SYNCHRONOUS TRANSMISSION MODE) Fixed Portion Reserved (16 bits) MSb DS41098C-page 10 Padding (2 bits) Button Status S2 S1 S0 S3 Encrypted Portion Serial Number (28 bits) Button Status S2 S1 S0 S3 DISC (12 bits) Sync Counter (16 bits) 82 Data bits Transmitted LSb first. LSb 2001 Microchip Technology Inc. HCS201 5.0 SPECIAL FEATURES 5.1 Code Word Completion TABLE 5-1: The code word completion feature ensures that entire code words are transmitted, even if the button is released before the code word is complete. If the button is held down beyond the time for one code word, multiple code words will result. If another button is activated during a transmission, the active transmission will be aborted and a new transmission will begin using the new button information. 5.2 5.3 Auto-Shutoff The auto-shutoff function automatically stops the device from transmitting if a button inadvertently gets pressed for a long period of time. This will prevent the device from draining the battery if a button gets pressed while the transmitter is in a pocket or purse. Time-out period is TTO. 5.4 Seed Transmission In order to increase the level of security in a system, it is possible for the receiver to implement what is known as a secure learn function. This can be done by utilizing the seed value stored in EEPROM, transmitted only when all three button inputs are pressed at the same time (Table 5-1). Instead of the normal key generation inputs being used to create the crypt key, this seed value is used. FIGURE 5-1: Function S2 S1 S0 0 0 0 0 1 0 0 1 2 0 1 0 - - - - 5 1 0 1 6 1 1 0 7 1 1 1 Standby Hopping Code Seed Code VLOW: Voltage LOW Indicator The VLOW bit is transmitted with every transmission (Figure 8-4) and will be transmitted as a one if the operating voltage has dropped below the low voltage trip point. The trip point is selectable based on the battery voltage being used. See Section 3.7.2 for a description of how the low voltage select option is set. This VLOW signal is transmitted so the receiver can give an audible signal to the user that the transmitter battery is low. PIN ACTIVATION TABLE 5.5 Blank Alternate Code Word Federal Communications Commission (FCC) part 15 rules specify the limits on worst case average fundamental power and harmonics that can be transmitted in a 100 ms window. For FCC approval purposes, it may therefore be advantageous to minimize the transmission duty cycle. This can be achieved by minimizing the duty cycle of the individual bits as well as by blanking out consecutive code words. Blank Alternate Code Word (BACW) may be used to reduce the average power of a transmission by transmitting only every second code word (Figure 5-1). This is a selectable feature that is determined in conjunction with the baud rate selection bit BSL0. Enabling the BACW option may likewise allow the user to transmit a higher amplitude transmission as the time averaged power is reduced. BACW effectively halves the RF on time for a given transmission so the RF output power could theoretically be doubled while maintaining the same time averaged output power. BLANK ALTERNATE CODE WORD (BACW) Amplitude BRS = 0 BRS = 1 A Code Word Code Word Code Word Code Word 2A Time 2001 Microchip Technology Inc. DS41098C-page 11 HCS201 5.6 FIGURE 5-2: Step Up Regulator The integrated Step Up regulator can be used to ensure the power supply voltage to the encoder and the RF circuit (VDD), is constant independent of what the battery voltage is (VDDB). Input on VDD pin is compared to VSTEP, the internal reference voltage. If VDD falls below this voltage the STEP output is pulsed at fSTEP. This output can be connected to an external circuit as illustrated in Figure 5-2, to provide a step up voltage on the device. APPLICATION CIRCUIT VDD L D The Step Up regulator is inactive when the device is not transmitting. S0 VDD S1 STEP S2 DATA VDDB R Q C Tx out VSS 2.0-6.0V Note: FIGURE 5-3: Vdd(V) Three button remote control with Step up regulator Power to the Step up regulator is taken from the VDDB pin. While VDD is limited to a 3.5V minimum, VDDB minimum can be as low as 2.0V for the Step Up circuit to start operating. External components sample values: R = 5.1 KΩ L = 390 uH C = 1.0 uF D = ZHCS400CT (40V 0.4A Zetex) Q = 2N3904 TYPICAL LOADING CURVES (FIGURE 5-2 CIRCUIT) 8 7 6 5 4 3 2 1 0 Vddb=2V Vddb=2.5V Vddb=3V Vddb=3.5V 0 5 10 15 20 Load(mA) Note: These are typical values not tested in production. TABLE 5-2: Symbol STEP UP CIRCUIT CHARACTERISTICS Parameters Min. Typ. Max. Units fSTEP Output frequency 125 200 250 kHz VSTEP Reference voltage 5.5 6.5 7.5 V Note: These parameters are characterized but not tested. DS41098C-page 12 Conditions VDDB = 3V 2001 Microchip Technology Inc. HCS201 PROGRAMMING THE HCS201 Twc. After every 16-bit word is written to the HCS201, the HCS201 will signal that the write is complete by sending out a train of ACK pulses, TACKH high, TACKL low (if the oscillator was perfectly tuned) on DATA. These will continue until S2 is dropped. The first pulse’s width should NOT be used for calibration. At the end of the programming cycle, the device can be verified (Figure 6-2) by reading back the EEPROM. Reading is done by clocking the S2 line and reading the data bits on DATA. For security reasons, it is not possible to execute a verify function without first programming the EEPROM. A Verify operation can only be done once, immediately following the Program cycle. When using the HCS201 in a system, the user will have to program some parameters into the device including the serial number and the secret key before it can be used. The programming cycle allows the user to input all 192 bits in a serial data stream, which are then stored internally in EEPROM. Programming will be initiated by forcing the DATA line high, after the S2 line has been held high for the appropriate length of time line (Table 6-1 and Figure 6-1). After the Program mode is entered, a delay must be provided to the device for the automatic bulk write cycle to complete. This will write all locations in the EEPROM to an all zeros pattern. The device can then be programmed by clocking in 16 bits at a time, using S2 as the clock line and DATA as the data in line. After each 16-bit word is loaded, a programming delay is required for the internal program cycle to complete. This delay can take up to To ensure that the device does not accidentally enter Programming mode, DATA should never be pulled high by the circuit connected to it. Special care should be taken when driving PNP RF transistors. PROGRAMMING WAVEFORMS Initiate Data Polling Here TCLKH H O LD TPBW TCLKL TDS TP Enter Program Mode DATA (Data) Bit 0 Bit 1 TWC TDH TCLKL Bit 2 TA TPS TPH1 C KL S2 (Clock) Bit 3 Bit 14 TPH2 Ack Ack Bit 15 C KH FIGURE 6-1: Note: TA 6.0 Ack Calibration Pulses Write Cycle Complete Here Bit 16 Bit 17 Data for Word 1 Repeat for each word (12 times) Note 1: S0 and S1 button inputs to be held to ground during the entire programming sequence. FIGURE 6-2: VERIFY WAVEFORMS End of Programming Cycle Beginning of Verify Cycle Data from Word 0 DATA (Data) Bit190 Bit191 Ack TWC Bit 0 Bit 1 Bit 2 Bit 3 Bit 14 Bit 15 Bit 16 Bit 17 Bit190 Bit191 TDV S2 (Clock) Note: If a Verify operation is to be done, then it must immediately follow the Program cycle. 2001 Microchip Technology Inc. DS41098C-page 13 HCS201 TABLE 6-1: PROGRAMMING/VERIFY TIMING REQUIREMENTS VDD = 5.0V ± 10%, 25° C ± 5 °C Parameter Program mode setup time Hold time 1 Hold time 2 Bulk Write time Program delay time Program cycle time Clock low time Clock high time Data setup time Data hold time Data out valid time Hold time Acknowledge low time Acknowledge high time DS41098C-page 14 Symbol Min. Max. Units TPS TPH1 TPH2 TPBW TPROG TWC TCLKL TCLKH TDS TDH TDV TPHOLD TACKL TACKH 2 4.0 50 4.0 4.0 50 50 50 0 18 — 100 800 800 5.0 — — — — — — — — — 30 — — — ms ms µs ms ms ms µs µs µs µs µs µs µs µs 2001 Microchip Technology Inc. HCS201 7.0 INTEGRATING THE HCS201 INTO A SYSTEM Use of the HCS201 in a system requires a compatible decoder. This decoder is typically a microcontroller with compatible firmware. Microchip will provide (via a license agreement) firmware routines that accept transmissions from the HCS201 and decrypt the hopping code portion of the data stream. These routines provide system designers the means to develop their own decoding system. 7.1 Learning a Transmitter to a Receiver A transmitter must first be ’learned’ by a decoder before its use is allowed in the system. Several learning strategies are possible, Figure 7-1 details a typical learn sequence. Core to each, the decoder must minimally store each learned transmitter’s serial number and current synchronization counter value in EEPROM. Additionally, the decoder typically stores each transmitter’s unique crypt key. The maximum number of learned transmitters will therefore be relative to the available EEPROM. A transmitter’s serial number is transmitted in the clear but the synchronization counter only exists in the code word’s encrypted portion. The decoder obtains the counter value by decrypting using the same key used to encrypt the information. The KEELOQ algorithm is a symmetrical block cipher so the encryption and decryption keys are identical and referred to generally as the crypt key. The encoder receives its crypt key during manufacturing. The decoder is programmed with the ability to generate a crypt key as well as all but one required input to the key generation routine; typically the transmitter’s serial number. Figure 7-1 summarizes a typical learn sequence. The decoder receives and authenticates a first transmission; first button press. Authentication involves generating the appropriate crypt key, decrypting, validating the correct key usage via the discrimination bits and buffering the counter value. A second transmission is received and authenticated. A final check verifies the counter values were sequential; consecutive button presses. If the learn sequence is successfully complete, the decoder stores the learned transmitter’s serial number, current synchronization counter value and appropriate crypt key. From now on the crypt key will be retrieved from EEPROM during normal operation instead of recalculating it for each transmission received. FIGURE 7-1: TYPICAL LEARN SEQUENCE Enter Learn Mode Wait for Reception of a Valid Code Generate Key from Serial Number Use Generated Key to Decrypt Compare Discrimination Value with Fixed Value Equal ? No Yes Wait for Reception of Second Valid Code Use Generated Key to Decrypt Compare Discrimination Value with Fixed Value Equal ? No Yes Counters Sequential ? Yes No Learn successful Store: Learn Unsuccessful Serial number Encryption key Synchronization counter Exit Certain learning strategies have been patented and care must be taken not to infringe. 2001 Microchip Technology Inc. DS41098C-page 15 HCS201 7.2 Decoder Operation 7.3 Figure 7-2 summarizes normal decoder operation. The decoder waits until a transmission is received. The received serial number is compared to the EEPROM table of learned transmitters to first determine if this transmitter’s use is allowed in the system. If from a learned transmitter, the transmission is decrypted using the stored crypt key and authenticated via the discrimination bits for appropriate crypt key usage. If the decryption was valid the synchronization value is evaluated. FIGURE 7-2: TYPICAL DECODER OPERATION Start No Transmission Received ? Yes No Is Decryption Valid ? Yes No Is Counter Within 16 ? No No Is Counter Within 32K ? Yes Save Counter in Temp Location DS41098C-page 16 Yes The KEELOQ technology patent scope includes a sophisticated synchronization technique that does not require the calculation and storage of future codes. The technique securely blocks invalid transmissions while providing transparent resynchronization to transmitters inadvertently activated away from the receiver. Figure 7-3 shows a 3-partition, rotating synchronization window. The size of each window is optional but the technique is fundamental. Each time a transmission is authenticated, the intended function is executed and the transmission’s synchronization counter value is stored in EEPROM. From the currently stored counter value there is an initial "Single Operation" forward window of 16 codes. If the difference between a received synchronization counter and the last stored counter is within 16, the intended function will be executed on the single button press and the new synchronization counter will be stored. Storing the new synchronization counter value effectively rotates the entire synchronization window. A "Double Operation" (resynchronization) window further exists from the Single Operation window up to 32K codes forward of the currently stored counter value. It is referred to as "Double Operation" because a transmission with synchronization counter value in this window will require an additional, sequential counter transmission prior to executing the intended function. Upon receiving the sequential transmission the decoder executes the intended function and stores the synchronization counter value. This resynchronization occurs transparently to the user as it is human nature to press the button a second time if the first was unsuccessful. Does Serial Number Match ? Yes Decrypt Transmission No Synchronization with Decoder (Evaluating the Counter) Execute Command and Update Counter The third window is a "Blocked Window" ranging from the double operation window to the currently stored synchronization counter value. Any transmission with synchronization counter value within this window will be ignored. This window excludes previously used, perhaps code-grabbed transmissions from accessing the system. Note: The synchronization method described in this section is only a typical implementation and because it is usually implemented in firmware, it can be altered to fit the needs of a particular system. 2001 Microchip Technology Inc. HCS201 FIGURE 7-3: SYNCHRONIZATION WINDOW Entire Window rotates to eliminate use of previously used codes Blocked Window (32K Codes) Stored Synchronization Counter Value Double Operation (resynchronization) Window (32K Codes) 2001 Microchip Technology Inc. Single Operation Window (16 Codes) DS41098C-page 17 HCS201 8.0 ELECTRICAL CHARACTERISTICS TABLE 8-1: ABSOLUTE MAXIMUM RATINGS Symbol Item Rating Units VDD Supply voltage -0.3 to 13.5 V VIN Input voltage -0.3 to VDD + 0.3 V VOUT Output voltage -0.3 to VDD + 0.3 V IOUT Max output current 50 mA TSTG Storage temperature -55 to +125 C (Note 1) TLSOL Lead soldering temp 300 C (Note 1) Note 1: Stresses above those listed under “ABSOLUTE MAXIMUM RATINGS” may cause permanent damage to the device. TABLE 8-2: DC CHARACTERISTICS Commercial (C): Tamb = 0°C to +70°C Industrial (I): Tamb = -40°C to +85°C 3.5V < VDD < 5.0V 5.0V < VDD < 13.0V Parameter Sym. Min. Typ.1 Max. Min. Typ.1 Max. Unit Operating Current (avg)2 ICC — 0.2 0.5 — — 1.5 — 2 mA mA Standby Current ICCS — 0.1 1.0 — 0.1 1.0 µA Auto-shutoff Current3,4 ICCS — 40 75 — 160 300 µA High Level Input Voltage VIH 0.55VDD — VDD+0.3 2.75 — VDD+0.3 V Low level Input Voltage VIL -0.3 — 0.15VDD -0.3 — 0.75 V High level Output Voltage VOH 0.6VDD — — — 3.3 — — V V IOH = -1.0 mA VDD = 3.5V IOH = -2.0 mA VDD = 12V Low Level Output Voltage VOL — — 0.08VDD — — — 0.4 V V IOL = 1.0 mA VDD = 5V IOL = 2.0 mA VDD = 12V Pull-down Resistance; S0-S2 RSO-2 40 60 80 40 60 80 kΩ VDD = 4.0V Pull-down Resistance; DATA RDATA 80 120 160 80 120 160 kΩ VDD = 4.0V Conditions Note 1: Typical values are at 25°C. 2: No load. 3: Auto-shutoff current specification does not include the current through the input pull-down resistors. 4: These values are characterized but not tested. DS41098C-page 18 2001 Microchip Technology Inc. HCS201 FIGURE 8-1: POWER-UP AND TRANSMIT TIMING Button Press Detect Multiple Code Word Transmission TBP TTD TDB DATA Output Code Word 1 TS Code Word 2 Code Word 3 Code Word 4 Code Word n TTO Button Input Sn POWER-UP AND TRANSMIT TIMING(2) TABLE 8-3: Standard Operating Conditions (unless otherwise specified): Commercial(C): Tamb = 0°C to +70°C Industrial(I): Tamb = -40°C to +85°C Symbol TBP Parameter Min. Time to second button press 10 + Code Word 12 6 Typ. Max. Unit Conditions 26 + Code Word 26 20 ms (Note 1) Transmit delay from button detect ms TTD TDB Debounce Delay ms TTO Auto-shutoff time-out period 27 s Ts START Pulse Delay 4.5 ms Note 1: TBP is the time in which a second button can be pressed without completion of the first code word (the intention was to press the combination of buttons). 2: Typical values - not tested in production. FIGURE 8-2: CODE WORD FORMAT TE TE TE LOGIC ‘0’ LOGIC ‘1’ Bit Period TBP 50% Duty Cycle Preamble TP 2001 Microchip Technology Inc. Header TH Encrypted Portion of Transmission THOP Fixed Portion of Transmission TFIX Guard Time TG DS41098C-page 19 HCS201 FIGURE 8-3: CODE WORD FORMAT: PREAMBLE/HEADER PORTION P1 P12 Bit 0 Bit 1 23 TE 50% Duty Cycle Preamble FIGURE 8-4: 10 TE Header CODE WORD FORMAT: DATA PORTION (XSER=0) Serial Number MSB LSB LSB Bit 0 Bit 1 Header Data Bits MSB S0 S1 S2 VLOW RPT Guard Time Fixed Portion CODE WORD TRANSMISSION TIMING REQUIREMENTS VDD = +3.5 to 6.0V Commercial (C): Tamb = 0°C to +70°C Industrial (I): Tamb = -40°C to +85°C Symbol S3 Status Bit 30 Bit 31 Bit 32 Bit 33 Bit 58 Bit 59 Bit 60 Bit 61 Bit 62 Bit 63 Bit 64 Bit 65 Encrypted Portion TABLE 8-4: Button Code Characteristic Code Words Transmitted All 1 out of 2 Number of TE Min. Typ. Max. Min. Typ. Max. Units TE Basic pulse element 1 360 400 440 180 200 220 µs TBP PWM bit pulse width 3 1.08 1.2 1.32 0.54 0.6 0.66 ms TP Preamble duration 23 8.64 9.2 10.56 4.32 4.6 5.28 ms TH Header duration 10 3.6 4.0 4.4 1.8 2.0 2.2 ms THOP Hopping code duration 96 34.56 38.4 42.24 17.28 19.2 21.12 ms TFIX Fixed code duration 102 36.72 40.8 44.88 18.36 20.4 22.44 ms TG Guard Time 39 14.04 15.6 17.16 7.02 7.8 8.58 ms Total Transmit Time 271 97.56 108.4 119.24 48.78 54.2 59.62 ms PWM data rate 925 833 757 1851 1667 1515 bps Note 1: The timing parameters are not tested but derived from the oscillator clock. DS41098C-page 20 2001 Microchip Technology Inc. HCS201 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP (300 mil) Example XXXXXXXX XXXXXNNN YYWW HCS201 XXXXXNNN 0025 8-Lead SOIC (150 mil) XXXXXXX XXXYYWW NNN Legend: XX...X YY WW NNN Note: * Example HCS201 XXX0025 NNN Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2001 Microchip Technology Inc. DS41098C-page 21 HCS201 9.2 Package Details 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A2 A L c A1 β B1 p eB B Units Dimension Limits n p Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D L c § B1 B eB α β MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 INCHES* NOM MAX 8 .100 .155 .130 .170 .145 .313 .250 .373 .130 .012 .058 .018 .370 10 10 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MIN MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 DS41098C-page 22 2001 Microchip Technology Inc. HCS201 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 α h 45° c A2 A φ β L Units Dimension Limits n p Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D h L φ c B α β MIN .053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0 A1 INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX .069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15 MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 MIN MAX 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 2001 Microchip Technology Inc. DS41098C-page 23 HCS201 ON-LINE SUPPORT Microchip provides on-line support on the Microchip World Wide Web (WWW) site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape or Microsoft Explorer. Files are also available for FTP download from our FTP site. Connecting to the Microchip Internet Web Site Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive any currently available upgrade kits.The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. The Microchip web site is available by using your favorite Internet browser to attach to: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.microchip.com The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User’s Guides, Articles and Sample Programs. A variety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: • Latest Microchip Press Releases • Technical Support Section with Frequently Asked Questions • Design Tips • Device Errata • Job Postings • Microchip Consultant Program Member Listing • Links to other useful web sites related to Microchip Products • Conferences for products, Development Systems, technical information and more • Listing of seminars and events DS41098C-page 24 2001 Microchip Technology Inc. HCS201 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-7578. Please list the following information, and use this outline to provide us with your comments about this Data Sheet. To: Technical Publications Manager RE: Reader Response Total Pages Sent From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Device: HCS201 Y N Literature Number: DS41098C Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this data sheet easy to follow? If not, why? 4. What additions to the data sheet do you think would enhance the structure and subject? 5. What deletions from the data sheet could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? 2001 Microchip Technology Inc. DS41098C-page 25 HCS201 NOTES: DS41098C-page 26 2001 Microchip Technology Inc. Microchip’s Secure Data Products are covered by some or all of the following patents: Code hopping encoder patents issued in Europe, U.S.A., and R.S.A. — U.S.A.: 5,517,187; Europe: 0459781; R.S.A.: ZA93/4726 Secure learning patents issued in the U.S.A. and R.S.A. — U.S.A.: 5,686,904; R.S.A.: 95/5429 Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microID, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2001, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified. 2001 Microchip Technology Inc. DS41098C - page 27 WORLDWIDE SALES AND SERVICE AMERICAS ASIA/PACIFIC Japan Corporate Office Australia 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com Microchip Technology Australia Pty Ltd Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 Microchip Technology Japan K.K. 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Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 10/01/01 DS41098C-page 28 2001 Microchip Technology Inc.