TI CLVC244AQDWRG4Q1

SN74LVC244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS790B − DECEMBER 2004 − REVISED JANUARY 2008
D
D
D
D
D
D
D
D
D
D
Qualified for Automotive Applications
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Specified From −40°C to 85°C and
−40°C to 125°C
Max tpd of 5.9 ns at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V VCC)
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
DW OR PW PACKAGE
(TOP VIEW)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
description/ordering information
This octal buffer/line driver is operational at 1.5-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V
VCC operation.
The SN74LVC244A is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator
in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION†
−40°C
40°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE‡
TA
TOP-SIDE
MARKING
SOIC − DW
Reel of 2000
SN74LVC244AQDWRQ1
LVC244AQ
TSSOP − PW
Reel of 2000
SN74LVC244AQPWRQ1
LVC244AQ
†
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
SN74LVC244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS790B − DECEMBER 2004 − REVISED JANUARY 2008
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
1
2OE
2
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
19
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Power dissipation, Ptot (TA = −40°C to 125°C) (see Notes 4 and 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. For the DW package, above 70°C the value of Ptot derates linearly with 8 mW/K.
5. For the PW package, above 60°C the value of Ptot derates linearly with 5.5 mW/K.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74LVC244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS790B − DECEMBER 2004 − REVISED JANUARY 2008
recommended operating conditions (see Note 6)
TA = 25°C
Operating
VCC
Supply voltage
VIH
High-level
Hi
hl
l input
i
t
voltage
VIL
Low-level
L
l
l input
i
t
voltage
Data retention only
−40 TO 85°C
−40 TO 125°C
MIN
MAX
MIN
MAX
MIN
MAX
1.65
3.6
1.65
3.6
1.65
3.6
1.5
1.5
1.5
0.65 × VCC
0.65 × VCC
0.65 × VCC
VCC = 2.3 V to 2.7 V
1.7
1.7
1.7
VCC = 2.7 V to 3.6 V
2
2
2
VCC = 1.65 V to 1.95 V
V
V
0.35 × VCC
0.35 × VCC
0.35 × VCC
VCC = 2.3 V to 2.7 V
0.7
0.7
0.7
VCC = 2.7 V to 3.6 V
0.8
0.8
0.8
VCC = 1.65 V to 1.95 V
UNIT
V
VI
Input voltage
0
5.5
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
IOH
High level
High-level
output current
IOL
Low level
Low-level
output current
VCC = 1.65 V
−4
−4
VCC = 2.3 V
−8
−8
−4
−8
VCC = 2.7 V
−12
−12
−12
VCC = 3 V
−24
−24
−24
VCC = 1.65 V
4
4
4
VCC = 2.3 V
8
8
8
VCC = 2.7 V
12
12
12
VCC = 3 V
24
24
24
mA
mA
NOTE 6: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
SN74LVC244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS790B − DECEMBER 2004 − REVISED JANUARY 2008
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −100 μA
VOH
1.65 V to 3.6 V
4
MAX
−40 TO 85°C
−40 TO 125°C
MIN
MIN
MAX
VCC − 0.2
VCC − 0.2
VCC − 0.3
1.29
1.2
1.05
IOH = −8 mA
2.3 V
1.9
1.7
1.55
2.7 V
2.2
2.2
2.05
3V
2.4
2.4
2.25
3V
2.3
2.2
2
IOL = 100 μA
†
TYP
1.65 V
IOH = −24 mA
MAX
UNIT
V
1.65 V to 3.6 V
0.1
0.2
0.3
IOL = 4 mA
1.65 V
0.24
0.45
0.6
IOL = 8 mA
2.3 V
0.3
0.7
0.75
IOL = 12 mA
2.7 V
0.4
0.4
0.6
IOL = 24 mA
3V
0.55
0.55
0.8
3.6 V
±1
±5
±20
μA
0
±1
±10
±20
μA
3.6 V
±1
±10
±20
μA
1
10
40
1
10
40
500
500
5000
II
VI = 5.5 V or GND
Ioff
VI or VO = 5.5 V
IOZ
VO = 0 to 5.5 V
ICC
MIN
IOH = −4 mA
IOH = −12
12 mA
VOL
TA = 25°C
VCC
VI = VCC or GND
3.6 V ≤ VI ≤ 5.5 V†
IO = 0
36V
3.6
V
μA
A
ΔICC
One input at VCC − 0.6 V,
Other inputs at VCC or GND
Ci
VI = VCC or GND
3.3 V
4
pF
Co
VO = VCC or GND
3.3 V
5.5
pF
2.7 V to 3.6 V
This applies in the disabled state only.
POST OFFICE BOX 655303
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μA
SN74LVC244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS790B − DECEMBER 2004 − REVISED JANUARY 2008
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
A
ten
OE
Y
Y
OE
Y
MAX
MIN
MAX
MIN
MAX
7
14.4
14.9
16.4
10.4
10.9
12.4
2.5 V ± 0.2 V
4.2
7.4
7.9
10
2.7 V
4.2
6.7
6.9
8.2
3.3 V ± 0.3 V
3.9
5.7
5.9
7.2
1.5 V
8.3
17.8
18.3
19.8
1.8 V ± 0.15 V
6.4
12.1
12.6
14.1
2.5 V ± 0.2 V
4.6
9.1
9.6
11.7
5
8.4
8.6
10.3
3.3 V ± 0.3 V
4.5
7.4
7.6
9.4
UNIT
ns
ns
1.5 V
7.2
15.6
16.1
17.6
1.8 V ± 0.15 V
5.8
11.6
12.1
13.6
2.5 V ± 0.2 V
3.7
7.3
7.8
9.9
2.7 V
3.8
6.6
6.8
8.6
3.3 V ± 0.3 V
3.8
6.3
6.5
8
1
1.5
ns
VCC
TYP
UNIT
1.8 V
43
2.5 V
43
3.3 V
44
1.8 V
1
2.5 V
1
3.3 V
2
3.3 V ± 0.3 V
tsk(o)
−40 TO 125°C
5.9
2.7 V
tdis
−40 TO 85°C
TYP
1.8 V ± 0.15 V
1.5 V
tpd
TA = 25°C
MIN
ns
operating characteristics, TA = 25°C
TEST
CONDITIONS
PARAMETER
Outputs
p
enabled
Cpdd
f = 10 MHz
Power dissipation capacitance per buffer/driver
Outputs
p
disabled
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 10 MHz
pF
5
SN74LVC244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS790B − DECEMBER 2004 − REVISED JANUARY 2008
PARAMETER MEASUREMENT INFORMATION
VLOAD
RL
From Output
Under Test
CL
(see Note A)
S1
Open
GND
RL
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
LOAD CIRCUIT
INPUTS
VCC
1.5 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
VI
tr/tf
VCC
VCC
VCC
2.7 V
2.7 V
≤2 ns
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
VΔ
VCC/2
VCC/2
VCC/2
1.5 V
1.5 V
2 × VCC
2 × VCC
2 × VCC
6V
6V
15 pF
30 pF
30 pF
50 pF
50 pF
2 kΩ
1 kΩ
500 Ω
500 Ω
500 Ω
0.1 V
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
VM
VM
VOL
tPHL
VM
VM
0V
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VM
tPZL
tPHL
VOH
Output
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + VΔ
VOL
tPHZ
VM
VOH − VΔ
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
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PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CLVC244AQPWRG4Q1
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVC244AQDWRQ1
ACTIVE
SOIC
DW
20
SN74LVC244AQPWRQ1
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
Call TI
Samples
(Requires Login)
CLVC244AQDWRG4Q1
TBD
(3)
Call TI
CU NIPDAU Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC244A-Q1 :
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
• Catalog: SN74LVC244A
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
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