WCMB4016R4X 256K x 16 Static RAM Features and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE LOW and WE LOW). • Low voltage range: — 1.65V−1.95V • Ultra-low active power — Typical Active Current: 0.5 mA @ f = 1 MHz Functional Description The WCMB4016R4X is a high-performance CMOS static RAM organized as 256K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This device is ideal for portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE HIGH or both BLE Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes. The WCMB4016R4X is available in a 48-ball FBGA package. Logic Block Diagram 256K x 16 RAM Array 2048 X 2048 I/O0–I/O7 I/O8–I/O15 Power -Down Circuit BHE WE CE OE BLE A17 A15 A16 COLUMN DECODER A11 A6 A5 A4 A3 A2 A1 A0 A12 A13 A14 A10 A9 A8 A7 ROW DECODER DATA IN DRIVERS SENSE AMPS • • • • — Typical Active Current: 2 mA @ f = fmax (70 ns speed) Low standby power Easy memory expansion with CE and OE features Automatic power-down when deselected CMOS for optimum speed/power Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A17). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A17). CE BHE BLE Created January 17, 2002 WCMB4016R4X Pin Configuration[1, 2] FBGA Top View 1 2 3 4 5 6 BLE OE A0 A1 A2 NC A I/O8 BHE A3 A4 CE I/O0 B I/O9 I/O10 A5 A6 I/O1 I/O2 C VSS I/O11 A17 A7 I/O3 Vccq D VCC I/O12 DNU A16 I/O4 Vssq E I/O14 I/O13 A14 A15 I/O5 I/O6 F I/O15 NC A12 A13 WE I/O7 G NC A8 A9 A10 A11 NC H Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ..................................... −65°C to +150°C Ambient Temperature with Power Applied.................................................. −55°C to +125°C Supply Voltage to Ground Potential .................−0.2V to +2.4V DC Voltage Applied to Outputs in High Z State[3]........................................ −0.2V to VCC + 0.2V DC Input Voltage[3].................................... −0.2V to VCC + 0.2V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current.................................................... >200 mA Operating Range Device WCMB4016R4X Range Ambient Temperature VCC Industrial −40°C to +85°C 1.65V to 1.95V Product Portfolio Power Dissipation (Industrial) Operating (ICC) VCC Range Product WCMB4016R4X VCC(min.) VCC(typ.)[4] 1.65V 1.80V f = 1 MHz f = fmax Standby (ISB2) VCC(max.) Speed Typ.[4] Max. Typ.[4] Max. Typ.[4] Max. 1.95V 70 ns 0.5 mA 3 mA 2 mA 6 mA 1 µA 10 µA Notes: 1. NC pins are not connected to the die. 2. E3 (DNU) can be left as NC or VSS to ensure proper application. 3. VIL(min) = −2.0V for pulse durations less than 20 ns. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ) Typ, TA = 25°C. Page 2 of 12 WCMB4016R4X Electrical Characteristics Over the Operating Range WCMB4016R4X Parameter Description Test Conditions Min. VOH Output HIGH Voltage IOH = -0.1 mA VCC = 1.65V VOL Output LOW Voltage IOL = 0.1 mA VCC = 1.65V VIH Input HIGH Voltage VIL Input LOW Voltage IIX IOZ Typ.[4] Max. 1.4 Unit V 0.2 V 1.4 VCC + 0.2V V −0.2 0.4 V Input Leakage Current GND < VI < VCC −1 +1 µA Output Leakage Current GND < VO < VCC, Output Disabled −1 +1 µA VCC Operating Supply Current f = fMAX = 1/tRC 2 6 mA ICC 0.5 3 mA CE > VCC − 0.2V, VIN > VCC − 0.2V, VIN < 0.2V f = fMAX (Address and Data Only), f = 0 (OE, WE, BHE, and BLE) 1 10 µA ISB1 Automatic CE Power-Down Current— CMOS Inputs Automatic CE Power-Down Current— CMOS Inputs CE > VCC − 0.2V VIN > VCC − 0.2V or VIN < 0.2V, f = 0, VCC = 1.95V ISB2 f = 1 MHz VCC = 1.95V IOUT = 0 mA CMOS levels Capacitance[5] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions Max. Unit 6 pF 8 pF TA = 25°C, f = 1 MHz, VCC = VCC(typ) Thermal Resistance Description Thermal Resistance (Junction to Ambient)[5] Test Conditions Symbol BGA Unit Still Air, soldered on a 4.25 x 1.125 inch, 4-layer printed circuit board ΘJA 55 °C/W ΘJC 16 °C/W Thermal Resistance (Junction to Case)[5] Note: 5. Tested initially and after any design or process changes that may affect these parameters. Page 3 of 12 WCMB4016R4X AC Test Loads and Waveforms R1 ALL INPUT PULSES VCC VCC Typ OUTPUT 90% 10% 90% 10% GND R2 30 pF Equivalent to: Fall Time: 1 V/ns Rise Time: 1 V/ns INCLUDING JIG AND SCOPE THÉVENIN EQUIVALENT RTH OUTPUT V Parameters 1.8V UNIT R1 13500 Ohms R2 10800 Ohms RTH 6000 Ohms VTH 0.80 Volts Data Retention Characteristics (Over the Operating Range) Parameter Description Conditions VDR VCC for Data Retention ICCDR Data Retention Current tCDR[5] Chip Deselect to Data Retention Time tR[6] Operation Recovery Time Min. Typ.[4] 1.0 VCC = 1.0V CE > VCC − 0.2V, VIN > VCC − 0.2V or VIN < 0.2V 1 Max. Unit 1.95 V 8 µA 0 ns tRC ns Data Retention Waveform[7] DATA RETENTION MODE VCC VCC(min.) tCDR VDR > 1.0 V VCC(min.) tR CE or BHE,BHE Notes: 6. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs. 7. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE. Page 4 of 12 WCMB4016R4X Switching Characteristics Over the Operating Range[8] 70 ns Parameter Description Min. Max. Unit READ CYCLE tRC Read Cycle Time tAA Address to Data Valid 70 tOHA Data Hold from Address Change tACE CE LOW to Data Valid tDOE OE LOW to Data Valid tLZOE OE LOW to Low Z[9] 10 OE HIGH to High Z tLZCE CE LOW to Low Z 70 ns 35 ns ns 25 [9] 10 [9, 10] ns ns 5 [9, 10] tHZOE ns 70 ns ns tHZCE CE HIGH to High Z tPU CE LOW to Power-Up 25 tPD CE HIGH to Power-Down 70 ns tDBE BLE/BHE LOW to Data Valid 70 ns 0 [9] tLZBE BLE/BHE LOW to Low Z tHZBE BLE/BHE HIGH to High Z[9, 10] ns ns 5 ns 25 ns [11] WRITE CYCLE tWC Write Cycle Time 70 ns tSCE CE LOW to Write End 60 ns tAW Address Set-Up to Write End 60 ns tHA Address Hold from Write End 0 ns tSA Address Set-Up to Write Start 0 ns tPWE WE Pulse Width 50 ns tBW BLE/BHE LOW to Write End 60 ns tSD Data Set-Up to Write End 30 ns tHD Data Hold from Write End 0 ns Z[9, 10] tHZWE WE LOW to High tLZWE WE HIGH to Low Z[9] 25 10 ns ns Notes: 8. Test conditions assume signal transition time of 3ns or less, timing reference levels of VCC(typ)/2, input pulse levels of 0 to VCC(typ), and output loading of the specified IOL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 10. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high impedance state. 11. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE and/or BLE =VIL. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write Page 5 of 12 WCMB4016R4X Switching Waveforms [12, 13] Read Cycle No. 1 (Address Transition Controlled) tRC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID [13, 14] Read Cycle No. 2 (OE Controlled) ADDRESS tRC CE tPD tHZCE tACE OE tHZOE tDOE BHE/BLE tLZOE tHZBE tDBE tLZBE DATA OUT HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID tLZCE VCC SUPPLY CURRENT tPU ICC 50% 50% ISB Notes: 12. Device is continuously selected. OE, CE = VIL, BHE and/or BLE = VIL.. 13. WE is HIGH for read cycle. 14. Address valid prior to or coincident with CE, BHE, BLE, transition LOW. Page 6 of 12 WCMB4016R4X Switching Waveforms Write Cycle No. 1(WE Controlled) [11, 15, 16] tWC ADDRESS tSCE CE tAW tHA tSA tPWE WE tBW BHE/BLE OE tSD DATA I/O tHD DATAIN VALID NOTE 17 tHZOE Write Cycle No. 2 (CE Controlled) [11, 15, 16] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tBW BHE/BLE OE tSD DATA I/O tHD DATAIN VALID NOTE 17 tHZOE Notes: 15. Data I/O is high impedance if OE = VIH. 16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 17. During this period, the I/Os are in output state and input signals should not be applied. Page 7 of 12 WCMB4016R4X Switching Waveforms [16] Write Cycle No. 3 (WE Controlled, OE LOW) tWC ADDRESS tSCE CE tBW BHE/BLE tAW tHA tSA tPWE WE tSD DATAI/O NOTE 17 tHD DATAIN VALID tLZWE tHZWE Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) [16] tWC ADDRESS CE tSCE tAW tHA tBW BHE/BLE tSA tPWE WE tSD DATA I/O NOTE 17 tHD DATAIN VALID Page 8 of 12 WCMB4016R4X Typical DC and AC Characteristics (Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25°C.) Standby Current vs. Supply Voltage Operating Current vs. Supply Voltage 3.5 2.4 ISB (µA) ICC (mA) 3.0 (f = fmax) 2.0 1.6 1.2 2.0 1.5 1.0 0.8 (f = 1 MHz) 0.4 0.0 1.65 0.5 0 1.80 SUPPLY VOLTAGE (V) 1.95 1.65 1.80 1.95 SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage 40 35 TAA (ns) 30 25 20 15 10 1.65 1.8 1.95 SUPPLY VOLTAGE (V) Truth Table CE WE OE BHE BLE H X X X X High Z Inputs/Outputs Deselect/Power-Down Mode Standby (ISB) Power X X X H H High Z Deselect/Power-Down Standby (ISB) L H L L L Data Out (I/OO–I/O15) Read Active (ICC) L H L H L Data Out (I/OO–I/O7); I/O8–I/O15 in High Z Read Active (ICC) L H L L H Data Out (I/O8–I/O15); I/O0–I/O7 in High Z Read Active (ICC) L H H L L High Z Output Disabled Active (ICC) L H H H L High Z Output Disabled Active (ICC) L H H L H High Z Output Disabled Active (ICC) L L X L L Data In (I/OO–I/O15) Write Active (ICC) L L X H L Data In (I/OO–I/O7); I/O8–I/O15 in High Z Write Active (ICC) L L X L H Data In (I/O8–I/O15); I/O0 –I/O7 in High Z Write Active (ICC) Page 9 of 12 WCMB4016R4X Ordering Information Speed (ns) 70 Ordering Code WCMB4016R4X-FF70 Package Name Package Type Operating Range FB48A 48-Ball Fine Pitch BGA Industrial Page 10 of 12 WCMB4016R4X Package Diagrams 48-Ball (6.0 mm x 8.0 mm x 1.0 mm) Fine Pitch BGA, FB48A Top View Bottom View Page 11 of 12 WCMB4016R4X Document Title: WCMB4016R4X, 256K x 16 Static RAM REV. Spec # ECN # Issue Date Orig. of Change ** 38-14012 115228 1/17/02 MGN Description of Change New Data Sheet Page 12 of 12