Ver1.0 1 A1 PROs Ai1001S A1 PROs Vertical Clock Driver for Camera System Pin Configuration Description The Ai1001S is a clock driver for the vertical resister drive of CCD. Ai1001S is well suited for the B/W or color CCD camera and camcorder in NTSC or PAL camera system. Feature -. 4 channel vertical clock driver and 1 channel substrate driver. -. Implemented with high voltage(+50V) and high performance CMOS process. Vi2 1 16 VSS(-10V) Vi1 2 15 V¥ õ2 ViS1 3 14 V¥ õ1 Vi3 4 13 VP0(0V) ViS2 5 12 V¥ õ3 Vi4 6 11 V¥ õ4 ViSUB 7 10 VSUB VDD(+5V) 8 9 VP1(+15V) 16 PIN SOP / SSOP ( Top View ) Absolute Maximum Ratings (Ta = 25¡ É) Parameter Symbol Rating Unit Supply voltage Vss VDD, VP0, VP1 Reference voltage Vss£ 0.3 to Vss+35 V V Input voltage VI Vss£ 0.3 to VDD+0.3 V Output voltage V¥ õ2, V ¥ õ4 V¥ õ1 , V ¥ õ3, VSub Vss£ 0 -.3 to VP0+0.3 Vss£ 0.3 to VP1+0.3 V V Operating temperature TOPR -25 to +85 ¡ É Storage temperature TSTG -40 to +125 ¡ É Recommended Operating Conditions Parameter Symbol Rating Unit Supply Voltage VDD VP0 VP1 Vss +15 Vss +10 Vss +25 V V V Operating temperature TOPR -20 to +75 ¡ É 1 Ai1001S V¥õ1 VP0(0V) V¥õ3 V¥õ4 VSUB VP1(+15V) 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 Vi1 ViS1 Vi3 ViS2 Vi4 ViSUB VDD(+5V) V¥õ2 16 Vi2 VSS(-10V) Block Diagram Truth Table Input Vi 1 , 3 Vi S 1 , 2 L L H H L H L H Vi 2 , 4 V¥ Vi SUB õ1,3 Output V¥ õ2,4 VSUB VP1 VP0 *Z VSS L H VP0 VSS L H VP1 VSS * Z is high impedance. Pin Description No. Symbol I/O 1 2 3 Vi2 Vi1 ViS1 I I I Output control (V¥ õ2) Output control (V¥ õ1) Output control (V¥ õ1) 4 5 Vi3 ViS2 Vi4 ViSUB I I Output control (V¥ õ3) Output control (V¥ õ3) I I - Output control (V¥ õ4) Output control (VSUB) Power supply (+5V) 6 7 8 Description 9 10 11 12 13 14 VDD VP1 VSUB V¥ õ4 V¥ õ3 VP0 V¥ õ1 O O O O Power supply (+15V) Output (2 level : VP1, VSS) Output (2 level : VP0, VSS) Output (3 level : VP1, VP0, VSS) Power supply (0V) Output (3 level : VP1, VP0, VSS) 15 16 V¥ õ2 VSS O - Output (2 level : VP0, VSS) Power supply (-10V) 2 Ai1001S DC Characteristics (TA=25¡ É , VDD = 5V, VSS = -10V, VP0 = 0V, VP1 = 15V) Item Symbol Test Condition Input high voltage VIP1 Input low voltage VISS Output high voltage V¥ õP1 I¥ õP1 = - 20 § Ë Output middle voltage V¥ õP0 I¥ õP0 = - 20 § Ë Output middle voltage V¥ õP0 I¥ õP0 = 20 § Ë Output low voltage V¥ õSS I¥ õSS = 20 § Ë Min Typ Max Unit 3.5 V 1.5 14.9 15 V 0 -0.1 V 0.1 V 0 V -9.9 -10 V § Ë Input current IIN 1.0 Power supply current IPD 0.3 0.5 § Ì Power supply current IPI 0.15 0.3 § Ì Power supply current IP0 4.5 5.0 § Ì Switching Characteristics (See the Test Circuit TA = 25¡ É, VP1=15V, VP0=0V, VDD=5V, VSS= -10V) Item Symbol Conditions Output Current IL V¥ õ1 to V¥ 4 õ = -9.5V Output Current IM1 V¥ õ1 to V¥ 4 õ = -0.5V Output Current IM2 V¥ õ1, V¥ 3 õ = 0.5V Output Current IH V¥ õ1, V¥ 3 õ = 14.5V Output Current ISL VSUB = -9.5V Output Current I VSUB = 14.5V Rise time VSS ¡ æVP0 TTLM V¥ õ1 to V¥ Fall time VP0 ¡ æVSS TTML V¥ 1,3 õ = -9.5V Rise time VP0 ¡ æVP1 TTMH V¥ 1,3 õ Fall time VP1 ¡ æVP0 TTHM V¥ 1,3 õ Rise time VP0 ¡ æVP1 Fall time VP1 ¡ æVSS TTLHH TTHHL Coupling amplitude (middle level) Coupling amplitude (low level) Max. Min. Unit § Ì -25 10 § Ì -9 12 § Ì § Ì -12 12 § Ì 1000 ns after input transient 1000 ns = 14V after input transient 1000 ns = 1V after input transient 1000 ns VSUB = 14V VSUB = -9.5V 200 200 ns ns VCOM V¥ õ1 to V¥ 4 õ 0.5 V VCOL V¥ õ1 to V¥ 4 õ 0.5 V 3 4 õ = -0.5V after input transient § Ì Ai1001S Test Circuit Ai1001S 1 16 Vi2 R1-R4 : 27 Ohm R5 : 5 Ohm C1-C4 : 1500 pF C5-C8 : 3300 pF C9 : 500 pF VSS(-9V) VP1 VP0 15V 0V a 3 b (L,L) (L,H) 15 V¥ õ2 R5 14 -10V VSS VP1 VP0 4 a Vi3 5 b R1 (H,H) ViS1 (L,L) Decoder TIMING GENERATOR Vi1 Decoder 2 (L,H) V¥ õ1 C2 R2 C5 13 C7 C1 C3 VP0(0V) C6 (H,H) 12 ViS2 VSS 6 11 Vi4 7 V¥ õ3 R3 V¥ õ4 R4 C4 10 VSUB ViSUB C9 8 9 VDD(+5V) VP1(+15V) *(L, H) means the on-status of the switch when a = "L", b = "H". 4 C8 Ai1001S Test Circuit I/O Waveform Diagram Input waveform Vi1 EIA :2.51§ Á CCIR:2.53§ Á Vi3 ViS1 ViS2 Output waveform TTMH +15 TTLM TTHM V¥ õ1 0 -10 TTMH TTML +15 TTHM V¥ õ3 0 -10 +5 ViSUB 0 TTLHH +20 VSUB -10 5 TTHHL Ai1001S Input waveform (Repeat Cycle 15.7kHz) +5 Vi1 0 +5 Vi2 0 +5 Vi3 0 +5 Vi4 0 600ns Output waveform TTML TTLM 0 V¥ õ1 -10 TCOM 0 V¥ õ2 -10 VCOL 0 V¥ õ3 -10 0 V¥ õ4 -10 6 1M 3 V¥õ2 -9V 4 7 VSS(-9V) V¥õ2 V¥õ1 4 Vi3 Vi2 Vi1 1 2 3 5 ViS2 ViS1 6 7 8 Vi4 ViSUB VDD(5V) 3.3k VR 10k or EVR for color digital camera system. 16 15 14 VP0(0V) 13 V¥õ1 V¥õ3 2 V¥õ3 V¥õ4 VSUB VP1(15V) Ai1001S 12 11 1 V¥õ4 9 10 KDS226 0.1/50 +15V 11 VSUB SENSOR +5V 7 8 9 10 11 12 13 Vi2 Vi1 ViS1 Vi3 ViS2 Vi4 ViSUB Timing Generator Ai1001S Application Circuit Ai1001S Package Dimension ( Ai1001S : 16 PIN SSOP ) UNIT = inch (mm) O - 0 8 O 0.311(7.90) 0.301(7.65) 0.212(5.38) 0.205(5.20) 0.037(0.95) 0.022(0.55) 0.009(0.22) 0.005(0.13) 0.015(0.38) 0.010(0.25) 0.249(6.33) 0.239(6.07) BASE PLANE 0.008(0.21) 0.002(0.05) 0.078(1.99) 0.068(1.73) 0.0256 (0.65) SEATING PLANE 8