Ver1.0
1
A1 PROs
A1 PROs
Ai329
1/3 inch CCD Image Sensor for CCIR B/W Camera
Description
Pin Configuration
The Ai329 is a 290K pixels CCD area sensor
for CCIR 1/3inch video cameras. Buried
photodiode and micro lens are adopted for low
noise, low smear and high sensitivity. This chip
also features a strong anti-blooming and
electronic shutter with variable charge-storage
time.
Feature
Vφ4 1
16
Hφ2
Vφ3 2
15
Hφ1
Vφ2 3
14 NC
Vφ1 4
13 VRG
GND 5
12 VP
VGG 6
11 VSUB
VSS 7
10 GND
VOUT 8
-. Micro Lens for high sensitivity
-. Image-lag is negligible and excellent blooming
suppression is performed.
-. TTL level(5V) operation on HCCD & RG electrodes.
-. 16 pin plastic-DIP.
-. Variable electronic shutter of 1/50 to 1/100,000 sec.
-. High sensitivity and low smear.
Structure
9
VDD
16 Pin Plastic - DIP
( Top View )
Optical black position( Top View )
-. Architecture : IT - CCD
-. Optical size : 1/3 inch format
-. Chip size : 6.0(H) x 5.2(V) ㎟
-. Number of effective pixels :
500 (H) x 582 (V) about 290K pixels
-. Number of total pixels :
537 (H) x 597 (V) about 320K pixels
-. Pixel size : 9.8 (H) x 6.3 (V) ㎛2
-. Optical black area
Horizontal direction : Front 7 pixels Rear 30 pixels
Vertical direction : Front 14 pixels Rear 1 pixels
-. Number of dummy bits
Horizontal : 16
Vertical : 1 ( Even field only )
1
Pin1
Unit : Pixels
1
V
14
7
H
Pin9
30
Ai329
Block Diagram
VOUT
8
VSS
VGG
GND
Vφ1
Vφ2
Vφ3
Vφ4
7
6
5
4
3
2
1
VCCD
PD
HCCD
9
VDD
10
11
GND VSUB
12
13
14
15
16
VP
VRG
NC
Hφ1
Hφ2
Pin Description
No. Symbol
Description
No. Symbol
Description
1
Vφ4
Vertical register transfer clock 4
9
VDD
Output amplifier drain bias
2
Vφ3
Vertical register transfer clock 3
10
GND
Ground
3
Vφ2
Vertical register transfer clock 2
11
VSUB
Substrate(Overflow drain)bias
4
Vφ1
Vertical register transfer clock 1
12
VP
Protection bias
5
GND
Ground
13
VRG
Reset gate clock
6
VGG
Output amplifier gate bias
14
NC
No connection
7
VSS
Output amplifier source bias
15
Hφ1
Horizontal register transfer clock 1
8
VOUT
CCD Output signal
16
Hφ2
Horizontal register transfer clock 2
Absolute Maximum Ratings
Parameter
Symbol
Substrate voltage
Value
Unit
VSUB - GND
-0.3 to +55
V
VDD, VOUT, VSS - GND
VDD, VOUT, VSS - VSUB
Vφ1, 2, 3, 4 - GND
Vφ1, 2, 3, 4 - VP
Vφ1, 2, 3, 4 - VSUB
-0.3 to +18
-55 to +10
-10 to +20
-0.3 to +27
-55 to +10
V
V
V
V
V
Hφ1 , Hφ2 - GND
-10 to +15
V
Vφx - Vφy
-10 to +15
V
Hφ1 , Hφ2 - Vφ4
-17 to +17
V
RG, VGG - GND
RG, VGG - VSUB
-10 to +15
-55 to +10
V
V
Vp - VSUB
-65 to 0.3
V
Storage temperature
TSTG
-30 to 80
℃
Operation temperature
TOPR
-10 to 60
℃
Supply voltage
Vertical clock input voltage
Horizontal clock input voltage
Between vertical clock input pins
Between horizontal clock
and vertical clock input pins
Output pin voltage
Φ
Φ
Protective circuit voltage
2
Ai329
Bias Condition
Parameter
Symbol Min.
Output amplifier drain voltage
Vdd
14.5
Output amplifier gate voltage
Vgg
1.5
Output amplifier source voltage
Vss
Substrate voltage adjustment range
Vsub
Fluctuation range after substrate voltage adjustment
Reset gate clock voltage adjustment range
Max.
15.0
15.5
Unit Remark
V
2.0
2.5
V
Ground through
680Ω Resistor, ±5%
5
15
V
△Vsub
-1
1
V
Vrgl
0
4
V
Fluctuation range after reset gate voltage adjustment △Vrgl
Protection bias
Typ.
-3
3
%
Set to low level
of vertical transfer clock
Vp
DC Characteristics
Parameter
Output amplifier drain current
Symbol
Min.
Typ.
Max.
Unit
IDD
-
3
-
㎃
Driving Condition
Parameter
Symbol
Min.
Typ.
Max.
Unit
VH1, VH3
14.5
15.0
15.5
V
VM1, 2, 3, 4
-0.2
0.0
0.2
V
VL1, 2, 3, 4
-9.0
-8.5
-8.0
V
HH1, 2
4.5
5.0
5.5
V
HL1, 2
-0.5
0.0
0.5
V
RGHL
4.7
5.0
5.3
V
VSUB
23
24
25
V
Vertical clock high voltage
Φ
Vertical clock middle voltage
Φ
Vertical clock low voltage
Φ
Horizontal clock high voltage
Φ
Horizontal clock low voltage
Φ
RG clock voltage difference
Φ
Substrate clock voltage
Φ
3
Ai329
Electro-optical Performance
Unit
Measurement
Method
㎷/Lux
1
㎷
2
0.015
%
3
BL
1
%
4
Video signal shading
OSNU
15
%
5
Dark signal level
VDARK
2
㎷
6
Temp=60℃
Dark signal shading
DSNU
2
㎷
7
Temp=60℃
Item
Symbol
Min.
Typ.
SENS
55
70
Saturation signal
VSAT
800
Smear
SMR
Blooming
Sensitivity
4
Max.
Remark
Temp=60℃
Ai329
Measurement Method
1. Sensitivity
① Set to SILC ( Standard Illumination Conditions* )
② Measure the average value of signal output ( Vout )
③ Calculate the efficiency of Vout to light intensity
2. Vsat
① Adjust light intensity to 200 times of SILC
② Measure the average value of signal output
3. Smear
① Adjust light intensity to 200 times of SILC & readout clock
② Measure the signal output at horizontal optical black ( Vhopb )
③ Measure the signal output at vertical blanking dummy ( Vvbd )
④ Smear = { ( Vvbd - Vhopb ) / Vsat } × 100 ( % )
4. Blooming
① Adjust light intensity to 200 times of SILC & readout clock
② Measure the signal output at horizontal optical black ( Vhopb )
③ Measure the signal output at blooming dummy area ( Vbd )
④ Blooming = { ( Vbd - Vhopb ) / Vsat } × 100 ( % )
5. OSNU
① Set to SILC
② Measure the average value of signal output ( Vout )
③ Measure the maximum value and the minimum value of signal output
④ OSNU = ( Vmax - Vmin ) / Vout 100 (%)
6. Vdark
① Measure the average value of signal output at dark condition
7. DSNU
① Measure the voltage difference between minimum and maximum of dark signal
* Standard Illumination Conditions
① Measure the average value of output of linear region
② At this time, measure the light intensity of illumination at CCD face plate
③ Define SILC with above
④ Light source: Tungsten lamp(3100K)
⑤ Use a standard test lens at F8
5
Ai329
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the
following protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive
shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground
30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool
sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric
desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and Dirt protection
a) Perform all assembly operations in a clean room (class 1000 or less).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces.
Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity
ionized air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
4) Others
a) Do not expose to strong light (sun rays) for long periods.
b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6
Ai329
Application Circuit
+15V
C2223
100
100
VDD
VOUT 8
9
VGG 6
CCD
output
3.9K
11 VSUB
GND 5
VSS 7
12 VP
14 NC
VΦ3 2
VΦ2 3
180K
680
1M
10/6.3V
0.1
27K
KDS226
0.1
VR
10K
3.3K
V-DRIVER
12
15
14
10
VΦ4
VΦ3
VΦ2
VΦ1
VSUB
Ai1001S
11
7
10 GND
-9V
15 HΦ1
VΦ4 1
4
16 HΦ2
Ai329 VΦ1
13 RG
33
33
RG
HΦ1
HΦ2
33
+
Ai329
Package Dimension (16 Pin Plastic-DIP)
B
UNIT = mm
6.1
R0
DE .5
PT
H=
0.4
2. The rotation angle of the effective
image area relative to H and V is
±1.5。
V
H
0.32±0.10
R
0.3
5.7
2.5
1.The center of the effective image
area relative to “ B ” and “ B’ ”is
(H, V) = (6.1, 5.7)±0.15mm.
: GLASS LID
B
3。
11.40±0.1
9.70±0.10
1.57
3.08±0.3
8.9±0.10
1.40±0.3
12.20±0.1
5。
5。
3.55±0.25
1.27±0.10
0.64
10.73±0.05
0.30±0.10
0.25
0.46±0.10
1.27±0.05
1.27X7=8.89±0.10
11.43±0.3
11.80±0.05
8
R0.3