® DAC7613 DAC 761 3 For most current data sheet and other product information, visit www.burr-brown.com 12-Bit, Voltage Output DIGITAL-TO-ANALOG CONVERTER FEATURES DESCRIPTION ● LOW POWER: 1.8mW The DAC7613 is a 12-bit, voltage output digital-toanalog converter with guaranteed 12-bit monotonic performance over the specified temperature range. The DAC7613 accepts a 12-bit parallel input data, has double-buffered DAC input logic and provides a readback mode of the internal input register. An asynchronous reset clears all registers to a mid-scale code of 800H or to a zero-scale of 000H. The DAC7613 can operate from a single +5V supply or from +5V and –5V supplies. ● UNIPOLAR OR BIPOLAR OPERATION ● SETTLING TIME: 10µs to 0.012% ● 12-BIT LINEARITY AND MONOTONICITY: –40°C to +85°C ● DATA READBACK ● DOUBLE-BUFFERED DATA INPUTS ● 24-LEAD SSOP PACKAGE Low power and small size makes the DAC7613 ideal for data acquisition systems and closed-loop servocontrol. The DAC7613 is available in a plastic SSOP-24 package, and offers guaranteed specifications over the –40°C to +85°C temperature range. APPLICATIONS ● PROCESS CONTROL ● CLOSED-LOOP SERVO-CONTROL ● MOTOR CONTROL ● DATA ACQUISITION SYSTEMS VREFL VREFH Data I/O VDD VSS 12 CS Input Register I/O Buffer DAC Register VOUT DAC TS R/W DAC7613 RESET RESETSEL LOADDAC GND International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1998 Burr-Brown Corporation SBAS105 PDS-1500B 1 Printed in U.S.A. January, 2000 DAC7613 SPECIFICATION At TA = –40°C to +85°C, VDD = +5V, VSS = –5V, VREFH = +2.5V, and VREFL = –2.5V, unless otherwise noted. DAC7613E PARAMETER CONDITIONS ACCURACY Linearity Error(1) Differential Linearity Error Monotonicity Zero-Scale Error Zero-Scale Drift Full-Scale Error Zero-Scale Error Zero-Scale Drift Full-Scale Error Power Supply Rejection ANALOG OUTPUT Voltage Output(3) Output Current Load Capacitance Short-Circuit Current Short-Circuit Duration REFERENCE INPUT VREFH Input Range VREFL Input Range VREFL Input Range DYNAMIC PERFORMANCE Settling Time(4) Output Noise Voltage DIGITAL INPUT/OUTPUT Logic Family Logic Levels VIH VIL VOH VOL Data Format POWER SUPPLY REQUIREMENTS VDD VSS IDD ISS Power Dissipation TEMPERATURE RANGE Specified Performance VSS = 0V or –5V VSS = 0V or –5V TMIN to TMAX Code = 000H MIN TYP DAC7613EB MAX MIN ±2 ±1 Code = FFFH Code = 00AH, VSS = 0V VSS = 0V Code = FFFH, VSS = 0V 5 ±4 5 ±4 ±8 10 ±8 ✻ ✻ 0 VREFL –1.25 VREFH VREFH +1.25 No Oscillation VREFL + 1.25 0 –2.5 +2.5 VREFH – 1.25 VREFH – 1.25 5 40 If VSS ≠ 0V 0.7 VDD –0.3 3.6 0.0 VSS = –5V VSS = 0V –40 0.35 –0.45 4 1.8 ✻ ✻ ✻ ✻ ✻ 10 LSB(2) LSB Bits LSB ppm/°C LS LSB ppm/°C LSB ppm/V ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ V V mA pF mA ✻ ✻ ✻ V V V ✻ µs nV/√Hz ✻ ✻ ✻ ✻ V V V V ✻ ✻ ✻ ✻ ✻ V V mA mA mW mW ✻ °C ✻ VDD + 0.3 0.3 VDD VDD 0.4 Straight Binary 4.75 –5.25 –0.65 ±1 ±1 ✻ ✻ ✻ CMOS IIH ≤ ±10µA IIL ≤ ±10µA IOH = –0.8mA I OL = 1.6mA ✻ ✻ ✻ 100 +5, –15 Indefinite To ±0.012% 0Hz to 1MHz UNITS ✻ 30 VSS = 0V or –5V VSS = 0V VSS = –5V MAX ✻ 12 2 VREFL = 0V, VSS = 0V VSS = –5V TYP 5.25 –4.75 0.5 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ 5.75 2.5 +85 ✻ ✻ ✻ ✻ ✻ NOTES: (1) If VSS = 0V, specification applies at code 00AH and above. (2) LSB means Least Significant Bit, when V REFH equals +2.5V and VREFL equals –2.5V, then one LSB equals 1.22mV. (3) Ideal output voltage, does not take into account zero or full-scale error. (4) If VSS = –5V, full-scale 5V step. If VSS = 0V, full-scale positive 2.5V step and negative step from code FFFH to 00AH. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® DAC7613 2 ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) VDD to VSS ............................................................................. –0.3V to 11V VDD to GND .......................................................................... –0.3V to 5.5V VREFL to VSS .............................................................. –0.3V to (VDD – VSS) VDD to VREFH ............................................................. –0.3V to (VDD – VSS) VREFH to VREFL .......................................................... –0.3V to (VDD – VSS) Digital Input Voltage to GND ................................... –0.3V to VDD + 0.3V Digital Output Voltage to GND ................................. –0.3V to VDD + 0.3V Maximum Junction Temperature ................................................... +150°C Operating Temperature Range ........................................ –40°C to +85°C Storage Temperature Range ......................................... –65°C to +150°C Lead Temperature (soldering, 10s) ............................................... +300°C This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. PACKAGE/ORDERING INFORMATION PRODUCT MAXIMUM LINEARITY ERROR (LSB) MAXIMUM DIFFERENTIAL LINEARITY ERROR (LSB) DAC7613E PACKAGE PACKAGE DRAWING NUMBER SPECIFICATION TEMPERATURE RANGE ±2 ±1 SSOP-24 338 –40°C to +85°C " " " " " " DAC7613EB ±1 ±1 SSOP-24 338 –40°C to +85°C " " " " " " ORDERING NUMBER(1) TRANSPORT MEDIA DAC7613E DAC7613E/1K Rails Tape and Reel DAC7613EB DAC7613EB/1K Rails Tape and Reel NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “DAC7613E/1K” will get a single 1000-piece Tape and Reel. ® 3 DAC7613 PIN CONFIGURATION PIN DESCRIPTIONS Top View PIN SSOP DB11 (MSB) 24 1 R/W LABEL DESCRIPTION 1 DB11 Data Bit 11, MSB 2 DB10 Data Bit 10 3 DB9 Data Bit 9 4 DB8 Data Bit 8 DB10 2 23 CS DB9 3 22 RESETSEL 5 DB7 Data Bit 7 DB8 4 21 RESET 6 DB6 Data Bit 6 7 DB5 Data Bit 5 8 DB4 Data Bit 4 DB7 20 5 19 VOUT 9 DB3 Data Bit 3 7 18 VDD 10 DB2 Data Bit 2 8 17 GND 11 DB1 Data Bit 1 12 DB0 Data Bit 0, LSB 13 VREFL Reference Input Voltage Low. Sets minimum output voltage for the DAC. DB6 6 DB5 DB4 DAC7613E DB3 LOADDAC 9 16 VSS DB2 10 15 VREFH DB1 11 14 NIC DB0 (LSB) 12 13 VREFL ® DAC7613 4 14 NIC 15 VREFH Not Internally Connected 16 VSS 17 GND Ground 18 VDD Positive Power Supply 19 VOUT 20 LOADDAC The selected DAC register becomes transparent when LOADDAC is LOW. It is in the latched state when LOADDAC is HIGH. 21 RESET Asynchronous Reset Input. Sets the DAC register to either zero-scale (000H) or mid-scale (800H) when LOW. RESETSEL determines which code is active. 22 RESETSEL When LOW, a LOW on RESET will cause the DAC register to be set to code 000H. When RESETSEL is HIGH, a LOW on RESET will set the registers to code 800H. Reference Input Voltage High. Sets maximum output voltage for the DAC. Negative Analog Supply Voltage, 0V or –5V nominal. DAC Voltage Output 23 CS Chip Select. Active LOW. 24 R/W Enabled by CS. Controls data read and write from the input register. TYPICAL PERFORMANCE CURVES: VSS = 0V At TA = +25°C, VDD = +5V, VREFH = +2.5V, and VREFL = 0V, representative unit, unless otherwise specified. LINEARITY ERROR vs CODE (–40°C and +85°C) 0.50 0.50 0.25 0.25 LE (LSB) LE (LSB) LINEARITY ERROR and DIFFERENTIAL LINEARITY ERROR vs CODE 0.00 –0.25 0.00 –0.25 0.50 0.50 0.25 0.25 LE (LSB) –0.50 0.00 –0.25 DLE (LSB) –0.50 000H 200H 400H 600H 800H –0.25 –40°C –0.50 000H 200H A00H C00H E00H FFFH 400H 600H 800H A00H C00H E00H FFFH Digital Input Code Digital Input Code DIFFERENTIAL LINEARITY ERROR vs CODE (–40°C and +85°C) ZERO-SCALE ERROR vs TEMPERATURE (Code 010H) 0.50 6 0.25 5 0.00 –0.25 +85°C –0.50 0.50 0.25 0.00 4 3 2 1 0 –1 –0.25 –40°C –0.50 000H 200H –2 400H 600H 800H –40 A00H C00H E00H FFFH –20 0 20 40 60 80 100 Temperature (°C) Digital Input Code FULL-SCALE ERROR vs TEMPERATURE (Code FFFH) 6 5 Full-Scale Error (LSB) DLE (LSB) 0.00 Zero-Scale Error (LSB) DLE (LSB) +85°C –0.50 4 3 2 1 0 –1 –2 –40 –20 0 20 40 60 80 100 Temperature (°C) ® 5 DAC7613 TYPICAL PERFORMANCE CURVES: VSS = – 5V At TA = +25°C, VDD = +5V, VREFH = +2.5V, and VREFL = 0V, representative unit, unless otherwise specified. 0.25 0.25 LE (LSB) 0.50 0.00 –0.25 0.50 0.25 0.25 LE (LSB) –0.50 0.50 0.00 –0.25 200H 400H 600H 800H 0.00 –0.25 –0.50 000H A00H C00H E00H FFFH 400H 600H 800H A00H C00H E00H FFFH Digital Input Code DIFFERENTIAL LINEARITY ERROR vs CODE ZERO-SCALE ERROR vs TEMPERATURE (Code 000H) 0.50 3.0 0.25 2.5 0.00 –0.25 0.50 0.25 0.00 2.0 1.5 1.0 0.5 0.0 –0.5 –0.25 –1.0 200H 400H 600H 800H –40 A00H C00H E00H FFFH –20 0 FULL-SCALE ERROR vs TEMPERATURE (Code FFFH) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –40 –20 0 20 40 Temperature (°C) ® DAC7613 20 40 Temperature (°C) Digital Input Code Full-Scale Error (LSB) –0.50 000H 200H Digital Input Code –0.50 DLE (LSB) 0.00 –0.25 –0.50 –0.50 000H DLE (LSB) LINEARITY ERROR vs CODE 0.50 Zero-Scale Error (LSB) DLE (LSB) LE (LSB) LINEARITY ERROR and DIFFERENTIAL LINEARITY ERROR vs CODE 6 60 80 100 60 80 100 THEORY OF OPERATION register offers a readback capability. The converter can be powered from a single +5V supply or a dual ±5V supply. The device offers a reset function which immediately sets the DAC output voltage and DAC register to mid-scale (code 800H) or to zero-scale (code 000H), depending on the status of the reset selection. See Figures 1 and 2 for the basic operation of the DAC7613. The DAC7613 is a 12-bit, voltage output Digital-to-Analog Converter (DAC). The architecture is a classic R-2R ladder configuration followed by an operational amplifier that serves as a buffer. The minimum voltage output (“zero-scale”) and maximum voltage output (“full-scale”) are set by the external voltage references (VREFL and VREFH, respectively). The digital input is a 12-bit parallel word and the DAC input DAC7613E Data Bus 1 DB11 R/W 24 Read/Write 2 DB10 CS 23 Chip Select 3 DB9 RESETSEL 22 Reset Select 4 DB8 RESET 21 Reset DAC 5 DB7 LOADDAC 20 Load DAC Register 6 DB6 VOUT 19 0V to +2.5V 7 DB5 VDD 18 8 DB4 GND 17 9 DB3 VSS 16 10 DB2 VREFH 15 11 DB1 NIC 14 12 DB0 VREFL 13 0.1µF 1µF +5V + +2.5V 0.1µF FIGURE 1. Basic Single-Supply Operation of the DAC7613. DAC7613E Data Bus 1 DB11 R/W 24 Read/Write 2 DB10 CS 23 Chip Select 3 DB9 RESETSEL 22 Reset Select 4 DB8 RESET 21 Reset DAC 5 DB7 LOADDAC 20 Load DAC Register 6 DB6 VOUT 19 –2.5V to +2.5V 7 DB5 VDD 18 8 DB4 GND 17 9 DB3 VSS 16 10 DB2 VREFH 15 11 DB1 NIC 14 0.1µF 1µF 0.1µF 1µF + + +5V –5V +2.5V 0.1µF 12 DB0 VREFL 13 –2.5V 0.1µF FIGURE 2. Basic Dual-Supply Operation of the DAC7613. ® 7 DAC7613 ANALOG OUTPUTS The current into the VREFH input depends on the DAC output voltages and can vary from a few microamps to approximately 0.1 milliamp. The VREFH source will not be required to sink current, only source it. Bypassing the reference voltage or voltages with at least a 0.1µF capacitor placed as close to the DAC7613 package is strongly recommended. When VSS = –5V (dual supply operation), the output amplifier can swing to within 2.25V of the supply rails, guaranteed over the –40°C to +85°C temperature range. With VSS = 0V (single-supply operation), the output can swing to ground. Note that the settling time of the output op amp will be longer with voltages very near ground. Additionally, care must be taken when measuring the zero-scale error when VSS = 0V. Since the output voltage cannot swing below ground, the output voltage may not change for the first few digital input codes (000H, 001H, 002H, etc.) if the output amplifier has a negative offset. DIGITAL INTERFACE Table I shows the basic control logic for the DAC7613. Note that the internal register is level triggered and not edge triggered. When the appropriate signal is LOW, the register becomes transparent. When this signal is returned HIGH, the digital word currently in the register is latched. The first register (the input register) is triggered via the R/W, and CS inputs. The second register (the DAC register) is transparent when LOADDAC input is pulled LOW. The behavior of the output amplifier can be critical in some applications. Under short-circuit conditions (DAC output shorted to ground), the output amplifier can sink a great deal more current than it can source. See the Specifications table for more details concerning short-circuit current. The double-buffered architecture is mainly designed so that the DAC input register can be written at any time and then the DAC voltage updated by pulling LOADDAC LOW. REFERENCE INPUTS The reference inputs, VREFL and VREFH, can be any voltage between VSS + 2.25V and VDD – 2.25V provided that VREFH is at least 1.25V greater than VREFL. The minimum output of each DAC is equal to VREFL plus a small offset voltage (essentially, the offset of the output op amp). The maximum output is equal to VREFH plus a similar offset voltage. Note that VSS (the negative power supply) must either be connected to ground or must be in the range of –4.75V to –5.25V. The voltage on VSS sets several bias points within the converter. If VSS is not in one of these two configurations, the bias values may be in error and proper operation of the device is not guaranteed. DAC REGISTER L Write Write Write H Write Hold Write Input Read Hold Read Input Hold Update Update H Hold Hold Hold X Hold Reset Reset CS RST LOADDAC L L H L L H H L H H X H H L X H H X H L MODE X = Don’t Care. TABLE I. DAC7613 Control Logic Truth Table. ® DAC7613 INPUT REGISTER R/W 8 DIGITAL TIMING SYMBOL Figure 3 and Table II provide detailed timing for the digital interface of the DAC7613. DIGITAL INPUT CODING The DAC7613 input data is in Straight Binary format. The output voltage is given by the following equation: V OUT = V REFL + ( V REFH – V REFL ) • N (1) 4096 where N is the digital input code. This equation does not include the effects of offset (zero-scale) or gain (full-scale) errors. DESCRIPTION MIN tRCS CS LOW for Read 200 ns tRDS R/W HIGH to CS LOW 10 ns 0 tRDH R/W HIGH after CS HIGH tDZ CS HIGH to Data Bus in High Impedance TYP MAX UNITS ns 100 ns tCSD CS LOW to Data Bus Valid tWCS CS LOW for Write 50 ns tWS R/W LOW to CS LOW 0 ns 100 160 ns tWH R/W LOW after CS HIGH 5 ns tDS Data Valid to CS LOW 0 ns tDH Data Valid after CS HIGH 5 ns tLWD LOADDAC LOW 50 ns RESET LOW 50 ns tRESET TABLE II. Timing Specifications (TA = –40°C to +85°C). tWCS CS tWS tWH R/W tRCS tLWD CS tRDH tRDS LOADDAC tDZ Data Out tDH tDS R/W Data In Data Valid tCSD tRESET RESET Data Output Timing Digital Input Timing FIGURE 3. Digital Input and Output Timing. ® 9 DAC7613 PACKAGE OPTION ADDENDUM www.ti.com 8-Jan-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty DAC7613E ACTIVE SSOP DB 24 DAC7613E/1K ACTIVE SSOP DB DAC7613E/1KG4 ACTIVE SSOP DAC7613EB ACTIVE DAC7613EB/1K 60 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 24 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DB 24 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SSOP DB 24 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR ACTIVE SSOP DB 24 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DAC7613EB/1KG4 ACTIVE SSOP DB 24 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DAC7613EBG4 ACTIVE SSOP DB 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DAC7613EG4 ACTIVE SSOP DB 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 60 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DAC7613E/1K SSOP DB 24 1000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 DAC7613EB/1K SSOP DB 24 1000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC7613E/1K SSOP DB 24 1000 375.0 340.0 57.0 DAC7613EB/1K SSOP DB 24 1000 375.0 340.0 57.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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