MP108 • MP108A MP108 • MP108A t I n n o v a tt ii oo nn FFrroomm PP rr oo dd uu cc tMP108A MP108, Power Operational Amplifier FEATURES • LOW COST • HIGH VOLTAGE - 200 VOLTS • HIGH OUTPUT CURRENT - 10 AMPS • 100 WATT DISSIPATION CAPABILITY • 300kHz POWER BANDWIDTH APPLICATIONS • INKJET PRINTER HEAD DRIVE • PIEZO TRANSDUCER DRIVE • INDUSTRIAL INSTRUMENTATION • REFLECTOMETERS • ULTRA-SOUND TRANSDUCER DRIVE 34-pin DIP PACKAGE STYLE FD TYPICAL APPLICATION RF +VS DESCRIPTION The MP108 operational amplifier is a surface mount constructed component that provides a cost effective solution in many industrial applications. The MP108 offers outstanding performance that rivals much more expensive hybrid components yet has a footprint of only 4 sq in. The MP108 has many optional features such as four-wire current limit sensing and external compensation. The 300 kHz power bandwidth and 10 amp output of the MP108 makes it a good choice for piezo transducer drive applications. The MP108 is built on a thermally conductive but electrically insulating substrate that can be mounted to a heat sink. +VS RI +VB GND PRINT NOZZLE COMMAND VOLTAGE -ILIM CC2 GND -VS PIEZO TRANSDUCER -VB CC EQUIVALENT CIRCUIT DIAGRAM +Vb 8 +Vb 4 -VS C1 GND 3 BACK PLATE 2 TP 1 R1 Cc2 R2 R3 15 +Vs The MP108's fast slew rate and wide power bandwith make it an ideal nozzle driver for industrial inkjet printers. The 10 amp output capability can drive hundreds of nozzles simultaneously. 16 +Vs Q2 D1 Q6 Q7 Q4 R5 Q8 5 6 D2 R7 Q11 Q14 -IN 34 Q15A R10 Q16 IC1 Q19 R17 Q23 C3 R19 Q20 Q24 1 TP 2 3 BACK GND PLT OUT 4 5 6 7 8 9 10 +VB CC1 CC2 NC +VB NC NC NC 21 OUT -IN +IN GND NC -VB VIEW FROM COMPONENT SIDE NC NC +ILIM -ILIM NC -VB 22 OUT 34 33 32 31 30 29 Q22 28 27 26 25 24 23 11 22 OUT OUT 12 21 13 20 14 15 16 +VS +VS +VS -VS -VS -VS 19 18 17 OUT OUT OUT C7 RLIM C8 Q21 R20 17 -Vs -Vb 30 18 -Vs -Vb 25 19 -Vs http://www.cirrus.com C6 CC 20 OUT Q18 +IN 33 GND 32 C5 27 -Ilim R12 C1 + C2 12 OUT 28 +Ilim R8 Q15B R11 EXTERNAL CONNECTIONS 13 OUT Q12 Q13 R9 Q3 11 OUT Q9 R15 MP108U INKJET NOZZLE DRIVE 14 +Vs Q17 Q1B Q1A C5 SUBSTRATE BACKPLATE Cc1 RLIM OUT CC1 +ILIM + NOTES: CC IS NPO (COG) RATED FOR FULL SUPPLY VOLTAGE +VS TO -VS BOTH PINS 3 AND 32 REQUIRED CONNECTED TO SIGNAL GROUND C2 AND C3 ELECTROLYTIC 10µF PER AMP OUTPUT CURRENT C1,C4,C5-8 HIGH QUALITY CERAMIC 0.1µF ALL OUTPUT PINS MUST BE TIED TOGETHER Copyright © Cirrus Logic, Inc. 2009 (All Rights Reserved) C3 C4 LOAD & FEEDBACK CC 100pF 33pF 10pF CC 470pF 220pF 33pF PHASE COMPENSATION GAIN W/O BOOST TYP. SLEW RATE 1 55 V/µS 4 135 V/µS 10 170 V/µS TYP. SLEW RATE GAIN W BOOST 12 V/µS 1 35 V/µS 3 135 V/µS 10 MAY 20091 APEX − MP108UREVD MP108 • MP108A P r o d u c t I n n o v a t i o nF r o m ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +VS to -VS SUPPLY VOLTAGE, +VB SUPPLY VOLTAGE, -VB OUTPUT CURRENT, peak POWER DISSIPATION, internal, DC INPUT VOLTAGE TEMPERATURE, pin solder, 10s TEMPERATURE, junction2 TEMPERATURE RANGE, storage OPERATING TEMPERATURE, case 200V +VS + 15V6 -VS – 15V6 12A, within SOA 100W +VB to -VB 225°C. 150°C. -40 to 105°C. -40 to 85°C. SPECIFICATIONS PARAMETER INPUT OFFSET VOLTAGE OFFSET VOLTAGE vs. temperature OFFSET VOLTAGE vs. supply BIAS CURRENT, initial3 BIAS CURRENT vs. supply OFFSET CURRENT, initial INPUT RESISTANCE, DC INPUT CAPACITANCE COMMON MODE VOLTAGE RANGE COMMON MODE VOLTAGE RANGE COMMON MODE REJECTION, DC NOISE TEST CONDITIONS1 1011 4 1MHz bandwidth, 1kΩ RS 92 96 45 10 10 IO = 10A IO = -10A IO = 10A, +VB = +VS +10V IO = -10A, -VB = -VS -10V +VS - 10 +VS - 8.6 -VS + 10 -VS + 7 +VS - 1.6 -VS + 5.1 10 CC = 10pF 150 170 2V Step 1 No load, DC 5 CC = 10pF, +VS = 100V, -VS = -100V 300 POWER SUPPLY VOLTAGE CURRENT, quiescent THERMAL RESISTANCE, AC, junction to case5 RESISTANCE, DC, junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case MP108 TYP 1 20 Full temperature range GAIN OPEN LOOP @ 15Hz RL = 10KΩ, CC = 10pF GAIN BANDWIDTH PRODUCT @ 1MHz CC = 10pF PHASE MARGIN Full temperature range OUTPUT VOLTAGE SWING VOLTAGE SWING VOLTAGE SWING VOLTAGE SWING CURRENT, continuous, DC SLEW RATE, AV = -20 SETTLING TIME, to 0.1% RESISTANCE POWER BANDWIDTH 180VP-P MIN ±15 Full temperature range, f ≤ 60Hz Full temperature range, f < 60Hz Full temperature range -40 ±75 50 MP108A MAX MIN TYP MAX UNITS 5 * 3 50 * * 20 * 100 70 0.1 * 50 30 * * +VB - 15 * -VB + 15 * * * mV µV/°C µV/V pA pA/V pA Ω pF V V dB µV RMS * * * dB MHz degrees * * * * * * 11 * * * * * V V V V A V/µS µS Ω kHz ±100 * 65 * * * * V mA 1 1.25 13 85 * * * * * °C/W °C/W °C/W °C NOTES: 1. Unless otherwise noted: TC=25°C, compensation CC=100pF, DC input specifications are value given, power supply voltage is typical rating. 2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTBF. 3. Doubles for every 10°C of case temperature increase. 4. +VS and -VS denote the positive and negative supply voltages to the output stage. +VB and -VB denote the positive and negative supply voltages to the input stages. 5. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. 6. Power supply voltages +VB and -VB must not be less than +VS and -VS respectively. 2 MP108U MP108 • MP108A POWER DERATING 2 PHASE, Ф (°) PO 0.01 P = 10W O NORMALIZED CURRENT LIMIT, (%) 0.001 30 MP108U P 0W = 10 O 100 1K 10K 30K FREQUENCY, F (Hz) OUTPUT VOLTAGE, VO (VP-P) 115 20 OUTPUT VOLTAGE SWING 8 7 6 5 4 3 2 1 0 0 W/O BOOST FROM +V S M -V S T FRO OOS W/O B TC = 25°C 50mS PULSE OM R TF -V S OS O HB T WI ROM +V S OOST F WITH B 2 4 6 8 10 OUTPUT CURRENT, IO (A) 5M QUIESCENT CURRENT vs. TEMPERATURE NORMALIZED QUIESCENT CURRENT, IO (%) 0W 20 = NORMALIZED QUIESCENT CURRENT, IO (%) AV = 20 CC = 10pF VS = 52V RL = 4Ω 9 40 0 40 80 120 160 200 TOTAL SUPPLY VOLTAGE, VS (V) 100K 1M FREQUENCY, F (Hz) 110 105 100 95 90 -40 -20 0 20 40 60 80 100 CASE TEMPERATURE, (°C) 10 1 SAFE OPERATING AREA C 5° C =2 5° T C =2 S, , T C 5°C m =2 5°C 10 0mS C , T =8 10 DC , T C DC DISTORTION, THD (%) HARMONIC DISTORTION TC = -40°C 60 pF -25 0 25 50 75 100 CASE TEMPERATURE, TC (°C) TC = 25°C 100 80 80 F 90 TC = 85°C C C= 100 100 F 110 QUIESCENT CURRENT vs. SUPPLY 120 20 10K 100 1K 10K 100K 1M 10M FREQUENCY, F (Hz) 10p 120 RL = 4Ω IO = 1A DC 20 pF CURRENT LIMIT 40 0 10 10 100 1K 10K 100K 1M 10M FREQUENCY, F (Hz) 130 60 100 220 0 1 CC = 100pF pF 20 CC = 33pF 80 C C= RL = 4Ω IO = 1A CC = 10pF 10M POWER RESPONSE 200 120 1 1M FREQUENCY, F (Hz) 470 40 180 300K 5M SMALL SIGNAL RESPONSE W/O BOOST 100 150 C C= CC = 470pF 60 1M FREQUENCY, F (Hz) 2 1 CC = 10pF 2 CC = 33pF 3 CC = 100pF RL = 4Ω IO = 1A 33p CC = 220pF 80 1 120 C C= CC = 33pF 100 0.1 1 CC = 10pF 2 CC = 33pF 3 CC = 100pF RL = 4Ω IO = 1A 1 C C= OPEN LOOP GAIN, A (dB) 120 OPEN LOOP GAIN, A (dB) SMALL SIGNAL RESPONSE W/ BOOST 1 2 150 210 100K 0 -40 -20 0 20 40 60 80 100 CASE TEMPERATURE, TC (°C) 70 -50 1 180 20 2 3 120 40 90 3 PHASE, Ф (°) 80 60 PHASE RESPONSE W/O BOOST PHASE RESPONSE W/ BOOST 90 OUTPUT CURRENT FROM +VS OR -VS (A) 100 VOLTAGE DROP FROM SUPPLY, (V) INTERNAL POWER DISSIPATION, P(W) P r o d u c t I n n o v a t i o nF r o m 0.2 1 10 100 200 SUPPLY TO OUTPUT DIFFERENTIAL, VS-VO (V) 3 MP108 • MP108A P r o d u c t I n n o v a t i o nF r o m GENERAL Please read Application Note 1 "General Operating Considerations" which covers stability, power supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit, heat sink selection, Apex Precision Power's complete Application Notes library, Technical Seminar Workbook and Evaluation Kits. GROUND PINS The MP108 has two ground pins (pins 3, 32). These pins provide a return for the internal capacitive bypassing of the small signal portions of the MP108. The two ground pins are not connected together on the substrate. Both of these pins are required to be connected to the system signal ground. SAFE OPERATING AREA parasitic oscillation in the output stage of the MP108. Use electrolytic capacitors at least 10µF per output amp required. Bypass the electrolytic capacitors with high quality ceramic capacitors (X7R) 0.1µF or greater. In most applications power supply terminals +VB and -VB will be connected to +VS and -VS respectively. Supply voltages +VB and -VB are bypassed internally but both ground pins 3 and 32 must be connected to the system signal ground to be effective. In all cases power to the buffer amplifier stage of the MP108 at pins 8 and 25 must be connected to +VB and -VB at pins 4 and 30 respectively. Provide local bypass capacitors at pins 8 and 25. See the external connections diagram on page 1. +Vs Z1 RF +Vs -IN 34 3 GND +Vb RIN 34 The MOSFET output stage of the MP108 is not limited by second breakdown considerations as in bipolar output stages. Only thermal considerations and current handling capabilities limit the SOA (see Safe Operating Area graph on previous page). The output stage is protected against transient flyback by the parasitic body diodes of the output stage MOSFET structure. However, for protection against sustained high energy flyback external fast-recovery diodes must be used. FIGURE 1 OVERVOLTAGE PROTECTION COMPENSATION CURRENT LIMIT The external compensation capacitor CC is connected between pins 5 and 6. Unity gain stability can be achieved with any capacitor value larger than 100pF for a minimum phase margin of 45 degrees. At higher gains more phase shift can usually be tolerated in most designs and the compensation capacitor value can be reduced resulting in higher bandwidth and slew rate. Use the typical operating curves as a guide to select CC for the application. An NPO (COG) type capacitor is required rated for the full supply voltage (200V). The two current limit sense lines are to be connected directly across the current limit sense resistor. For the current limit to work correctly pin 28 must be connected to the amplifier output side and pin 27 connected to the load side of the current limit resistor RLIM as shown in Figure 2. This connection will bypass any parasitic resistances RP, formed by socket and solder joints as well as internal amplifier losses. The current limiting resistor may not be placed anywhere in the output circuit except where shown in Figure 2. The value of the current limit resistor can be calculated as follows: RLIM = .65/ILIMIT OVERVOLTAGE PROTECTION Although the MP108 can withstand differential input voltages up to ±25V, additional external protection is recommended. In most applications 1N4148 signal diodes connected anti-parallel across the input pins is sufficient. In more demanding applications where bias current is important diode connected JFETs such as 2N4416 will be required. See Q1 and Q2 in Figure 1. In either case the differential input voltage will be clamped to ±0.7V. This is usually sufficient overdrive to produce the maximum power bandwidth. Some applications will also need over voltage protection devices connected to the power supply rails. Unidirectional zener diode transient suppressors are recommended. The zeners clamp transients to voltages within the power supply rating and also clamp power supply reversals to ground. Whether the zeners are used or not the system power supply should be evaluated for transient performance including power-on overshoot and power-off polarity reversals as well as line regulation. See Z1 and Z2 in Figure 1. POWER SUPPLY BYPASSING Bypass capacitors to power supply terminals +VS and -VS must be connected physically close to the pins to prevent local 4 Q2 OUT IN Q1 33 GND +IN -Vb 32 -Vs -Vs 33 27 ILIM28 ILIM+ RP OUT 11-13 20-22 RLIM RL Z2 FIGURE 2 4 WIRE CURRENT LIMIT BOOST OPERATION With the boost feature the small signal stages of the amplifier are operated at a higher supply voltages than the amplifierís high current output stage. +VB (pins 4,8) and -VB (pins 25,30) are connected to the small signal stages and +VS (pins 14-16) and -VS (pins 17-19) are connected to the high current output stage. An additional 10V on the +VB and -VB pins is sufficient to allow the small signal stages to drive the output stage into the triode region and improve the output voltage swing for extra efficient operation when required. When the boost feature is not needed +VS and -VS are connected to the +VB and -VB pins respectively. The +VB and -VB pins must not be operated at supply voltages less than +VS and -VS respectively. BACKPLATE GROUNDING The substrate of the MP108 is an insulated metal substrate. It is required that it be connected to signal ground. Connect pin 2 (back plate) to signal ground. The back plate will then be AC grounded to signal ground through a 1µF capacitor. MP108U P r o d u c t I n n o v a t i o nF r o m MP108 • MP108A Contacting Cirrus Logic Support For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact [email protected]. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. 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