PB50 PB50 P r o d u PB50 c t IInnnnoovvaa t i o n FFr roomm Power Booster Amplifier FEATURES • WIDE SUPPLY RANGE — ±30V to ±100V • HIGH OUTPUT CURRENT — Up to 2A Continuous • VOLTAGE AND CURRENT GAIN • HIGH SLEW RATE — 50V/µs Minimum • PROGRAMMABLE OUTPUT CURRENT LIMIT • HIGH POWER BANDWIDTH — 160 kHz Minimum • LOW QUIESCENT CURRENT — 12mA Typical 8-pin TO-3 PACKAGE STYLE CE EQUIVALENT SCHEMATIC APPLICATIONS 3 +Vs • HIGH VOLTAGE INSTRUMENTATION • Electrostatic TRANSDUCERS & DEFLECTION • Programmable Power Supplies Up to 180V p-p Q1 DESCRIPTION The PB50 is a high voltage, high current amplifier designed to provide voltage and current gain for a small signal, general purpose op amp. Including the power booster within the feedback loop of the driver amplifier results in a composite amplifier with the accuracy of the driver and the extended output voltage range and current capability of the booster. The PB50 can also be used without a driver in some applications, requiring only an external current limit resistor to function properly. The output stage utilizes complementary MOSFETs, providing symmetrical output impedance and eliminating secondary breakdown limitations imposed by Bipolar Junction Transistors. Internal feedback and gainset resistors are provided for a pin-strappable gain of 3. Additional gain can be achieved with a single external resistor. Compensation is not required for most driver/gain configurations, but can be accomplished with a single external capacitor. Although the booster can be configured quite simply, enormous flexibility is provided through the choice of driver amplifier, current limit, supply voltage, voltage gain, and compensation. This hybrid circuit utilizes a beryllia (BeO) substrate, thick film resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3 package is electrically isolated and hermetically sealed using one-shot resistance welding.The use of compressible isolation washers voids the warranty. TYPICAL APPLICATION Q2 Q3 IN 4 Q4 GAIN 6.2K 7 Q6 50K 3.1K OUT 1 2 CL Q7 COM 5 COMP 8 Q8 Q9 Q10 –Vs 6 EXTERNAL CONNECTIONS +Vs RCL CL 3 2 1 IN 4 CF Q5 OUT TOP VIEW VIN RI +15V OP AMP –15V RF +Vs COM RCL IN COM PB50 –Vs –Vs 6 OUT CC 5 8 7 GAIN COMP CC RG RL RG Figure 1. Inverting composite amplifier. PB50U http://www.cirrus.com Copyright © Cirrus Logic, Inc. 2009 (All Rights Reserved) MAY 20091 APEX − PB50UREVJ PB50 P r o d u c t I n n o v a t i o nF r o m ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +VS to –VS OUTPUT CURRENT, within SOA POWER DISSIPATION, internal at TC = 25°C1 INPUT VOLTAGE, referred to common TEMPERATURE, pin solder—10 sec max TEMPERATURE, junction1 TEMPERATURE, storage OPERATING TEMPERATURE RANGE, case 200V 2A 35W ±15V 300°C 150°C –65 to +150°C –55 to +125°C SPECIFICATIONS PARAMETER TEST CONDITIONS2 INPUT OFFSET VOLTAGE, initial OFFSET VOLTAGE, vs. temperature INPUT IMPEDANCE, DC INPUT CAPACITANCE CLOSED LOOP GAIN RANGE GAIN ACCURACY, internal Rg, Rf GAIN ACCURACY, external Rf PHASE SHIFT OUTPUT VOLTAGE SWING VOLTAGE SWING VOLTAGE SWING CURRENT, continuous SLEW RATE CAPACITIVE LOAD SETTLING TIME to .1% POWER BANDWIDTH SMALL SIGNAL BANDWIDTH SMALL SIGNAL BANDWIDTH POWER SUPPLY VOLTAGE, ±VS3 CURRENT, quiescent THERMAL RESISTANCE, AC junction to case4 RESISTANCE, DC junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case MIN Full temperature range 25 3 AV = 3 AV = 10 F = 10kHz, AVCL = 10, CC = 22pF F = 200kHz, AVCL = 10, CC = 22pF Io = 2A Io = 1A Io = .1A Full temperature range Full temperature range RL = 100Ω, 2V step VC = 100Vpp CC = 22pF, AV = 25, Vcc = ±100 CC = 22pF, AV = 3, Vcc = ±30 Full temperature range VS = ±30 VS = ±60 VS = ±100 Full temp. range, F > 60Hz Full temp. range, F < 60Hz Full temperature range Meets full range specifications VS–11 VS–10 VS–8 2 50 160 ±305 –25 TYP MAX UNITS ±.75 –4.5 50 3 10 ±10 ±15 10 60 ±1.75 –7 25 ±15 ±25 V mV/°C kΩ pF V/V % % ° ° VS –9 VS –7 VS –5 100 2200 2 320 100 1 V V V A V/µs pF µs kHz kHz MHz ±60 9 12 17 ±100 12 18 25 V mA mA mA 1.8 3.2 30 25 2.0 3.5 85 °C/W °C/W °C/W °C NOTES: 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF (Mean Time to Failure). 2. The power supply voltage specified under typical (TYP) applies, TC = 25°C unless otherwise noted. 3. +VS and –VS denote the positive and negative supply rail respectively. 4. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. 5. +VS must be at least 15V above COM, –VS must be at least 30V below COM. CAUTION 2 The PB50 is constructed from MOSFET transistors. ESD handling procedures must be observed. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. PB50U PB50 R = CL .33 CURRENT LIMIT, ILIM (A) Ω –90 40 –135 20 0 100 1K 10K 100K 1M FREQUENCY, F (Hz) –180 10M AVCL = 10 10 AVCL = 3 0 CC = 22pF –10 1K INPUT OFFSET VOLTAGE, VOS (V) QUIESCENT CURRENT, IO (mA) Vs = ±30V 10 0 –25 360 POWER RESPONSE DISTORTION, THD (%) VQ (V), P-P 45 22 PB50U 3K 10K 30K 100K 300K FREQUENCY, F (Hz) 10M 1M 4 VO + 2 .1 .2 1 .01 .02 OUTPUT CURRENT, IO (A) TEMP. -1 SUPPLY RL = 25Ω .1 RL = 1KΩ .01 300 1K 3K 10K FREQUENCY, F (Hz) 30K AVCL = 10 –135 CC = 22pF –180 1K 10K 100K 1M FREQUENCY, F (Hz) 10M SLEW RATE VS. TEMP. 300 +SLEW 200 100 0 –25 .1 .3 AVCL = 3 AVCL = 25 HARMONIC DISTORTION NO DRIVER VS = ±60V VO = 80VP-P 2 –90 400 0 .03 VO – –45 INPUT OFFSET VOLTAGE 1 90 6 SMALL SIGNAL RESPONSE -1.5 –25 0 25 50 75 100 125 CASE TEMPERATURE, TC ( C) OR VS (V) 75 100 125 50 0 25 CASE TEMPERATURE, TC (°C) 180 11 1K 100K 1M 10K FREQUENCY, F (Hz) –.5 5 8 0 .5 Vs = ±60V OUTPUT VOLTAGE SWING 10 SMALL SIGNAL RESPONSE 20 QUIESCENT CURRENT Vs = ±100V 0 50 75 100 125 25 CASE TEMPERATURE, TC (°C) AVCL = 25 20 15 RCL = 1.5Ω 30 0 –45 60 .5 Ω 0 –25 0 25 50 75 100 125 CASE TEMPERATURE, TC (°C) SMALL SIGNAL RESPONSE R = CL .68 DISTORTION, THD (%) 0 –25 1 CLOSED LOOP PHASE, Ф (°) 10 RCL = .27Ω SLEW RATE, SR (V/µs) 20 1.5 VOLTAGE DROP FROM SUPPLY, VS - VO (V) CURRENT LIMIT 2 30 80 OPEN LOOP GAIN, A (dB) POWER DERATING 40 OPEN LOOP PHASE, Ф (°) CLOSED LOOP GAIN, A (dB) INTERNAL POWER DISSIPATION, P(W) P r o d u c t I n n o v a t i o nF r o m .03 –SLEW 0 25 50 75 100 125 CASE TEMPERATURE, TC (°C) HARMONIC DISTORTION DRIVER = TL070 VS = ±60V RL = 25Ω VO = 95VP-P .01 .003 RL = 1KΩ .001 300 1K 10K 3K FREQUENCY, F (Hz) 30K 3 PB50 P r o d u c t I n n o v a t i o nF r o m GENERAL STABILITY Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.Cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; Apex Precision Power’s complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits. Stability can be maximized by observing the following guidelines: 1. Operate the booster in the lowest practical gain. 2. Operate the driver amplifier in the highest practical effective gain. 3. Keep gain-bandwidth product of the driver lower than the closed loop bandwidth of the booster. 4. Minimize phase shift within the loop. A good compromise for (1) and (2) is to set booster gain from 3 to 10 with total (composite) gain at least a factor of 3 times booster gain. Guideline (3) implies compensating the driver as required in low composite gain configurations. Phase shift within the loop (4) is minimized through use of booster and loop compensation capacitors Cc and Cf when required. Typical values are 5pF to 33pF. Stability is the most difficult to achieve in a configuration where driver effective gain is unity (ie; total gain = booster gain). For this situation, Table 1 gives compensation values for optimum square wave response with the op amp drivers listed. CURRENT LIMIT OUTPUT CURRENT FROM +VS OR –VS (A) For proper operation, the current limit resistor (RCL) must be connected as shown in the external connection diagram. The minimum value is 0.27Ω with a maximum practical value of 47Ω. For optimum reliability the resistor value should be set as high as possible. The value is calculated as follows: +IL= .65/RCL + .010, –IL = .65/RCL. SOA 3 2 ST 1 DY EA DY ST AT ST AT EA DY t= EA ST ST t= ST E E T AT C E T C T C = =2 t= 10 20 50 ms 0m 0m s s 5° 85 C °C = 12 5° C .1 10 20 30 40 50 100 200 300 SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE VS — VO (V) CF CC DRIVER CCH OP07 22p 22p 741 18p 10p LF155 4.7p 10p LF156 4.7p 10p TL070 22p 15p 10p For: RF = 33K, RI = 3.3K, RG = 22K COMPOSITE AMPLIFIER CONSIDERATIONS Cascading two amplifiers within a feedback loop has many advantages, but also requires careful consideration of several amplifier and system parameters. The most important of these are gain, stability, slew rate, and output swing of the driver. Operating the booster amplifier in higher gains results in a higher slew rate and lower output swing requirement for the driver, but makes stability more difficult to achieve. GAIN SET RG = [ (Av-1) • 3.1K] – 6.2K RG + 6.2K Av = +1 3.1K The booster’s closed-loop gain is given by the equation above.The composite amplifier’s closed loop gain is determined by the feedback network, that is: –Rf/Ri (inverting) or 1+Rf/Ri (non-inverting). The driver amplifier’s “effective gain” is equal to the composite gain divided by the booster gain. Example: Inverting configuration (figure 1) with R i = 2K, R f = 60K, R g = 0 : Av (booster) = (6.2K/3.1K) + 1 = 3 Av (composite) = 60K/2K = - 30 Av (driver) = - 30/3 = -10 4 SR 1.5 7 >60 >60 >60 Table 1: Typical values for case where op amp effective gain = 1. CF SAFE OPERATING AREA (SOA) NOTE:The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. FPBW 4kHz 20kHz 60kHz 80kHz 80kHz +15V CCH RI VIN OP AMP RF +Vs RCL IN COM PB50 OUT COMP CC –15V –Vs RL GAIN R G Figure 2. Non-inverting composite amplifier. SLEW RATE The slew rate of the composite amplifier is equal to the slew rate of the driver times the booster gain, with a maximum value equal to the booster slew rate. OUTPUT SWING The maximum output voltage swing required from the driver op amp is equal to the maximum output swing from the booster divided by the booster gain. The Vos of the booster must also be supplied by the driver, and should be subtracted from the available swing range of the driver. Note also that effects of Vos drift and booster gain accuracy should be considered when calculating maximum available driver swing. PB50U P r o d u c t I n n o v a t i o nF r o m PB50 Contacting Cirrus Logic Support For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact [email protected]. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, Apex Precision Power, Apex and the Apex Precision Power logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. PB50U 5