EP53A8LQI/EP53A8HQI 1000mA Synchronous Buck Regulator with Integrated Inductor RoHS Compliant; Halogen Free Description Features The EP53A8LQI and EP53A8HQI are a 1000mA PowerSOC. The device integrates MOSFET switches, control, compensation, and the Inductor in an advanced 3mm x 3mm QFN Package. • Integrated Inductor Technology • 3mm x 3mm x 1.1mm QFN package • Total Solution Footprint ~ 21mm2 • Low VOUT ripple for RF compatibility Integrated inductor ensures the complete power solution is fully characterized with the inductor carefully matched to the silicon and compensation network. . It enables a tiny solution footprint, low output ripple, low part-count, and high reliability, while maintaining high efficiency. The complete solution can be implemented in as little as 21mm2. • High efficiency, up to 94% • 1000mA continuous output current • Less than 1µA standby current • 5 MHz switching frequency • 3 pin VID for glitch free voltage scaling • VOUT Range 0.6V to VIN – 0.5V The EP53A8xQI uses a 3-pin VID to easily select the output voltage setting. Output voltage settings are available in 2 optimized ranges providing coverage for typical VOUT settings. • Short circuit and over current protection • UVLO and thermal protection • IC level reliability in a PowerSOC solution The VID pins can be changed on the fly for fast dynamic voltage scaling. EP53A8LQI further has the option to use an external voltage divider. 3.5mm 4.7uF Application • Portable wireless and RF applications • Wireless broad band data cards • Solid state storage applications • Noise and space sensitive applications 100 Ohm 100 ohm VIN 6mm EP53A8xQI PVIN VOUT AVIN VSENSE ENABLE 4.7µF 0603 VFB VS0 VOUT 10µF 0805 VS1 VS2 PGND AGND 10uF Figure 1: Total Solution Footprint. Figure 2: Typical Application Circuit. www.enpirion.com 03651 12/16/2009 Rev:B EP53A8LQI/EP53A8HQI Ordering Information Part Number Comment Package EP53A8LQI LOW VID Range 16-pin QFN T&R EP53A8HQI HIGH VID Range 16-pin QFN T&R EP53A8LQI-E EP53A8LQI Evaluation Board EP53A8HQI-E EP53A8HQI Evaluation Board Pin Assignments (Top View) Figure 3: EP53A8LQI Pin Out Diagram (Top View) PIN NAME 1, 15, 16 NC(SW) 2,3 PGND 4 VFB 5 VSENSE 6 AGND 7, 8 VOUT 9, 10, 11 VS2, VS1, VS0 12 13 14 ENABLE AVIN PVIN FUNCTION NO CONNECT – These pins are internally connected to the common switching node of the internal MOSFETs. NC (SW) pins are not to be electrically connected to any external signal, ground, or voltage. However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage to the device. Power ground. Connect this pin to the ground electrode of the Input and output filter capacitors. EP53A8LQI: Feed back pin for external divider option. EP53A8HQI: No Connect Sense pin for preset output voltages. Refer to application section for proper configuration. Analog ground. This is the quiet ground for the internal control circuitry, and the ground return for external feedback voltage divider Regulated Output Voltage. Refer to application section for proper layout and decoupling. Output voltage select. VS2 = pin 9, VS1 = pin 10, VS0 = pin 11. EP53A8LQI: Selects one of seven preset output voltages or an external resistor divider. EP53A8HQI: Selects one of eight preset output voltages. (Refer to section on output voltage select for more details.) Output Enable. Enable = logic high; Disable = logic low Input power supply for the controller circuitry. Connect to PVIN through a 100 Ohm resistor. Input Voltage for the MOSFET switches. ©Enpirion 2009 all rights reserved, E&OE 03651 Figure 4: EP53A8HQI Pin Out Diagram (Top View)Pin Description 2 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Absolute Maximum Ratings CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended operating conditions is not implied. Stress beyond the absolute maximum ratings may cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. PARAMETER SYMBOL MIN MAX UNITS VIN -0.3 6.0 V Voltages on: ENABLE, VSENSE, VSO – VS2 -0.3 VIN+ 0.3 V Voltages on: VFB (EP53A8LQI) -0.3 2.7 V 150 °C 150 °C Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020C 260 °C ESD Rating (based on Human Body Mode) 2000 V Input Supply Voltage Maximum Operating Junction Temperature TJ-ABS Storage Temperature Range TSTG -65 Recommended Operating Conditions PARAMETER SYMBOL MIN MAX UNITS Input Voltage Range VIN 2.4 5.5 V Operating Ambient Temperature TA - 40 +85 °C Operating Junction Temperature TJ - 40 +125 °C Thermal Characteristics PARAMETER Thermal Resistance: Junction to Ambient –0 LFM (Note 1) Thermal Overload Trip Point Thermal Overload Trip Point Hysteresis SYMBOL TYP UNITS θJA 85 °C/W TJ-TP +155 °C 25 °C Note 1: Based on a four layer copper board and proper thermal design per JEDEC EIJ/JESD51 standards ©Enpirion 2009 all rights reserved, E&OE 03651 3 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Electrical Characteristics NOTE: TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = 25°C, VIN = 3.6V. CIN = -4.7µF 0603 MLCC, COUT = 10µF 0805 MLCC PARAMETER SYMBOL Operating Input Voltage VIN Under Voltage Lock-out – VIN Rising VUVLO_R 2.0 V Under Voltage Lock-out – VIN Falling VUVLO_F 1.9 V Drop Out Resistance RDO Input to Output Resistance Output Voltage Range VOUT EP53A8LQI (VDO = ILOAD X RDO) EP53A8HQI Dynamic Voltage Slew Rate VSLEW EP53A8HQI EP53A8LQI ∆VOUT TA = 25°C, VIN = 3.6V; ILOAD = 100mA ; 0.8V ≤ VOUT ≤ 3.3V -2 Feedback Pin Voltage Initial Accuracy VFB TA = 25°C, VIN = 3.6V; ILOAD = 100mA ; 0.8V ≤ VOUT ≤ 3.3V .588 Line Regulation ∆VOUT_LINE 2.4V ≤ VIN ≤ 5.5V 0.03 %/V Load Regulation ∆VOUT_LOAD 0A ≤ ILOAD ≤ 1000mA 0.6 %/A Temperature Variation ∆VOUT_TEMPL -40°C ≤ TA ≤ +85°C 30 ppm/°C Output Current IOUT Shut-down Current ISD Enable = Low OCP Threshold ILIM 2.4V ≤ VIN ≤ 5.5V 0.6V ≤ VOUT ≤ 3.3V VS0-VS2, Pin Logic Low VVSLO 0.0 0.3 V VS0-VS2, Pin Logic High VVSHI 1.4 VIN V VS0-VS2, Pin Input Current IVSX Enable Pin Logic Low VENLO Enable Pin Logic High VENHI Enable Pin Current IENABLE Note 1 <100 nA Feedback Pin Input Current IFB Note 1 <100 nA Operating Frequency FOSC 5 MHz 8 4 V/mS VID Preset VOUT Initial Accuracy TEST CONDITIONS MIN TYP 2.4 350 0.6 1.8 MAX UNITS 5.5 V 500 VIN-VDO 3.3 8 4 Note 1 V V/mS 0.6 +2 % 0.612 V 1000 1.25 mΩ mA 0.75 µA 1.4 A <100 nA 0.3 1.4 V V Soft Start Operation Soft Start Slew Rate ∆VSS EP53A8HQI (VID only) EP53A8LQI (VID only) Soft Start Rise Time ∆TSS EP53A8LQI (VFB mode); Note 2 170 225 280 µS Note 1: Parameter guaranteed by design and characterization. Note 2: Measured from when VIN ≥ VUVLO_R & ENABLE pin crosses its logic High threshold. ©Enpirion 2009 all rights reserved, E&OE 03651 4 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI 95 95 85 85 75 75 Efficiency (%) Efficiency (%) Typical Performance Characteristics 65 55 65 55 45 45 35 35 25 25 0 100 200 300 400 500 600 700 800 900 1000 0 Load Current (A) 100 200 300 400 500 600 700 800 900 1000 Load Current (A) Efficiency vs. Load Current: VIN = 5.0V, VOUT (from top to bottom) = 3.7, 3.3, 2.5, 1.8, 1.2V Efficiency vs. Load Current: VIN = 3.3V, VOUT (from top to bottom) = 2.5, 1.8V,1.2V Start Up Waveform: VIN = 5.0V, VOUT = 3.3V; ILOAD = 1000mA Shut-down Waveform: VIN = 5.0V, VOUT = 3.3V; ILOAD = 1000mA ©Enpirion 2009 all rights reserved, E&OE 5 03651 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI 5mV/Div Output Ripple: VIN = 5.0V, VOUT = 1.2V, Load = 1A 5mV/Div Output Ripple: VIN = 5.0V, VOUT = 3.3V, Load = 1A 5mV/Div 5mV/Div Output Ripple: VIN = 3.3V, VOUT = 1.8V, Load = 1A Output Ripple: VIN = 3.3V, VOUT = 1.2V, Load = 1A Load Transient: VIN = 5.0V, VOUT = 3.3V Load stepped from 0mA to 1000mA Load Transient: VIN = 5.0V, VOUT = 1.2V Load stepped from 0mA to 1000mA ©Enpirion 2009 all rights reserved, E&OE 6 03651 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Load Transient: VIN = 3.7V, VOUT = 1.2V Load stepped from 0mA to 1000mA Load Transient: VIN = 3.3V, VOUT = 1.8V Load stepped from 0mA to 1000mA ©Enpirion 2009 all rights reserved, E&OE 03651 7 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Functional Block Diagram PVIN UVLO Thermal Limit Current Limit ENABLE NC(SW) Soft Start P-Drive (-) Logic VOUT PWM Comp (+) N-Drive PGND VSENSE Sawtooth Generator Compensation Network (-) Switch VFB Error Amp (+) DAC Voltage Select VREF Package Boundry AVIN VS0 VS1 VS2 AGND Figure 5: Functional Block Diagram ©Enpirion 2009 all rights reserved, E&OE 03651 8 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Detailed Description Functional Overview The EP53A8xQI requires only 2 small MLCC capacitors and an 0201MLC resistor for a complete DC-DC converter solution. The device integrates MOSFET switches, PWM controller, Gate-drive, compensation, and inductor into a tiny 3mm x 3mm x 1.1mm QFN package. Advanced package design, along with the high level of integration, provides very low output ripple and noise. The EP53A8xQI uses voltage mode control for high noise immunity and load matching to advanced ≤90nm loads. A 3-pin VID allows the user to choose from one of 8 output voltage settings. The EP53A8xQI comes with two VID output voltage ranges. The EP53A8HQI provides VOUT settings from 1.8V to 3.3V, the EP53A8LQI provides VID settings from 0.8V to 1.5V, and also has an external resistor divider option to program output setting over the 0.6V to VIN-0.5V range. The EP53A8xQI provides the industry’s highest power density of any 1A DCDC converter solution. The key enabler of this revolutionary integration is Enpirion’s proprietary power MOSFET technology. The advanced MOSFET switches are implemented in deep-submicron CMOS to supply very low switching loss at high switching frequencies and to allow a high level of integration. The semiconductor process allows seamless integration of all switching, control, and compensation circuitry. The proprietary magnetics design provides high-density/high-value magnetics in a very small footprint. Enpirion magnetics are carefully matched to the control and compensation circuitry yielding an optimal solution with assured performance over the entire operating range. Protection features include under-voltage lockout (UVLO), over-current protection (OCP), short circuit protection, and thermal overload protection. Integrated Inductor: Low-Noise Low-EMI The EP53A8xQI utilizes a proprietary low loss integrated inductor. The integration of the ©Enpirion 2009 all rights reserved, E&OE 03651 inductor greatly simplifies the power supply design process. The inherent shielding and compact construction of the integrated inductor reduces the conducted and radiated noise that can couple into the traces of the printed circuit board. Further, the package layout is optimized to reduce the electrical path length for the high di/dT input AC ripple currents that are a major source of radiated emissions from DC-DC converters. The integrated inductor provides the optimal solution to the complexity, output ripple, and noise that plague low power DCDC converter design. Voltage Mode Control, High Bandwidth The EP53A8xQI utilizes an integrated type III compensation network. Voltage mode control is inherently impedance matched to the sub 90nm process technology that is used in today’s advanced ICs. Voltage mode control also provides a high degree of noise immunity at light load currents so that low ripple and high accuracy are maintained over the entire load range. The very high switching frequency allows for a very wide control loop bandwidth and hence excellent transient performance. Soft Start Internal soft start circuits limit in-rush current when the device starts up from a power down condition or when the “ENABLE” pin is asserted “high”. Digital control circuitry limits the VOUT ramp rate to levels that are safe for the Power MOSFETS and the integrated inductor. The EP53A8HQI has a soft-start slew rate that is twice that of the EP53A8LQI. When the EP53A8LQI is configured in external resistor divider mode, the device has a fixed VOUT ramp time. Therefore, the ramp rate will vary with the output voltage setting. Output voltage ramp time is given in the Electrical Characteristics Table. Excess bulk capacitance on the output of the device can cause an over-current condition at startup. Assuming no-load at startup, the 9 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI maximum total capacitance on the output, including the output filter capacitor and bulk and decoupling capacitance, at the load, is given as: EP53A8LQI: COUT_TOTAL_MAX = COUT_Filter + COUT_BULK = 250uF Under Voltage Lockout During initial power up, an under voltage lockout circuit will hold-off the switching circuitry until the input voltage reaches a sufficient level to insure proper operation. If EP53A8HQI: the lockout circuitry will again disable the switching. Hysteresis is included to prevent chattering between states. COUT_TOTAL_MAX = COUT_Filter + COUT_BULK = 125uF Enable EP53A8LQI (in external divider mode): COUT_TOTAL_MAX = 2.25x10-4/VOUT Farads The nominal value for COUT is 10uF. See the applications section for more details. Over Current/Short Circuit Protection The current limit function is achieved by sensing the current flowing through a sense PMOSFET which is compared to a reference current. When this level is exceeded the PFET is turned off and the N-FET is turned on, pulling VOUT low. This condition is maintained for approximately 0.5mS and then a normal soft start is initiated. If the over current condition still persists, this cycle will repeat. The ENABLE pin provides a means to shut down the converter or enable normal operation. A logic low will disable the converter and cause it to shut down. A logic high will enable the converter into normal operation. NOTE: The ENABLE pin must not be left floating. Thermal Shutdown When excessive power is dissipated in the chip, the junction temperature rises. Once the junction temperature exceeds the thermal shutdown temperature, the thermal shutdown circuit turns off the converter output voltage thus allowing the device to cool. When the junction temperature decreases by 25C°, the device will go through the normal startup process. Application Information 100 ohm VIN PVIN VOUT AVIN VSENSE ENABLE 4.7µF 0603 VS0 100 ohm VOUT VIN 4.7µF 0603 VSENSE VFB VS0 VS2 10µF 0805 PGND AGND Figure 7: Application Circuit, EP53A8LQI showing the VFB function. Figure 6: Application Circuit, EP53A8HQI. 03651 AVIN VOUT VS1 PGND AGND ©Enpirion 2009 all rights reserved, E&OE VOUT ENABLE 10µF 0805 VS1 VS2 PVIN 10 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Output Voltage Programming The EP53A8xQI utilizes a 3-pin VID to program the output voltage value. The VID is available in two sets of output VID programming ranges. The VID pins should be connected either to an external control signal, AVIN or to AGND to avoid noise coupling into the device. The “Low” range is optimized for low voltage applications. It comes with preset VID settings ranging from 0.80V and 1.5V. This VID set also has an external divider option. To specify this VID range, order part number EP53A8LQI. The “High” VID set provides output voltage settings ranging from 1.8V to 3.3V. This version does not have an external divider option. To specify this VID range, order part number EP53A8HQI. Internally, the output of the VID multiplexer sets the value for the voltage reference DAC, which in turn is connected to the non-inverting input of the error amplifier. This allows the use of a single feedback divider with constant loop gain and optimum compensation, independent of the output voltage selected. voltage divider option. The VID pin settings can be changed on the fly to implement glitchfree voltage scaling. Table 1 shows the VS2-VS0 pin logic states for the EP53A8LQI and the associated output voltage levels. A logic “1” indicates a connection to AVIN or to a “high” logic voltage level. A logic “0” indicates a connection to AGND or to a “low” logic voltage level. These pins can be either hardwired to AVIN or AGND or alternatively can be driven by standard logic levels. Logic levels are defined in the electrical characteristics table. Any level between the logic high and logic low is indeterminate. EP53A8LQI External Voltage Divider The external divider option is chosen by connecting VID pins VS2-VS0 to VIN or a logic “1” or “high”. The EP53A8LQI uses a separate feedback pin, VFB, when using the external divider. VSENSE must be connected to VOUT as indicated in Figure 8. The output voltage is selected by the following formula: ) VOUT = 0.6V (1 + Ra Rb 100 Ohms VIN 4.7uF 0603 Table 1: EP53A8LQI VID Voltage Select Settings VS2 0 0 0 0 1 1 1 1 VS1 0 0 1 1 0 0 1 1 VS0 0 1 0 1 0 1 0 1 VOUT 1.50 1.45 1.20 1.15 1.10 1.05 0.8 EXT ©Enpirion 2009 all rights reserved, E&OE 03651 VSense AVIN ENABLE VS0 VS1 VS2 VOUT VOUT Ra 10µF 0805 VFB Rb PGND AGND Figure 8: EP53A8LQI using external divider Ra must be chosen as 237KΩ to maintain loop gain. Then Rb is given as: EP53A8L Low VID Range Programming The EP53A8LQI is designed to provide a high degree of flexibility in powering applications that require low VOUT settings and dynamic voltage scaling (DVS). The device employs a 3-pin VID architecture that allows the user to choose one of seven (7) preset output voltage settings, or the user can select an external PVIN EP53A8L NOTE: The VID pins must not be left floating. R b = 142.2 x10 3 Ω VOUT − 0.6 VOUT can be programmed over the range of 0.6V to (VIN – 0.5V). NOTE: Dynamic Voltage Scaling is not allowed between internal preset voltages and external divider. 11 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI EP53A8HQI High VID Range Programming The EP53A8HQI VOUT settings are optimized for higher nominal voltages such as those required to power IO, RF, or IC memory. The preset voltages range from 1.8V to 3.3V. There are eight (8) preset output voltage settings. The EP53A8HQI does not have an external divider option. As with the EP53A8LQI, the VID pin settings can be changed while the device is enabled. Table 2 shows the VS0-VS2 pin logic states for the EP53A8HQI and the associated output voltage levels. A logic “1” indicates a connection to AVIN or to a “high” logic voltage level. A logic “0” indicates a connection to AGND or to a “low” logic voltage level. These pins can be either hardwired to AVIN or AGND or alternatively can be driven by standard logic levels. Logic levels are defined in the electrical characteristics table. Any level between the logic high and logic low is indeterminate. These pins must not be left floating. Table 2: EP53A8HQI VID Voltage Select Settings VS2 0 0 0 0 1 1 1 1 VS1 0 0 1 1 0 0 1 1 VS0 0 1 0 1 0 1 0 1 VOUT 3.3 3.0 2.9 2.6 2.5 2.2 2.1 1.8 Input Filter Capacitor The input filter capacitor requirement is a 4.7µF 0603 low ESR MLCC capacitor. The ©Enpirion 2009 all rights reserved, E&OE 03651 input capacitor must use a X5R or X7R or equivalent dielectric formulation. Y5V or equivalent dielectric formulations lose capacitance with frequency, bias, and with temperature, and are not suitable for switchmode DC-DC converter input filter applications. Output Filter Capacitor The output filter capacitor requirement is a minimum of 10µF 0805 MLCC. Ripple performance can be improved by using 2x10µF 0603 or 2x10µF 0805 MLCC capacitors. The maximum output filter capacitance next to the output pins of the device is 60µF low ESR MLCC capacitance. VOUT has to be sensed at the last output filter capacitor next to the EP53A8xQI. Additional bulk capacitance for decoupling and bypass can be placed at the load as long as there is sufficient separation between the VOUT Sense point and the bulk capacitance. The separation provides an inductance that isolates the control loop from the bulk capacitance. Excess total capacitance on the output (Output Filter + Bulk) can cause an over-current condition at startup. Refer to the section on Soft-Start for the maximum total capacitance on the output. The output capacitor must use a X5R or X7R or equivalent dielectric formulation. Y5V or equivalent dielectric formulations lose capacitance with frequency, bias, and temperature and are not suitable for switch-mode DC-DC converter output filter applications. 12 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Recommended PCB Footprint Figure 9: EP53A8xQI Package PCB Footprint ©Enpirion 2009 all rights reserved, E&OE 03651 13 12/16/2009 www.enpirion.com Rev:B EP53A8LQI/EP53A8HQI Package and Mechanical Figure 10: EP53A8xQI Package Dimensions Contact Information Enpirion, Inc. Perryville III 53 Frontage Road Suite 210 Hampton, NJ 08827 Tel..908.894.6000 Fax: 908-894-6090 Enpirion reserves the right to make changes in circuit design and/or specifications at any time without notice. Information furnished by Enpirion is believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other third party rights, which may result from its use. Enpirion products are not authorized for use in nuclear control systems, as critical components in life support systems or equipment used in hazardous environment without the express written authority from Enpirion. ©Enpirion 2009 all rights reserved, E&OE 03651 14 12/16/2009 www.enpirion.com Rev:B