MICROSEMI LX1708

LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
KEY FEATURES
DESCRIPTION
ƒ Filter Free Operation
ƒ 15W +15W Output Power @
4Ω load: THD+N < 1%
ƒ High Efficiency > 85%
ƒ Full Audio Bandwidth: 20Hz to
20KHz
ƒ Low Distortion < 0.15% @ 30%
Max Power, 1KHz
ƒ High Signal-to-Noise Ratio:
90dB
ƒ Wide Supply Voltage Range
5.0V ~ 15V
ƒ Low Quiescent Current < 30mA
ƒ Turn ON/OFF POP Free
ƒ Standby / Mute Feature
ƒ Built-in Under Voltage Lockout
ƒ Thermal Protection
ƒ Short Circuit Protection
The part features on–board H-bridge
output stages with low RDSON.
External bootstrap capacitors are all that
is required to provide the gate drive to
the all-NFET output stage since onboard bootstrap diodes are provided.
The LX1708 also features Mute and
Standby modes, over-current protection,
POP-free turn-on and turn-off, undervoltage lockout, over-voltage protection,
and over-temperature protection.
The LX1708 is offered in a small
footprint, low profile surface mountable
32-pin Micro Lead Quad Package
(MLPQ) in 7mm x 7 mm.
WWW . Microsemi .C OM
The LX1708 is part of a new
generation of fully integrated stereo
class-D amplifiers from Microsemi.
This CMOS audio amplifier is
optimized
for
highly
efficient
operation and minimum system cost.
The stereo BTL (Bridge-tied-load)
configuration uses 3-level PWM
modulation. This allows eliminating
the LC filter to reduce the system cost
and simplify the system design. The
LX1708 outputs 15W into each of two
channels with better than 85%
efficiency.
APPLICATIONS
ƒ
ƒ
ƒ
ƒ
LCD TV
Car Navigation
Computer:
Portable Sound System
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
PRODUCT HIGHLIGHT
STBY
5V
TMON
ROSC
V5V
STBY
N.C.
STATUS
AVSS1
PVSS1N
OUT1N
OUT2N
BOOT2N
BOOT1N
PVDD1
PVDD
PVDD1
LX1708
BOOT1P
PVDD2
PVDD2
PVDD
BOOT2P
OUT1P
MUTE
N.C.
TCTRL
IN1P
OUT2P
VREF
PVSS1P
IN1N
AVSS2
PVSS2N
PVSS2P
IN2P IN2N
IN2N
IN2P
IN1P
MUTE
LX1708
IN1N
PACKAGE ORDER INFO
TA (°C)
LQ
Plastic MLPQ
32-Pin
7mmx7mm
RoHS Compliant / Pb-free
-40 to 85
LX1708ILQ
Note: Available in Tape & Reel. Append the letters
“TR” to the part number. (i.e. LX1708ILQ-TR)
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 1
LX1708
TM
®
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
ABSOLUTE MAXIMUM RATINGS
PACKAGE PIN OUT
PVDD1
PVDD1
BOOT1N
OUT1N
PVSS1N
31
30
29
28
27
26
25
1
24
TCTRL
IN1P
2
23
TMON
IN1N
3
22
AVSS2
N.C.
4
21
ROSC
N.C.
5
20
VREF
IN2N
6
19
AVSS1
IN2P
7
18
V5V
MUTE
8
17
STATUS
12
13
14
15
16
PVDD2
BOOT2N
OUT2N
PVSS2N
OUT2P
11
PVDD2
10
BOOT2P
9
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BOOT1P
32
STBY
PVSS2P
THERMAL DATA
OUT1P
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
PVSS1P
Analog Supply Voltage (PVDD) ................................................................. -0.3V to 16.5V
Supply Voltage (V5V) ......................................................................................... -0.3 to 6V
STBY to VSS......................................................................................-0.3V to V5V + 0.3V
IN1P/M, IN2P/M .................................................................................-0.3V to V5V +0.3V
Maximum Operating Junction Temperature .............................................................. 150°C
Storage Temperature Range.........................................................................-65°C to 150°C
Package Peak Temp. for Solder Reflow (40 seconds maximum exposure) ... 260°C (+0 -5)
LQ PACKAGE
(Top View)
Pb-free 100% Matte Tin Lead Finish
LQ
Plastic MLPQ 32-Pin 7mm x 7mm
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
15.5°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the
above assume no ambient airflow.
PACKAGE DATA
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
LX1708
®
TM
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
FUNCTIONAL PIN DESCRIPTION
# Of Pins
PVSS1P
PVSS1N
PVSS2P
PVSS2N
Power
Ground
PVDD1
PVDD2
Description
4
Power Ground for the two H-bridge output drivers.
Power
Supply
4
Power Supply for the two H-bridge output drivers. Operating voltage is from 4.5 up to
15V. Current draw will be up to 3.2A at 2X15W into 8ohms or up to 4.5A at 2X15W into 4
ohms. These are peak currents when the part is run at maximum rated power on both
channels.
V5V
Power
Supply
1
Analog Power Supply for the analog signal processing section. Operating voltage is from
4.5 up to 5.5V.
AVSS1
AVSS2
Analog
Ground
2
Analog Ground for the analog signal processing section. Should be at the same voltage
as PVSS. Also used to bias the substrate.
IN1N
IN1P
IN2N
IN2P
Analog
Input
4
Differential analog audio inputs for each channel. The common mode voltage will be set
by the LX1708 to around 2.25V.
OUT1N
OUT1P
OUT2N
OUT2P
Digital
Output
4
Differential high power audio outputs for each channel. Each output will swing between
PVDD and PVSS. These outputs are driven by an on-chip H-bridge output driver which
uses low Rdson NFETs.
BOOT1N
BOOT1P
BOOT2N
BOOT2P
Digital
Output
4
Bootstrap voltage pins which provide the high voltage needed to drive the upper NFET.
A bootstrap capacitor should be placed between the respective output and these pins.
VREF
Analog
Output
1
2.25V reference voltage which serves as a local “GND” reference. An external
compensation capacitor of at least 1uF should be connected between this pin and AVSS.
CMOS
Input
1
STBY
CMOS
Input
1
Logic level control which places the chip into sleep mode when high. The logic threshold
will be at ½ of V5V.
STATUS
CMOS
Output
1
Digital monitoring pin which is used to flag internal fault states. This pin will be
synchronized with the internal clock to prevent glitches. See the STATUS flag table for a
summary of which conditions will force this pin to go high.
ROSC
Analog
Input
1
Frequency control pin. A resistor between this pin and GND will set the oscillation
frequency for the Class-D modulator.
TCTRL
CMOS
Input
1
Test purpose only, Connect to AVSS1
TMON
Analog
I/O
1
Test purpose only, left open.
2
No Connect
N.C.
PACKAGE DATA
MUTE
Logic level control which mutes the audio signal when high. This will be a four level pin to
allow testing of the low gain mode as follows:
From 0 to ¼ of V5V, the gain will be normal.
From ¼ of V5V to ½ of V5V, the gain will be low
Above ½ of V5V, the gain will be muted.
The STATUS pin will go under any of the following conditions:
ƒ
STBY is high. This indicates that the chip is in “stand-by” mode.
ƒ
V5V is below the UVLO threshold. The outputs will be forced into the low state.
ƒ
PVDD is below the PVDD UVLO threshold. The outputs will be forced into the low state.
ƒ
PVDD is above the over-voltage threshold which is about 17.8V. The outputs will be forced into the low state.
ƒ
The die temperature is above about 140°C. This indicates that the part has gone in to gain foldback.
ƒ
A short circuit at the output has caused the output devices to shut off due to excessive temperature.
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
WWW . Microsemi .C OM
Name
Page 3
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
Parameter
`
Symbol
Test Conditions
Min
LX1708
Typ
Max
Units
OSCILLATOR
Oscillator Frequency
FOSC
Temperature Stability
POWER SUPPLY
Supply Voltage
UVLO
UVLO Hysteresis
+5V Supply
UVLO
UVLO Hysteresis
Stand-By Current
Operating Current
Stand-By Current
Operating Current
Power Supply Rejection Ratio
1
Reference Voltage
GAIN
Stage Gain @ 0dB Volume
Mute Gain @ minimum volume
OFFSET
PVDD
PVDD
PVDD
V5V
V5V
V5V
IQQ
IQQ
IQQ5V5
IQQ5V5
PSRR
VREF
G
GMUTE
Output DC Offset
VOFF
INPUT STAGE
Input Resistance
Common Mode Voltage
RIN
VCM
Varies with ROSC resistor value, value shown is
for default conditions. R = 25K
TA = 0°C to 70°C
TA = -40°C to 125°C
5.0
300
KHz
5
8
%
%
2.25
V
V
mV
V
V
mV
µA
mA
µA
mA
dB
V
f = 1KHz
Mute active, Input shorted
20
0.01
V/V
V/V
Measured Differentially. OUT1- to OUT1+
OUT2- to OUT2+
100
mV
22
2.25
KΩ
V
280
mΩ
150
°C
25
°C
V5V 2
V
Start-up Voltage
12
4.50
500
4.5
Start-up Voltage
For PVDD, STBY high
For PVDD, STBY low, Mute high
For 5V5, STBY high
For 5V5, STBY low, Mute high
For PVDD
C bypass = 1µF
4.25
250
10
10
10
7
15
4.90
5.5
4.50
50
30
15
55
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ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C < TA < 85°C except where
otherwise noted and the following test conditions: PVDD = 12V, PVSS = AVSS = 0V, V5V = 5V, ROSC = 25KΩ
OUTPUT STAGE
MOSFET On Resistance
RDSON
IDS = 200mA
THERMAL
Thermal Shut Off Junction
Temperature
Hystersis
MUTE / STBY / MASTER
MUTE Threshold
Mute Mode
STBY Threshold
STBY To Output Enable
Power On Reset Delay
After Power on Reset Pulse, Not Quick Mode
0.20
V5V 2
V
16384
0.30
Clocks
mS
3.8
Note 1: Not ATE Tested
ELECTRICALS
Note: Functionality over the -40°C to +85°C operating range is assured by design characterization and correlation.
Caution: Power Up/Down Sequencing
Power-on: Apply V5V w/STBY=V5V. Then apply PVDD. Then bring STBY low.
Power-off: Bring STBY high such that STBY=V5V. Then shut off PVDD. Then shut off V5V.
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 4
LX1708
®
TM
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
Parameter
`
Symbol
Test Conditions
Min
LX1708
Typ
Max
Units
AUDIO CHARACTERISTICS
Output Power Stereo
PO
Total Harmonic Distortion Stereo
Power Efficiency
Channel Crosstalk
Audio Bandwidth
THD+N
VXTALK
BW
High
Low
Stage Gain Stereo
Mute Output
VMUTE
Signal to Noise Ratio
SNR
Output Noise Floor
VN
Common Mode Rejection Ratio
Output Short Circuit Protection
CMRR
TSENSE
THD+N < 1%
THD+N <10%
POUT = 50% of Maximum Power, FIN = 1KHz
with diodes
POUT = 50% of Maximum Power, FIN = 1KHz
No diodes
POUT = 1W, FIN = 20Hz~20KHz
POUT = Max, THD+N < 1%
POUT = 1W, F = 1KHz
POUT = 1W, F = 20-20KHz
VIN = 200mVRMS, F = 20Hz~20KHz
VIN = 2VRMS, F = 20Hz~20Khz
Input short, system muted, stereo
12
15
20
0.01
-60
FIN = 1KHz @ 20Hz-20KHz non A-weighted
90
dB
200
µVRMS
dB
°C
W
0.2
%
0.7
0.4
90
-60
3
Input short, non A-weighted @ 20Hz-20KHz
55
Thermal Shutdown Mode
150
%
dB
dB
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SYSTEM MODULE CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C < TA < 85°C except where
otherwise noted and the following test conditions: PVDD = 12V, PVSS = AVSS = 0V, V5V = 5V, ROSC = 25KΩ, RL = 4Ω.
V/V
dB
ELECTRICALS
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 5
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
PVDD2
V5V
WWW . Microsemi .C OM
PVDD1
SIMPLIFIED BLOCK DIAGRAM
BOOT1P
OUT1P
IN1P
+
IN1N
-
PWM
BOOT1N
PVDD
OUT1N
LPF
From H-Bridge
LPF
Clock
BOOT2P
LPF
From H-Bridge
LPF
OUT2P
IN2P
+
IN2N
-
PWM
BOOT2N
PVDD
V5V
OUT2N
De-POP
BLOCK DIAGRAM
PVSS4
PVSS3
PVSS2
PVSS1
AVSS1
AVSS2
Figure 1 – Simplified Block Diagram
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
JP5
+5V
TB3
JP3
PVDD
+V
GND
GND
IN1IN1+
TB1
OUT1OUT1+
RL
OUT1-
LX1708
IN2-
OUT2+
IN2+
IN1IN2-
OUT2RL
OUT2+
IN2+
TB2
OUT2-
System One
IN1+
OUT1+
GND
J2
Audio
Precision
Power
Supply
VNEG
J1
Dual
Single
JP4
AGND
GND
CTR
GND
VCOM
NORM
TB4
Power Supply
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+5V
STBY
TEST SYSTEM SET-UP
Audio
Precision
System One
SQUK
SNOR
MQUK
MNOR
20dB
14dB
LX1725 Evaluation Module
JP6
MUTE
JP7
Oscilloscope
Figure 2 – System Test Set-up Diagram
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 7
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
APPLICATION CIRCUITS
VIN
CR1
1N5817
C1
47µF 25V
RTN
R8 470
TB1
R9 470
C23
4.7nF
TP4
RT-P
C24
2.2nF
CR2
1N5817
OUTR+
+5V
+5V
TP2
1P
C2
22µF 6.3V
RTN
OUTR-
TP3
1N
TEST PURPOSE
TB1
VIN
VIN
TP1
GND
R6 470
C4 0.47µF
C6 0.47µF
OUT1N
PVSS1N
STATUS
R1 25K
C11 1µF
C12 1µF
TP6 STATUS
PVSS2N
OUT2N
L
RCA Jack
BOOT2N
M
V5V
PVDD2
MUTE
+5V
VREF
AVSS1
IN2P
JP2
HEADER 2
J2
ROSC
Part
LX1708
N/C
IN2N
PVDD2
INLINL+
AVSS2
U1
N/C
C5 0.47µF
C22
2.2nF
TCTRL
TMON
IN1N
JP1
HEADER 1
PVSS2P
OUT2P
BOOT2P
INR-
PVDD1
STBY
IN1P
C3 0.47µF
INR+
BOOT1N
RCA Jack
PVDD1
SW1
SLEEP
C21
4.7nF
C9
1µF
PVSS1P
OUT1P
BOOT1P
C8
1µF
+5V
TP5
RT-N
C10 1µF
C7 1µF
J1
R7 470
+5V
N
Header
3x2
C14
1µF
TP7
GND
C15
1µF
C13 1µF
C16 1µF
VIN
TP8
2P
TEST PURPOSE
TP10
LEFT-N
VIN
TP9
2N
R2 470
C17
4.7nF
CR8
1N5817
R3 470
C18
2.2nF
OUTL-
CR7
1N5817
TEST PURPOSE
R4 470
C19
4.7nF
TP1
LEFT-P
R5 470
C20
2.2nF
Note 1: CR1, CR2, CR7, CR8 can be used for lower distortion performance.
Figure 3 – Typical Application
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 8
APPLICATIONS
OUTL+
Copyright © 2004
Rev.1.2, 2007-01-05
WWW . Microsemi .C OM
TEST PURPOSE
+VIN
LX1708
®
TM
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
FUNCTIONAL DESCRIPTION
The LX1708 drives each output between PVDD and PVSS
using an all-NFET, bootstrapped, H-bridge driver for each
channel. High efficiency is obtained by forcing all
transistors to operate either completely on or completely off
as required for a true class-D amplifier. The entire signal
path from input to output is differential to reject any sources
of common-mode noise or distortion. Even the triangle
wave operates differentially. Filterless class-D modulation
operates such that with no input signal, the outputs switch
at 300KHz and are in-phase with each other. Because the
two signals are identical, the differential signal to the
speaker is zero. As a direct result, there is no requirement
for a low-pass LC filter to present a high impedance at the
modulation frequency. This allows a cheaper and simpler
audio amplifier to be designed . As the input signal goes
positive, the duty cycle to the positive output increases
while the duty cycle of the negative output decreases. This
produces a net positive current flow into the load. A
negative signal reduces the positive output duty cycles and
increases the negative output duty cycle. The differential
signal actually appears at twice the modulation frequency
and alternates between +PVDD, 0, and –PVDD which
allows the parasitic inductance of the load to effectively
filter the switching signal so that only the audio band
portion remains.
Because each speaker is driven by an in-phase signal, the
common mode voltage to the speaker switches at the full
PVDD amplitude at 300KHz. This is a possible source of
EMI radiation. Typically, a ferrite bead is placed with a
small common-mode filter capacitor to reduce EMI
generation by filtering the edges of the output signals.
NOISE-FREE TURN-ON AND OFF
Copyright © 2004
Rev.1.2, 2007-01-05
AC-COUPLING AND BOOTSTRAP CAPACITORS
Input AC-coupling capacitors should be used to block any
input DC and low frequency components below the desired
low frequency corner. Since the input resistance to the
LX1708 is 25Kohms, a 20Hz low frequency corner can be
achieved with a 0.32µF AC-coupling capacitor. 1µF
bootstrap capacitors are required at each output to supply
the gate drive voltage for the upper level NFET in each
half-bridge.
THERMAL OVERLOAD PROTECTION
The LX1708 protects itself by monitoring its operating
temperature in two different ways. A general thermal
protection scheme monitors the overall die temperature.
Above 140°C, the amplifier gain is reduced by 6dB so that
the audio signal is still amplified, but the on-chip power
dissipation is halved. When the die temperature then goes
below 110°C, the amplifier gain is restored. Above 150°C,
the LX1708 forces all outputs to PVSS so that no power is
dissipated until the chip cools down to 110°C.
A dynamic thermal protection scheme operates by placing
temperature sensors near each of the output devices. When
a differential temperature rise of about 60°C occurs above
the core die temperature, which indicates a local short
circuit condition, the outputs are disabled to protect the
part. This provides short circuit protection for differential
shorts and shorts to ground. Since the outputs go low to
PVSS, shorts to PVDD are NOT protected.
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 9
APPLICATIONS
Noise-free turn-on and off is accomplished by carefully
sequencing the signal path when the amplifier is enabled or
disabled. Prior to turn-on, the outputs are initially both at
PVSS so there is no differential signal. The internal error
amplifier is held in a reset condition so that the internal
loop compensation components are “ready to go”. When
the outputs begin to toggle, the audio signal path is muted
for about 1.6mS. Following that time, the internal mute
signal is de-asserted and the audio input signal is allowed
to drive the pulse-width–modulator which then adjusts the
output duty cycle as necessary to drive the speaker. At
turn-off, the internal mute signal is asserted to silence the
input audio signal. The outputs continue switching in this
muted condition for about 0.6mS prior to being pulled low.
Once the outputs are forced low, the error amplifier is reset
so that the part is ready to being a new power-up sequence.
This scheme basically limits the pop noise at turn-on or off
to be no larger than the differential offset voltage of the
error amplifier.
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FILTERLESS CLASS-D MODULATION
LX1708
®
TM
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
OSCILLATOR
The value of R1 decides the switching frequency, smaller
value gives the system faster switching. See Figure 4, SW
Frequency vs. R1
SW Freq. vs.
ROSC
1,400k
SW Freq. (Hz)
1,200k
1,000k
800k
600k
400k
200k
0k
5K
17.5K
30K
42.5K
ROSC (ohm)
Figure 4 – SW Frequency vs. R1
BOOTSTRAP CAPACITORS
C8, C9, C14, and C15 are bootstrap capacitors for internal
NMOSFETs gate drive voltage, they work together with
internal diodes to boost the PVDD voltage doubled, over
the threshold voltage of VGS. If BOOT1P, BOOT1N,
BOOT2P, and BOOT2N are probed, 2x PVDD voltages on
the PWM waveform will be observed. Those capacitors
should be placed as close to the IC as possible.
BYPASSING CAPACITORS
C7, C10, C11, C12, C13, and C16 are bypassing capacitors
for input supplies and internal reference voltage (2.5V),
nominal value is 1µF. These capacitors should be placed as
close to the IC as possible also, to guarantee low ripples and
noise.
Copyright © 2004
Rev.1.2, 2007-01-05
PCB DESIGN GUIDELINES
One of the key efforts in implementing the MLP package on
a pc board is the design of the land pattern. The MLP has
rectangular metallized terminals exposed on the bottom
surface of the package body. Electrical and mechanical
connection between the component and the pc board is
made by screen printing solder paste on the pc board and
then reflowing the paste after placement. To guarantee
reliable solder joints it is essential to design the land
pattern to the MLP terminal pattern, exposed PAD, and
Thermal PAD via. There are two basic designs for PCB
land pads for the MLP: Copper Defined style (also known
as Non Solder Mask Defined (NSMD)) and the Solder
Mask Defined style (SMD). The industry has had some
debate on the merits of both styles and although Microsemi
recommends the Copper Defined style land pad (NSMD).
Both styles are acceptable for use with the MLP package.
NSMD pads are recommended over SMD pads due to the
tighter tolerance on copper etching than solder masking.
NSDM by definition also provides a larger copper pad area
and allows the solder to anchor to the edges of the copper
pads thus providing improved solder joint reliability.
EXPOSED PAD PCB DESIGN
The construction of the Exposed Pad MLP enables
enhanced thermal and electrical characteristics. In order to
take full advantage of this feature the exposed pad must be
physically connected to the PCB substrate with solder.
The exposed pad is internally connected to the die
substrate potential which is VNEG so it is very important
that the PCB substrate potential be connected to VNEG as
well.
The thermal pad (D2th) should be greater than D2 of the
MLP whenever possible; however adequate clearance (Cpl
> 0.15mm) must be met to prevent solder bridging. If this
clearance cannot be met, then D2th should be reduced in
area. The formula would be: D2TH > D2 only if D2TH <
Gmin – (2 x Cpl).
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 10
WWW . Microsemi .C OM
APPLICATION NOTE/PCB DESIGN GUIDLINE
LX1708
®
TM
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
THERMAL PAD VIA DESIGN
There are two types of on-board thermal PAD designs: one
is using thermal vias to sink the heat to the other layer with
metal traces. Based on the Jedec Specification (JESD 51-5)
the thermal vias should be designed like Figure 5. Another
one is the no via thermal PAD which is using the same
copper PAD as heat sink, this type of thermal PAD is good
for a two layer board, since the bottom side is filled with all
other kinds of trace also, it’s hard to use the whole plane for
the heat sink. But you still can use vias to sink the heat to
the bottom layer by the metal traces, then layout a NMSD
on which a metal heat sink is put to sink the heat to the air.
The LX1708 is supplied in an MLPQ – 7mm x 7mm, 32 pin
package. θJA = 15.5°C/W for the package by itself in still
air. When running at a continuous 20W output power, the
on-chip power dissipation will be 3.5W assuming 85%
efficiency. With no reduction in the thermal resistance, the
die temperature will rise 103 about ambient. θJC is about
4° C/W. if the exposed pad is properly connected to a heat
sink, then the temperature rise will be reduced to around
16°C under these conditions. So the via type thermal PAD
is suggested.
~0.85mm
~0.025mm
~0.355mm
Zmin
~7.45mm
D2th
~5.15mm
1.2mm
Gmin
~6.00mm
0.305mm
Micro Lead Quad
Land Pattern for Four
Package Land Pattern
Layer Board with Vias
Figure 5 – Comparison of land pattern theory
Ø 0.3mm
5.00mm
Figure 6 – Recommended Land Pad with Vias for LQ32 (7mm2)
Zmin=D + aaa+ 2(0.2)
(where pkg body tolerance aaa=0.15)
(where 0.2 is outer pad extension)
Gmin=D-2(Lmax)-2(0.05)
(where 0.05 is inner pad extension)
(Lmax=0.05 for this example)
D2th max = Gmin-2(CpL)
(where CpL=0.2)
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 11
WWW . Microsemi .C OM
APPLICATION NOTE/PCB DESIGN GUIDLINE (CONTINUED)
LX1708
®
TM
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
PRINTED CIRCUIT BOARD FOR THE LXE1708
WWW . Microsemi .C OM
Figure 7 – Inner Layer 1
Figure 8 – Bottom Layer
Figure 10 – Inner Layer 2
Figure 9 – Top Layer
Figure 11 – Top Component Layer
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 12
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
LX1708 EVAL KIT BILL OF MATERIALS
Part Description
Manufacturer & Part #
Case
Reference
Designators
Qty
1
Microsemi IC Controller LX1708 Class-D Audio
Amplifier
MICROSEMI
LX1708ILQ
MLPQ-32
U1
1
2
Diode, Schottky
MICROSEMI
UPS5817
Powermite
CR1, CR2, CR7,
CR8
N/U
3
Jack, PCB Mount, RCA
KEYSTONE
901
J1, J2
2
4
Header, 2 Position Vertical
3M
929450-01-02-1
JP1 – JP7
6
5
Header, 3 Position, 2 Row Vertical 0.1” Centers
3M
JP3
1
6
Switch, SPDT, PCB Mount Subminiature
C&K
GT11MSAKE
SW1
1
TB1, TB2, TB3,
TB4
4
SMT
TP1, TP7
2
SMT
TP2, TP3, TP4,
TP5, TP6, TP8,
TP9, TP10, TP11
9
Case
Reference
Designators
Qty
7
Terminal Block, 2 Position
BLOCKMASTER
301-021-1000
8
Terminal, Compact, Test Point
KEYSTONE
5016
9
Terminal, Subminiature,
KEYSTONE
5015
10
PCB, LX1708 Evaluation Board
MICROSEMI
SGE2874-X1
CAPACITORS
Line
Item
Part Description
Manufacturer & Part #
11
Capacitor, Elect., 47µF, 35V, 20%, KS Type
PANASONIC
ECEA1VKS470i
Thru
C1
1
12
Capacitor, Elect., 22µF, 10V, 20%, KS Type
PANASONIC
ECEA1AkS220i
Thru
C2
1
13
Capacitor, Ceramic, .47µF, 16V, 10%
PANASONIC
ECJ2YB1C474K
0805
C3, C4, C5, C6
4
14
Capacitor, Ceramic, X5R, 1µF, 25V, 10%,
PANASONIC
ECJ-2FB1E105K
0805
15
Capacitor, Ceramic, 4700pF, 50V, 10%,
PANASONIC
ECJ-1VB1H472K
0603
16
Capacitor, Ceramic, 2200pF, 50V, 10%
PANASONIC
ECJ-1VB1H222K
0603
C7, C8, C9, C10,
C11, C12, C13,
C14, C15, C16
C17, C19, C21,
C23
C18, C20, C22,
C24
10
4
4
RESISTORS
Line
Item
17
18
Part Description
Resistor, 25.5K Ohm, 1/10W, 1%
Resistor 470 Ohm, 1/10W, 5%
Copyright © 2004
Rev.1.2, 2007-01-05
Manufacturer & Part #
PANASONIC
PANASONIC
Reference
Designators
Qty
0603
R1
1
0603
R2, R3, R4, R5,
R6, R7, R8, R9
8
Case
ERJ3EKF2552V
ERJ3GSYJ471
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 13
WWW . Microsemi .C OM
MISCELLANEOUS COMPONENTS
Line
Item
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
THD VS PWR @ 4 OHM NO DIODES
THD+N VS. FREQUENCY
GAIN RESPONSE
WWW . Microsemi .C OM
THD VS PWR @ 4 OHM WITH DIODES
100
50
20
PVDD = 12V, V5V = 5V
PO = 1W, 10Hz ~ 22KHz BPF
Load 4
10
5
2
Without Diodes
1
0.5
%
0.2
0.1
0.05
With Diodes
0.02
0.01
0.005
0.002
0.001
20
See Note 1 on Schematic
50
100
200
500
1k
2k
5k
10k
20k
Hz
CHARTS
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 14
LX1708
TM
®
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
NOISE FLOOR & SIGNAL-TO-NOISE RATIO
CHANNEL CROSSTALK
WWW . Microsemi .C OM
OUTPUT POWER BANDWIDTH @ 1% THD
EFFICIENCY @ 4 OHM LOAD
100%
Without LC Filter
90%
80%
With LC Filter
Efficiency (%)
70%
60%
50%
40%
30%
20%
10%
0%
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Power/CH (W)
CHARTS
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 15
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
IQQ VS. FREQUENCY
PSRR (AC)
WWW . Microsemi .C OM
40
35
30
IQQ (mA)
25
20
15
10
5
0
150k
250k
350k
450k
550k
650k
750k
850k
950k 1,050k 1,150k
SW Freq. (Hz)
POWER VS. SUPPLY VOLTAGE
IQQ VS. SUPPLY
20
35
18
30
16
14
With LC Filter
4OHM Resistor Load
Power/CH (W)
IQQ (mA)
25
20
15
Without LC Filter
4OHM Speaker Load
10
R=4ohm; FIN = 1kHz
THD+N <= 1%
12
10
8
6
Without LC Filter
NO Load
5
4
2
0
5
6
7
8
9
10
Supply (V)
11
12
13
14
15
0
5
6
7
8
9
10
11
12
13
14
15
Supply Voltage (V)
CHARTS
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 16
LX1708
15+15W Stereo Filterless Class-D Amplifier
®
TM
P RODUCTION D ATA S HEET
PACKAGE DIMENSIONS
WWW . Microsemi .C OM
LQ
32-Pin MLPQ Plastic (7x7mm EP)
D
E2
b
L
D2
E
e
MILLIMETERS
MIN
MAX
0.80
1.00
0
0.05
0.25 REF
0.23
0.38
7.00 BSC
5.00
5.25
7.00 BSC
5.00
5.25
0.65 BSC
0.45
0.65
INCHES
MIN
MAX
0.031
0.039
0
0.002
0.010
0.009
0.015
0.276 BSC
0.197
0.207
0.276 BSC
0.197
0.207
0.026
0.018
0.026
Note:
A
A1
Dim
A
A1
A3
b
D
D2
E
E2
e
L
1. Dimensions do not include mold flash or protrusions; these
shall not exceed 0.155mm(.006”) on any side. Lead
dimension shall not include solder coverage.
A3
MECHANICALS
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 17
LX1708
TM
®
15+15W Stereo Filterless Class-D Amplifier
P RODUCTION D ATA S HEET
NOTES
WWW . Microsemi .C OM
NOTES
PRELIMINARY DATA – Information contained in this document is pre-production data
and is proprietary to Microsemi. It may not be modified in any way without the express
written consent of Microsemi. Product referred to herein is offered in pre-production form
only and may not have completed Microsemi’s Quality Assurance process for Release to
Production. Microsemi reserves the right to change or discontinue this proposed product
at any time.
Copyright © 2004
Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 18