NT511740D0J 16MEG : x4 Fast Page Mode DRAM NT511740D0J DATA SHEET REV 1.0 , JULY. 2000 1 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Contents Table of Contents .................................................................................................................................................................................... 02 Description................................................................................................................................................................................................ 03 Features.....................................................................................................................................................................................................03 Product Family ........................................................................................................................................................................................03 Pin Assignment ........................................................................................................................................................................................04 Electrical Characteristics .....................................................................................................................................................................05 Absolute Maximum Ratings ............................................................................................................................................................ 05 Recommended DC Operating Conditions ....................................................................................................................................... 05 Capacitance ................................................................................................................................................................................... 05 DC Electrical Characteristics ..........................................................................................................................................................06 AC Characteristics.................................................................................................................................................................................. 07 Timing Waveform.................................................................................................................................................................................... 10 Read Cycle ..................................................................................................................................................................................... 10 Write Cycle (Early Write) ................................................................................................................................................................ 11 Read Modify Write Cycle ................................................................................................................................................................ 12 Fast Page Mode Read Cycle ..........................................................................................................................................................13 Fast Page Mode Write Cycle(Early Write) ......................................................................................................................................14 Fast Page Mode Modify Write Cycle ..............................................................................................................................................15 RAS -only Refresh Cycle .............................................................................................................................................................. 16 CAS -before- RAS refresh............................................................................................................................................................ 17 Hidden Refresh Read Cycle ............................................................................................................................................................ 18 Hidden Refresh Write Cycle ............................................................................................................................................................ 19 Package Dimension................................................................................................................................................................................20 REV 1.0 , JULY. 2000 2 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM DESCRIPTION This is a family of 4,194,304 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage (+5.0V ), refresh cycle (2K Ref), access time (-5 or -6), power consumption (Normal or Low power) and package type (SOJ) are optional features of this family. All of this family have CAS -before- RAS refresh, RAS -only refresh and Hidden refresh capabilities. Furthermore, Selfrefresh operation is available in L-version. This 4Mx4 EDO Mode DRAM family is fabricated using NANYA’s advanced CMOS process to realize high bandwidth, low power consumption and high reliability. It may be used as main memory unit for microcomputer, high level computer and personal computer . FEATURES • Fast Page Mode operation . • TTL(5V) compatible inputs and outputs • Single +5V ± 10% power supply • JEDEC Standard pinout • CAS before RAS refresh, hidden refresh, RAS -only refresh capability • Refresh : 2048 cycles / 32 ms • Self-refresh capability (L-ver only) • Multi-bit test mode capability • Available in plastic SOJ packages PRODUCT FAMILY Family Active Power Access Time (Max.) tRAC tCAC tRC tPC Dissipation NT511740D0J - 50/5L 50ns 13ns 90ns 35ns 605mW NT511740D0J - 60/6L 60ns 15ns 110ns 40ns 550mW REV 1.0 , JULY. 2000 Voltage 5V Package 26(24)-pin SOJ 3 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM PIN CONFIGURATION (TOP VIEW) NT511740D0J V CC 1 24 Vss DQ0 2 23 DQ3 DQ1 3 22 DQ2 W 4 21 CAS RAS 5 20 OE NC 6 19 A9 A10 7 18 A8 A0 8 17 A7 A1 9 16 A6 A2 10 15 A5 A3 11 14 A4 Vcc 12 13 Vss 300mil 26(24)-pin SOJ Pin Name A0-A10 Pin Function Address Inputs DQ0-DQ3 Vss RAS Data Input / Output Ground Row Address Strob CAS W OE VCC NC REV 1.0 , JULY. 2000 Column Address Strob Read/Write Input Data Output Enable Power +5.0 V ( + 3.3V ) No Connection 4 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Symbol Rating Unit VIN ,VOUT -1.0 to +7.0 V Voltage on VCC Supply Relative to VSS VCC -1.0 to +7.0 V Short Circuit Output Current IOS 50 mA Power Dissipation PD* 1 W Operation Temperature Topr 0 to 70 °C Voltage on Any Pin Relative to VSS Storage Temperature Tstg -55 to 150 °C *:Ta = 25°C • Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions (Voltage referenced to Vss, Ta = 0 °C to 70°C ) Parameter Symbol Min. Typ. Max. Unit Supply Voltage VCC 4.5 5.0 5.5 V Ground VSS 0 0 0 Input High Voltage VIH 2.4 Input Low Voltage VIL *1 : Vcc +2.0V/20ns(5V), Pulse width is measured at Vcc *2 : -2.0V/20ns(5V), Pulse width is measured at Vss -1.0 *2 V - Vcc+1.0 - 0.8 *1 V V Capacitance ( Vcc = 5V, Ta = 25°C, f = 1 MHZ ) Parameter Input Capacitance (A0 -A11) Input Capacitance ( RAS , CAS , WE , OE ) Output Capacitance (DQ0-DQ3) Symbol Typ. Max. Unit CIN1 - 5 pF CIN2 - 7 pF CI/O - 7 pF DC Characteristics (Recommended operating conditions unless otherwise noted.) Max Parameter Symbol Min Max Units II(L) -5 5 uA IO(L) -5 5 uA Output High Voltage Level (IOH= -5mA) VOH 2.4 - V Output Low Voltage Level (IOL=4.2mA) VOL - 0.4 V Input Leakage Current (Any input 0 <= VIN <= VIN+0.5V, all other input pins not under test =0 Volt) 5V Output Leakage Current (Data out is disabled, 0 <= VOUT <= VCC) REV 1.0 , JULY. 2000 5 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM DC CHARACTERISTICS ( Continued ) Symbol Power ICC1 Don’t care ICC2 Normal L ICC3 Don’t care ICC4 Don’t care ICC5 Normal L Speed Max Units -5 110 mA -6 100 mA 2 mA 1 mA -5 110 mA -6 100 mA -5 90 mA -6 80 mA 3 mA 200 uA -5 110 mA Don’t care Don’t care ICC6 Don’t care -6 100 mA ICC7 L Don’t care 300 uA ICCS L Don’t care 250 uA ICC1* : Operating Current ( RAS and CAS cycling @ tRC =min.) ICC2 : Standby Current ( RAS = CAS = W =VIH ) ICC3* : RAS -only Refresh Current ( RAS =VIH , RAS cycling @ tRC =min.) ICC4* : Fast Page Mode Current ( RAS =VIL, CAS Address cycling @ tPC=min.) ICC5 : Standby Current ( RAS = CAS = W =VCC -0.2V) ICC6* : CAS-Before- RAS Refresh Current ( RAS , CAS c ycling @ tRC =min.) ICC7 : Battery back-up current, Average power supply current, Battery back-up mode Input high voltage (VIH )=VCC-0.2V, Input low voltage (VIL)=0.2V, CAS =0.2V, DQ=Don’t care, tRC =125us(2K/L-ver) , tRAS=tRASmin~300ns ICCS : Self Refresh Current ( RAS = CAS =0.2V, W = OE =A0 ~ A11=VCC-0.2V or 0.2V, DQ0 ~ DQ3=VCC-0.2V, 0.2V or open ) *Note : ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the output open. ICC is specified as an average current. In ICC1, ICC3 and ICC6, address can be changed maximum once while RAS =VIL. In ICC4, address can be changed maximum once within one Fast Page Mode cycle time, tPC. REV 1.0 , JULY. 2000 6 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM AC CHARACTERISTICS (0°C ≤ Ta ≤ 70°C , See note 1,2) ; Test condition : VCC=5.0V ± 10%, VIH /VIL=2.4/0.8V, VOH /VOL=2.0/0.8V Parameter -50 Symbol -60 Min Max Min Max 90 - 110 - Unit Notes Random read or write cycle time t RC Read-modify-write cycle time t RWC Access time from RAS t RAC 50 60 ns 3,4,10 Access time from CAS t CAC 13 15 ns 3,4,5 Access time from column address t AA 25 30 ns 3,10 CAS to output in Low-Z t CLZ 0 ns 3 Output buffer turn-off delay t OFF 0 ns 6 Transition time (rise and fall) tT 3 3 ns 2 RAS precharge time t RP 30 40 ns RAS pulse width t RAS 50 60 ns RAS hold time t RSH 13 15 ns CAS hold time t CSH 50 60 ns CAS pulse width t CAS 13 15 ns RAS to CAS delay time t RCD 17 ns 4 RAS to column address delay time t RAD 12 15 ns 10 CAS to RAS precharge time t CRP 5 5 ns Row address set-up time t ASR 0 0 ns Row address hold time t RAH 7 10 ns Column address set-up time t ASC 0 0 ns Column address hold time t CAH 7 10 ns Column address to RAS lead time t RAL 25 30 ns Read command set-up time t RCS 0 0 ns Read command hold time referenced to CAS t RCH 0 0 ns 8 Read command hold time referenced to RAS t RRH 0 0 ns 8 Write command hold time t WCH 7 10 ns Write command pulse width t WP 7 10 ns Write command to RAS lead time t RWL 13 15 ns Write command to CAS lead time t CWL 7 10 ns Data set-up time t DS 0 0 ns 9 Data hold time t DH 7 10 ns 9 Refresh period (2K, Normal) t REF 32 32 ms Refresh period (L-ver) t REF 128 128 ms Write command set-up time t WCS REV 1.0 , JULY. 2000 131 0 155 ns 0 13 37 0 20 0 ns 15 45 ns 7 7 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM AC CHARACTERISTICS (Continued ) Parameter -50 Symbol Min -60 Max Min Max Unit Notes CAS to W delay time t CWD 36 40 ns 7 RAS to W delay time t RWD 73 85 ns 7 Column address to W delay time t AWD 48 55 ns 7 CAS precharge to W delay time t CPWD 53 60 ns CAS set-up time (CAS -before- RAS refresh) t CSR 5 5 ns CAS hold time (CAS -before- RAS refresh) t CHR 10 10 ns 5 RAS to CAS precharge time t RPC Access time from CAS precharge t CPA Hyper Page cycle time t PC 35 40 ns Hyper Page read-modify-write cycle time t PRWC 76 85 ns CAS precharge time (Hyper Page cycle) t CP 7 10 ns RAS pulse width (Hyper Page cycle) t RASP 50 RAS hold time from CAS precharge t RHCP 30 OE access time t OEA OE to data delay t OED 13 Output buffer turn off delay time from OE t OEZ 0 OE command hold time t OEH 13 15 ns W to RAS precharge time(C-B-R refresh) t WRP 10 10 ns W to RAS hold time(C-B-R refresh) t WRH 10 10 ns RAS pulse width (C-B-R self refresh) t RASS 100 100 ns 11,12,13 RAS precharge time (C-B-R self refresh) t RPS 90 110 ns 11,12,13 CAS hold time (C-B-R self refresh) t CHS -50 -50 ns 11,12,13 REV 1.0 , JULY. 2000 5 30 100k ns 35 60 100k 35 13 15 0 3 ns ns 15 13 ns ns ns 15 ns 6 8 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM NOTES 1. An initial pause of 200us is required after power-up followed by any 8 RAS -only refresh or CAS -before- RAS refresh Cycles before proper device operation is achieved. 2. VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between VIH (min) and VIL (max) and are assumed to be 5ns for all inputs. 3. Measured with a load equivalent to 2 TTL(5V) loads and 100pF. 4. Operation within the t RCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only. If tRCD is greater than the specified tRCD (max) limit, then access time is controlled exclusively by tCAC. 5. Assumes that tRCD >= tRCD(max). 6. tOFF(min) and tOEZ(max) define the time at which the output achieves the open circuit condition and is not referenced to VOH or VOL. 7. tWCS, tRWD, tCWD and tAWD are non restrictive operating parameters. They are included in the data sheet as electrical characteristics only. If tWCS >= tWCS(min), the cycle is an early write cycle and the data output will remain high impedance for the duration of the cycle. If tCWD >= tCWD(min), tRWD >= tRWD(min) and tAWD >= tAWD(min), then the cycle is a read-modify-write cycle and the data output will contain the data read from the selected address. If neither of the above conditions is satisfied, the condition of the data out is indeterminate. 8. Either tRCH or tRRH must be satisfied for a read cycle. 9. These parameters are referenced to CAS falling edge in early write cycles and to W falling edge in read-modify-write controlled write cycles. 10. Operation within the tRAD (max) limit insures that tRAD(max) can be met. tRAD(max) is specified as a reference point only. If tRAD is greater than the specified tRAD(max) limit, then access time is controlled by tAA . 11. If tRASS >= 100us, then RAS precharge time must use t RPS instead of t RP. 12. For RAS-only refresh and burst CAS -before- RAS refresh mode, 2048(2K) cycles of burst refresh must be executed within 32ms before and after self refresh, in order to meet refresh specification.. 13. For distributed CAS -before- RAS with 15.6us interval CAS -before- RAS refresh should be executed with in 15.6us immediately before and after self refresh in order to meet refresh specification. REV 1.0 , JULY. 2000 9 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Timing Waveform Read Cycle tRC RAS VIH VIL tRAS t RP tCRP t CSH tCRP CAS tRCD tRSH VIH VIL t CAS t RAL t RAD t ASR Address VIH t RAH tASC tCAH Row Column VIL tRCH tRCS VIL t RRH t AA WE VIH tROH tOEA OE VIH VIL t OFF tCAC tRAC tOEZ tCLZ VIH DQ VIL Valid Data-out Open : H" or L" REV 1.0 , JULY. 2000 10 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Write Cycle ( Early Write ) tRC RAS VIH VIL tRAS t RP tCRP t CSH tCRP CAS tRCD tRSH VIH VIL t CAS t RAL tRAD t ASR Address VIH t RAH tASC tCAH Row Column VIL t WCL t WCS WE t WCH tWP VIL VIH tRWL OE VIH VIL tDS DQ VIH VIL t DH Valid Data-out Open : H" or L" REV 1.0 , JULY. 2000 11 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Read Modify Write Cycle t RWC RAS VIH VIL tRAS t RP tCRP tCSH t CRP CAS t RCD tRSH VIH VIL t CAS tASR Address VIH t RAH t ASC Row t CAH Column VIL t RAD t CWL t CWD t RWD WE t AA VIL VIH tWP t AWD t RCS OE tRWL t OEA VIH VIL t OED tCAC t OEZ tRAC t OEH tDS t DH tCLZ DQ VIH VIL Valid Data-out Valid Data-in : H" or L" REV 1.0 , JULY. 2000 12 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Fast Page Mode Read Cycle tRP tRASP IH RAS V VIL tPC t CRP tRCD IH CAS V VIL tCAS tCP tCAS t CP tCAS tCP tRAD tCSH tASR IH Address V VIL t CRP t RSH tRAH tASC Row tRAL tCAH tASC Column tCAH tASC Column Column tRCH tRCS tRCS tCAH tRCH tRCH tRCS VIH WE VIL tAA tAA tAA tCPA IH OE V VIL tCAC IH DQ V VIL tCPA tOEA tRAC tOEA tOFF tCAC tOEZ tCLZ tOEA tOFF tCAC tOEZ tCLZ Valid Data-out tRRH Valid Data-out tOFF tOEZ tCLZ Valid Data-out : H" or L" REV 1.0 , JULY. 2000 13 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Fast Page Mode Write Cycle ( Early Write ) tRP tRASP IH RAS V VIL tPC t CRP tRCD tCAS tCP t RSH tCAS t CP tCAS t CRP tCP VIH CAS VIL tRAD tCSH tASR VIH Address VIL tRAH tASC Row tCAH Column tRAD tWCS IH WE V VIL tCAH tASC Column tCWL tCAH Column tCWL tCWL tRWL tWCH tWCS tWP tDS IH DQ V VIL tRAL tASC tDH Valid Data-in tWCH tWCS tWP tDS tDH Valid Data-in tWCH tWP tDS tDH Valid Data-in Note : OE=H" or L" : H" or L" REV 1.0 , JULY. 2000 14 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Fast Page Mode Modify Write Cycle tRP tRASP IH RAS V VIL t CSH tRCD t CAS tPRWC tCAS t CP t RHCP t RSH t CAS tCP tCRP V CAS VIH IL tAR tCPWD tCPWD tRAL tRAD tASR IH Address V VIL tRAH tASC Row tCAH tASC Column tCAH tASC Column Column tCWL tRCS tAWD tCWD tCAH tCWL tAWD tCWD tWP tCWL tAWD tCWD t WP tRWL tWP VIH WE VIL tRWD tAA t DH tAA tCAC tDS tCAC tOEA tOEZ tOEA tDH t DH tAA tDS tCAC tDS VIH OE VIL tRAC tOEZ tOED VIH DQ VIL tOEA tOED tCLZ tOED tCLZ Out tOEZ In tCLZ Out In Out In : H" or L" REV 1.0 , JULY. 2000 15 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM RAS-Only Refresh Cycle t RC RAS VIH VIL t RAS t RP tRPC t CRP CAS VIH VIL tASR Address VIH t RAH Row VIL t OFF V IH DQ V IL Open : H" or L" REV 1.0 , JULY. 2000 16 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM CAS-before-RAS Refresh Cycle tRC tRAS tRP tRP VIH RAS VIL tRPC tCP t CSR t CHR IH CAS V VIL tWRP tWRH tWRP VIH WE VIL tOFF IH DQ V VIL Open : H" or L" REV 1.0 , JULY. 2000 17 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Hidden Refresh Read Cycle tRC tRAS tRC tRAS tRP tRP IH RAS V VIL t CRP tRCD tRSH t CHR IH CAS V VIL tASR IH Address V VIL tRAD tRAH tASC Row t CAH Column tRCS tRAL V WE VIH IL tRRH tROH tAA tOEA VIH OE VIL tCAC tRAC VIH DQ VIL tOFF tOEZ tCLZ Valid Data-out : H" or L" REV 1.0 , JULY. 2000 18 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM Hidden Refresh Write Cycle tRC tRAS tRC tRAS tRP tRP IH RAS V VIL t CRP tRCD tRSH t CHR IH CAS V VIL tASR tRAD tRAH tASC t CAH tRAL IH Address V VIL Row Column tWCS tWCH tWRP tWRH tWP V WE VIH IL VIH OE VIL tDS VIH DQ VIL tDH Valid Data-in : H" or L" REV 1.0 , JULY. 2000 19 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice. NT511740D0J 16MEG : x4 Fast Page Mode DRAM PACKAGE DIMENSION 24/26-PIN PLASTIC SOJ (300mil) 17.27 17.01 7.75 7.49 8.60 8.34 3.75 3.25 0.32 0.17 PIN #1 INDEX 2.63 TYP. SEATING 0.95 TPY 1.27 MAX NOTE : All dimensions in millimeters MIN REV 1.0 , JULY. 2000 0.50 0.38 0.81 MAX 6.98 6.48 0.635 MIN or typical where noted. 20 © NANYA TECHNOLOGY CORP. NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice.