ETC T73LVP20-S08-TNR

Preliminary Information
T73LVP20
3.3V LVTTL/LVCMOS-to-Differential
LVPECL Translator
Applications
•
LVPECL clock source
General Description
The TLSI T73LVP20 is a general-purpose LVTTL/LVCMOS-to-differential LVPECL translator operating
from a single +3.3V supply. The device accepts an LVTTL or LVCMOS input and provides differential
LVPECL outputs referenced to the positive supply rail. Both the tiny 6-pin SOT and 8-pin SOIC packages
make it ideal for applications which require the translation of a clock or a data signal, and where cost,
performance and size are of critical importance. The T73LVP20 is 100K PECL compatible and is a pin-forpin replacement for the MC100EPT20D (8-pin SOIC only).
Features
•
350pS typical propagation delay
•
Operating Frequency > 1 GHz
•
Differential LVPECL outputs
•
Flow-through pinout
•
Q output defaults low with input (D)
open
•
ESD rating >2000V (Human Body
Model) or >200V (Machine Model)
•
-40 oC to +85 oC operating temperature
range
•
Available as die, in tiny 6-pin SOT or
standard 8-pin SOIC packages
Figure 1. Functional Block Diagrams & Pin Assignments (Top View)
See pages 4 & 5 for package outline drawings
and
ordering information.
T73LVP20PI
Page 1
Rev A February 23, 2004
TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 • (631) 755-7005 • Fax 631-755-7626 • www.tlsi.com
T73LVP20
Preliminary Information
Table 1. Pin Description
Type
8-SOIC Pin #
6-SOT Pin #
NC
Name
No Connection
-
1, 4, 6
4
Q
PECL data output
O
2
6
Qn
PECL complementary data output
O
3
5
VDD
Connect to +3.3V
P
8
1
D
LVTTL/LVCMOS data input
I
7
3
GND
Connect to ground
P
5
2
Legend:
Description
I = Input
O = Output
P = Power supply connection
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Conditions
VDD
Supply voltage
Referenced to GND
VIN
Input voltage
Referenced to GND
IOUT
Output current
Continuous
TSTG
Storage temperature
Min
Typ
-0.5
-65
Max
Units
+5.0
V
VDD
V
50
mA
o
+150
C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only and correct functional operation of the device at these or any other conditions above those listed in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
Table 3. Operating Conditions
Symbol
VDD
Parameter
Conditions
Power Supply Voltage
Min
Typ
Max
+3.0
+3.3
+3.6
TA
Ambient Temperature
-40
VIH
Input HIGH Voltage
+2.0
VIL
Input LOW Voltage
T73LVP20PI
Units
+85
C
V
+0.8
Page 2
V
o
V
Rev A February 23, 2004
TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 • (631) 755-7005 • Fax 631-755-7626 • www.tlsi.com
T73LVP20
Preliminary Information
Table 4. DC Characteristics
TA = -40oC to +85oC, VDD = +3.0V to +3.6V unless otherwise stated below.
Parameter
Conditions
Max
Units
IIH
Symbol
Input HIGH Current
VIN =+2.7V
100
µA
IIL
Input LOW Current
VIN = +0.5V
1
µA
VIK
Input Clamp Diode Voltage
IIN = -18mA
-1.2
V
VOH
Output HIGH Voltage
(1, 2)
o
-40 C
VDD = +3.3V
VOL
Output LOW Voltage
2320
2420
mV
+25 C
2220
2320
2420
mV
+85oC
2220
2320
2420
mV
1420
1520
1620
mV
+25 C
1420
1520
1620
mV
+85oC
1420
1520
1620
mV
o
-40 C
VDD = +3.3V
o
IDD
Notes:
Power Supply Current
Typ
2220
o
(1, 2)
Min
No Load
23
mA
1. The T73LVP20 is designed to meet these specifications after thermal equilibrium has been established.
The circuit is in a test socket or mounted on a printed circuit board.
2. Q and Qn outputs are loaded with 50 ohms to VDD-2 volts.
Table 5. AC Characteristics
TA = -40oC to +85oC, VDD = +3.0V to +3.6V
Symbol
Parameter
Conditions
Min
Typ
Max
Units
To Output Differential
350
500
ps
To Output Differential
350
500
ps
130
200
ps
Propagation Delay
(1)
tPHL
Propagation Delay
(1)
tr/tf
Output Rise/Fall time
20%-80%, Q, Qn
fMAX
Maximum Input Frequency
LVTTL or LVCMOS
input
>1
GHz
fMAX
Maximum Input Frequency (2)
750mV peak-to-peak
sine wave centered
around 1.5V
>1
GHz
tPLH
Notes:
80
1. Q and Qn outputs are loaded with 50 ohms to VDD-2 volts.
2. Measured using a 750mV peak-to-peak, 50% duty cycle clock source.
T73LVP20PI
Page 3
Rev A February 23, 2004
TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 • (631) 755-7005 • Fax 631-755-7626 • www.tlsi.com
T73LVP20
Preliminary Information
Figure 2. Package Outline (8-pin SOIC)
T73LVP20PI
Page 4
Rev A February 23, 2004
TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 • (631) 755-7005 • Fax 631-755-7626 • www.tlsi.com
T73LVP20
Preliminary Information
Figure 3. Package Outline (6-pin SOT)
Table 6. Ordering Information
Part Number
T73LVP20-S08
T73LVP20-S08-TNR
T73LVP20-SOT
T73LVP20-SOT-TNR
T73LVP20-DIE
T73LVP20PI
Marking
T73LVP20
T73LVP20
LVP20
LVP20
N/A
Shipping/Packaging
Tubes
Tape & Reel
Tubes
Tape & Reel
Dice
Page 5
No. of Pins
8
8
6
6
6
Package
SOIC
SOIC
SOT
SOT
N/A
Temperature
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
Rev A February 23, 2004
TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 • (631) 755-7005 • Fax 631-755-7626 • www.tlsi.com