ARIZONA MICROTEK, INC. AZ100LVE310 ECL/PECL 2:8 Differential Clock Driver FEATURES • • • • • • • PACKAGE AVAILABILITY Operating Range of 3.0V to 5.5V Low Skew Guaranteed Skew Spec Differential Design VBB Output 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC100LVE310 & MC100E310 PACKAGE PLCC 28 PLCC 28 T&R PART NO. AZ100LVE310FN AZ100LVE310FNR2 MARKING AZM100LVE310 AZM100LVE310 DESCRIPTION The AZ100LVE310 is a low skew 2:8 fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The AZ100LVE310 offers two selectable clock inputs allowing redundant or test clocks to be incorporated into the system clock trees. The AZ100LVE310 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device. For single–ended input applications, the VBB reference should be connected to one side of the CLKa/CLKb differential input pair. The input signal is then fed to the other CLKa/CLKb input. The VBB pin should be used only as a bias for the AZ100LVE310 as its current sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01µF capacitor. Both sides of the differential output must be terminated into 50Ω to ensure that the tight skew specification is met, even if only one side is used. In most applications all eight differential pairs will be used and therefore terminated. In the case where fewer than eight pairs are used, all output pairs on the same package side (sharing the same VCCO) as the pairs being used should be terminated to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10–20ps) of the outputs being used; while not being catastrophic to most designs this will result in an increase in skew. NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established. Q0 Q0 Q1 VCCO Q1 Q2 Q2 25 24 23 22 21 20 19 VEE 26 18 Q3 CLK_SEL 27 17 Q3 CLKa 28 16 Q4 VCC 1 15 VCCO Pinout: 28-Lead PLCC (top view) CLKa 2 14 Q4 VBB 3 13 Q5 CLKb 4 12 Q5 5 6 7 CLKb NC Q7 8 9 10 11 VCCO Q7 Q6 Q6 1630 S. STAPLEY DR., SUITE 125 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541 www.azmicrotek.com AZ100LVE310 LOGIC SYMBOL Q0 Q0 PIN DESCRIPTION Q1 PIN CLKa, CLKa ¯¯¯¯¯ CLKb, CLKb ¯¯¯¯¯ CLK_SEL Q0, Q0 ¯¯ – Q7, Q7 ¯¯ VBB VCC , VCCO VEE NC CLK_SEL 0 1 FUNCTION Differential Input Pairs Differential Input Pairs Input Clock Select Differential Output Pairs VBB Output Positive Supply Negative Supply No Connect Q1 Q2 Q2 Input Clock CLKa Selected CLKb Selected CLKa Q3 CLKa Q3 CLKb Q4 CLKb Q4 Q5 CLK_SEL Q5 Q6 Q6 Q7 VBB Q7 Absolute Maximum Ratings are those values beyond which device life may be impaired. Symbol VCC VI VEE VI IOUT TA TSTG Characteristic PECL Power Supply (VEE = 0V) PECL Input Voltage (VEE = 0V) ECL Power Supply (VCC = 0V) ECL Input Voltage (VCC = 0V) Output Current --- Continuous --- Surge Operating Temperature Range Storage Temperature Range Rating 0 to +8.0 0 to +6.0 -8.0 to 0 -6.0 to 0 50 100 -40 to +85 -65 to +150 Unit Vdc Vdc Vdc Vdc mA °C °C 100K ECL DC Characteristics (VEE = -3.0V to -5.5V, VCC = VCCO = GND) Symbol Characteristic 1 Min -1085 -1830 -1165 -1810 -1380 -40°C Typ -1005 -1695 Max -880 -1555 -880 -1475 -1260 150 VOH Output HIGH Voltage VOL Output LOW Voltage1 VIH Input HIGH Voltage VIL Input LOW Voltage VBB Reference Voltage Input HIGH Current IIH Input LOW Current 0.5 IIL IEE Power Supply Current 55 60 1. Each output is terminated through a 50Ω resistor to VCC – 2V. March 2002 * REV - 3 Min -1025 -1810 -1165 -1810 -1380 0°C Typ -955 -1705 Max -880 -1620 -880 -1475 -1260 150 0.5 Min -1025 -1810 -1165 -1810 -1380 25°C Typ -955 -1705 Max -880 -1620 -880 -1475 -1260 150 0.5 55 www.azmicrotek.com 2 60 Min -1025 -1810 -1165 -1810 -1380 85°C Typ -955 -1705 Max -880 -1620 -880 -1475 -1260 150 0.5 55 60 65 70 Unit mV mV mV mV mV µA µA mA AZ100LVE310 100K LVPECL DC Characteristics (VEE = GND, VCC = VCCO = +3.3V) Symbol Characteristic 1,2 Min 2215 1470 2135 1490 1920 -40°C Typ 2295 1605 Max 2420 1745 2420 1825 2040 150 Min 2275 1490 2135 1490 1920 0°C Typ 2345 1595 Max 2420 1680 2420 1825 2040 150 Min 2275 1490 2135 1490 1920 VOH Output HIGH Voltage VOL Output LOW Voltage1,2 VIH Input HIGH Voltage1 VIL Input LOW Voltage1 VBB Reference Voltage1 IIH Input HIGH Current Input LOW Current 0.5 0.5 0.5 IIL IEE Power Supply Current 55 60 55 60 1. For supply voltages other that 3.3V, use the ECL table values and ADD supply voltage value. 2. Each output is terminated through a 50Ω resistor to VCC – 2V. 25°C Typ 2345 1595 Max 2420 1680 2420 1825 2040 150 Min 2275 1490 2135 1490 1920 85°C Typ 2345 1595 Max 2420 1680 2420 1825 2040 150 0.5 55 60 65 70 Unit mV mV mV mV mV µA µA mA 100K PECL DC Characteristics (VEE = GND, VCC = VCCO = +5.0V) Symbol Characteristic Min 3915 3170 3835 3190 3620 -40°C Typ 3995 3305 Max 4120 3445 4120 3525 3740 150 Min 3975 3190 3835 3190 3620 0°C Typ 4045 3295 Max 4120 3380 4120 3525 3740 150 Min 3975 3190 3835 3190 3620 VOH Output HIGH Voltage1,2 VOL Output LOW Voltage1,2 VIH Input HIGH Voltage1 VIL Input LOW Voltage1 VBB Reference Voltage1 IIH Input HIGH Current Input LOW Current 0.5 0.5 0.5 IIL IEE Power Supply Current 55 60 55 60 1. For supply voltages other that 5.0V, use the ECL table values and ADD supply voltage value. 2. Each output is terminated through a 50Ω resistor to VCC – 2V. 25°C Typ 4045 3295 Max 4120 3380 4120 3525 3740 150 Min 3975 3190 3835 3190 3620 85°C Typ 4045 3295 Max 4120 3380 4120 3525 3740 150 0.5 55 60 65 70 Unit mV mV mV mV mV µA µA mA AC Characteristics (VEE = -3.0V to -5.5V, VCC = VCCO = GND or VEE = GND, VCC = VCCO = +3.0 to +5.5V) Symbol Characteristic VPP (AC) Propagation Delay to Output IN (Diff)1 IN (SE)2 Within-Device Skew Part-to-Part Skew (Diff)3 Minimum Input Swing4 VCMR Common Mode Range5 tPLH / tPHL tSKEW tr / t f 1. 2. 3. 4. 5. Min 525 500 250 VEE + 1.8 -40°C Typ Max Min 725 750 75 250 550 550 VCC 0.4 0°C Typ 250 VEE + 1.8 Max Min 750 775 75 250 550 550 VCC 0.4 250 VEE + 1.8 25°C Typ Max Min 750 800 50 200 575 600 VCC 0.4 250 VEE + 1.8 85°C Typ Max 775 850 50 200 www.azmicrotek.com 3 ps ps mV VCC 0.4 Rise/Fall Time 250 450 650 275 375 600 275 375 600 275 375 600 20 – 80% The differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential output signals. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal. The within-device skew is defined as the worst-case difference between any two similar delay paths within a single device. VPP is the minimum peak-to-peak differential input swing for which AC parameters are guaranteed. The VPP(min) is AC limited for the LVE310, because differential input as low as 50 mV will still produce full ECL levels at the output. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to VPP(min). March 2002 * REV - 3 Unit V ps AZ100LVE310 PACKAGE DIAGRAM PLCC 28 DIM A B C E F G H J K R U V W X T Z G1 K1 MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 0.64 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 0.50 2O 10O 10.42 10.92 1.02 March 2002 * REV - 3 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 0.025 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 0.020 2O 10O 0.410 0.430 0.040 www.azmicrotek.com 4 NOTES: 1. DATUMS –L-, -M-, AND –N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM –T-, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALOWABLE MOLD FLASH IS 0.010mm (0.250in.) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKGE BOTTOM BY UP TO 0.012mm (0.300in.). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, THE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025mm (0.635in.). AZ100LVE310 Arizona Microtek, Inc. reserves the right to change circuitry and specifications at any time without prior notice. Arizona Microtek, Inc. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Arizona Microtek, Inc. assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Arizona Microtek, Inc. does not convey any license rights nor the rights of others. Arizona Microtek, Inc. products are not designed, intended or authorized for use as components in systems intended to support or sustain life, or for any other application in which the failure of the Arizona Microtek, Inc. product could create a situation where personal injury or death may occur. Should Buyer purchase or use Arizona Microtek, Inc. products for any such unintended or unauthorized application, Buyer shall indemnify and hold Arizona Microtek, Inc. and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Arizona Microtek, Inc. was negligent regarding the design or manufacture of the part. March 2002 * REV - 3 www.azmicrotek.com 5