ETC DM163

DM163
Version
: A.004
Issue Date : 2005/8/19
File Name : SP-DM163-A.004.doc
Total Pages: 21
8x3-CHANNEL CONSTANT CURRENT LED DRIVER
新竹市科學園區展業一路 9 號 7 樓之 1
SILICON TOUCH TECHNOLOGY INC.
9-7F-1, Prosperity Road I, Science Based Industrial Park,
Hsin-Chu, Taiwan 300, R.O.C.
Fax：886-3-5645626
Tel：886-3-5645656
點晶科技股份有限公司
DM163
SILICON TOUCH TECHNOLOGY INC.
DM163
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
General Description
The DM163 is a LED driver that comprises shift registers, data latches, 8x3-channel
constant current circuitry with current value set by 3 external resistors, and 64 x 256 gray
level PWM (Pulse Width Modulation) function unit. Each channel provides a maximum
current of 60 mA. The grayscale data are separated into BANK0 and BANK1 respectively,
selected by SELBK pin. BANK0 is 6-bits grayscale data and the BNAK1 is 8-bits grayscale
data. Depending on the system requirement, both PWM banks could be utilized jointly to
achieve maximum 8+6 bit grayscale performance. Alternatively, users can choose either
64-graylevel bank or 256-graylevel bank for dot correction, and the remaining bank as
image data.
DM163 could also be constructed as a PWM controller for LED drivers. When VDDH
is connected to VDD, each of the 24 output channels outputs can act as an inverse digital
signal for controlling the LED driver.
Features
24 Output Channels
8 + 6-bits PWM grayscale Control
Constant Current Output: 5mA to 60mA
LED Power Supply Voltage up to 17V
VDD=3V to 5.5V
Varied Output Current Level Set By 3 External Resistors
Serial Shift-In Architecture for Grayscale Data
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Block Diagram
Figure 1. Functional Schematic of Whole Chip
The schematic of DM163 comprises of several fundamental units as shown in
Figure 1. The grayscale data are input onto the DM163 by the SIN pin and transferred
according to the synchronous clock DCK. Meanwhile, in order to separate the data
into two groups, SELBK is designed as a switch control pin. When a sequence of
data is already transferred onto the chip, the LAT_B=”H” is set to convey it into the
comparator unit. Compared with the counter signals, the grayscale data will
determine the PWM control signal to display varied luminance at driver output. The
Rext resistors are able to set diverse output current levels. The detailed schematic
of each channel is shown as Figure 2.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Block Diagram
Figure 2. The Detailed Schematic of Each Channel
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Pin Connection (Top view)
QFP44
Pin No.
NAME
Pin No.
NAME
Pin No.
NAME
Pin No.
NAME
1
SIN
12
IOUT[7]
23
VSS_DR
34
VDD
2
VSS
13
IOUT[8]
24
IOUT[17]
35
SOUT
3
IOUT[0]
14
IOUT[9]
25
IOUT[18]
36
RST_B
4
IOUT[1]
15
IOUT[10]
26
IOUT[19]
37
EN_B
5
IOUT[2]
16
IOUT[11]
27
IOUT[20]
38
SELBK
6
IOUT[3]
17
IOUT[12]
28
IOUT[21]
39
GCK
7
IOUT[4]
18
IOUT[13]
29
IOUT[22]
40
LAT_B
8
IOUT[5]
19
IOUT[14]
30
IOUT[23]
41
DCK
9
IOUT[6]
20
IOUT[15]
31
VDDH[R]
42
REXT[B]
10
VSS_DR
21
IOUT[16]
32
VDDH[G]
43
REXT[G]
11
VSS_DR
22
VSS_DR
33
VDDH[B]
44
REXT[R]
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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QFN40
Pin No.
NAME
Pin No.
NAME
Pin No.
NAME
Pin No.
NAME
1
REXT[R]
11
IOUT[7]
21
IOUT[17]
31
VDD
2
SIN
12
IOUT[8]
22
IOUT[18]
32
SOUT
3
VSS
13
IOUT[9]
23
IOUT[19]
33
RST_B
4
IOUT[0]
14
IOUT[10]
24
IOUT[20]
34
EN_B
5
IOUT[1]
15
IOUT[11]
25
IOUT[21]
35
SELBK
6
IOUT[2]
16
IOUT[12]
26
IOUT[22]
36
GCK
7
IOUT[3]
17
IOUT[13]
27
IOUT[23]
37
LAT_B
8
IOUT[4]
18
IOUT[14]
28
VDDH[R]
38
DCK
9
IOUT[5]
19
IOUT[15]
29
VDDH[G]
39
REXT[B]
10
IOUT[6]
20
IOUT[16]
30
VDDH[B]
40
REXT[G]
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Pin Description
PIN NAME
VDDH (R)
VDDH (G)
VDDH (B)
VDD
VSS
VSS_DR
SIN
SOUT
FUNCTION
QFP pin number QFN pin number
Output protection pins.
31
28
They could be connected independently 32
29
or to LED supplies (VLED).
33
30
Power supply terminal.
34
31
Ground terminal.
2
3
Driver ground
10, 11, 22, 23
Thermal pad
Serial input for grayscale data.
1
2
Serial output for grayscale data.
35
32
Synchronous clock input for serial data 41
38
DCK
transfer. The input data of SIN is
transferred at rising edges of DCK.
If SELBK is H, shift-in date would be
38
35
stored in the 8-bit BANK 1.
SELBK
If SELBK is L, shift-in date would be
stored in the 6-bit BANK 0.
When LAT_B converts from H to L,
40
37
LAT_B
grayscale data in both shift register
banks are latched.
GCK
Clock input for PWM operation.
39
36
44
1
External resistor connected between
REXT and GND for driver current setting. 43
40
R
EXT
(R)
controls
outputs
OUT0,
3,
6,
9,
REXT(R)
42
39
12, 15, 18, 21.
REXT(G)
REXT(G) controls outputs OUT1, 4, 7, 10,
REXT(B)
13, 16, 19, 22.
REXT(B) controls outputs OUT2, 5, 8, 11,
14, 17, 20, 23.
3, 4, 5, 6, 7, 8, 9, 4, 5, 6, 7, 8, 9, 10,
12, 13, 14, 15,16, 11, 12, 13, 14, 15,
IOUT0~23 LED driver outputs.
17, 18, 19, 20,21, 16, 17, 18, 19, 20,
24, 25, 26, 27,28, 21, 22, 23, 24, 25,
29, 30
26, 27
Input terminal of output enable. All
37
34
EN_B
outputs are OFF when EN_B is H.
The IC is initialized when RST_B low. 36
33
There is an internal pull-up on this pin.
This pin couldn’t be floating. Before using
RST_B
the IC, it must be reset first. If each
channel is assigned to drive multiple
LEDs, IC should be reset before each
LED data latch to prevent from flashing.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Maximum Ratings (Ta=25°C, Tj(max) = 140°C)
CHARACTERISTIC
Supply Voltage
Input Voltage
Output Current
Output Voltage
DCK Frequency
GCK Frequency
GND Terminal Current
Power Dissipation
Thermal Resistance
Operating Temperature
Storage Temperature
SYMBOL
RATING
VDD
VIN
IOUT
VOUT
FDCK
FGCK
IGND
PD
Rth(j-a)
Top
Tstg
UNIT
-0.3 ~ 7.0
-0.3 ~ VDD+0.3
60
-0.3 ~ 17
20
20
1440
1.36 ( QFP44); 3.63 (QFN40) (Ta=25°C)
84.42 ( QFP44 ); 31.67 (QFN40)
-40 ~ 85
-55 ~ 150
V
V
mA
V
MHz
MHz
mA
W
℃/W
℃
℃
Recommended Operating Condition
DC Characteristics (Ta = 25°C)
CHARACTERISTIC
Supply Voltage
Output Voltage
Output Current
Input Voltage
SYMBOL
CONDITION
MIN.
VDD
VOUT
IO
IOH
IOL
VIH
VIL
⎯
⎯
3
OUTn
SERIAL-OUT
SERIAL-OUT
⎯
⎯
TYP.
MAX.
UNIT
V
V
mA
0.8 VDD
-0.2
⎯
⎯
⎯
⎯
⎯
⎯
5.5
17
60
2
-2
VDD+0.2
0.2 VDD
⎯
5
⎯
⎯
V
AC Characteristics (VDD = 5.0 V, Ta = 25°C)
CHARACTERISTIC
DCK Frequency
DCK pulse duration
DCK rise/fall time
GCK Frequency
GCK pulse duration
GCK rise/fall time
Set-up Time for SIN
SYMBOL
CONDITION
MIN.
TYP.
MAX.
UNIT
FDCK
twh / twl
tr / tf
Cascade operation
High or low level
⎯
⎯
High or low level
⎯
⎯
15
⎯
1
15
⎯
⎯
⎯
⎯
⎯
⎯
⎯
20
⎯
20
20
⎯
20
MHz
ns
ns
MHz
ns
ns
tsetup(D)
Before DCK rising edge
2
⎯
⎯
ns
twh / twl
tr / tf
FGCK
Hold Time for SIN
thold(D)
After DCK rising edge
3
⎯
⎯
ns
Set-up Time for DCK
tsetup(L)
Before LAT_B falling edge
3
⎯
⎯
ns
tw LAT
⎯
5
⎯
⎯
ns
Set-up Time for LAT_B
Tsetup(G)
Before GCK rising edge
13
⎯
⎯
ns
Set-up Time for SELBK
Tsetup(S)
Before DCK rising edge
5
⎯
⎯
ns
Hold Time for SELBK
Thold(S)
After DCK rising edge
1
⎯
⎯
ns
LAT_B Pulse Width
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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AC Characteristics (VDD = 3.3 V, Ta = 25°C)
CHARACTERISTIC
DCK Frequency
DCK pulse duration
DCK rise/fall time
GCK Frequency
GCK pulse duration
GCK rise/fall time
RST_B pulse duration
Set-up Time for SIN
SYMBOL
CONDITION
MIN.
TYP.
MAX.
UNIT
FDCK
⎯
15
⎯
1
15
⎯
⎯
⎯
⎯
⎯
⎯
⎯
20
⎯
20
20
⎯
20
MHz
ns
ns
MHz
ns
ns
twrst_b
Cascade operation
High or low level
⎯
Cascade operation
High or low level
⎯
Low level
100
⎯
⎯
ns
tsetup(D)
Before DCK rising edge
2
⎯
⎯
ns
twh / twl
tr / tf
FGCK
twh / twl
tr / tf
Hold Time for SIN
thold(D)
After DCK rising edge
5
⎯
⎯
ns
Set-up Time for DCK
tsetup(L)
Before LAT_B falling edge
5
⎯
⎯
ns
tw LAT
⎯
7
⎯
⎯
ns
Set-up Time for LAT_B
Tsetup(G)
Before GCK rising edge
23
⎯
⎯
ns
Set-up Time for SELBK
Tsetup(S)
Before DCK rising edge
9
⎯
⎯
ns
Hold Time for SELBK
Thold(S)
After DCK rising edge
1
⎯
⎯
ns
UNIT
LAT_B Pulse Width
Electrical Characteristics (VDD = 5.0 V, Ta = 25°C unless otherwise noted)
CHARACTERISTIC
SYMBOL
CONDITION
MIN.
TYP.
MAX.
Input Voltage “H” Level
Input Voltage “L” Level
Output Leakage Current
VIH
VIL
Ileak
⎯
⎯
0.8 VDD
GND
VDD
0.2 VDD
± 0.1
Output Voltage ( SOUT)
VOL
VOH
4.8
⎯
⎯
⎯
⎯
⎯
⎯
V
Output Current
(Channel-Channel)
IOL1
⎯
±3
±5
%
Output Current
(Chip-Chip)
IOL3
⎯
±4
± 10
%
Supply Voltage
Regulation
% / VDD
⎯
⎯
2
%/V
⎯
⎯
42.2
43.4
1
1.5
VOH = 17 V
IOL = 2 mA
IOH = -2 mA
VOUT = 1.0V
REXT = 2.6kΩ
VOUT = 1.0V
REXT = 2.6kΩ
REXT = 3kΩ
IDD, analog VDD=5V, REXT = 1kΩ
Supply Current1
1
IDD, digital VDD=5V, Cload=2pF,
DCK=GCK=1MHz
⎯
⎯
0.2
V
uA
mA
ILED excluded.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Switching Characteristics (VDD = 3.3V, Ta = 25°C)
CHARACTERISTIC
SOUT Rise time
SOUT Fall time
SOUT Propagation delay
(L to H)
SOUT Propagation delay
(H to L)
IOUT Rise time
IOUT Fall time
IOUT Propagation delay
After GCK or EN_B
(L to H / OFF to ON)
IOUT Propagation delay
After GCK or EN_B
(H to L / ON to OFF)
SYMBOL
MIN.
TYP.
MAX.
UNIT
⎯
⎯
4
5
ns
4
5
ns
⎯
24
30
ns
tpHL
⎯
20
25
ns
tor
tof
⎯
⎯
15
18
ns
20
25
ns
⎯
35
37
ns
⎯
30
35
ns
MIN.
TYP.
MAX.
UNIT
⎯
⎯
4
5
ns
4
6
ns
⎯
19
25
ns
tpHL
⎯
17
23
ns
tor
tof
⎯
⎯
4
6
ns
15
18
ns
⎯
26
30
ns
⎯
20
25
ns
tor
tof
tpLH
tpLH
tpHL
CONDITION
VIH=VDD
VIL=GND
REXT=3KΩ
CL=13pF
VIH=VDD
VIL=GND
REXT=3KΩ
VLED=3.3V
RL=120Ω
CL=33pF
Switching Characteristics (VDD = 5.0V, Ta = 25°C)
CHARACTERISTIC
SOUT Rise time
SOUT Fall time
SOUT Propagation delay
(L to H)
SOUT Propagation delay
(H to L)
IOUT Rise time
IOUT Fall time
IOUT Propagation delay
After GCK or EN_B
(L to H / OFF to ON)
IOUT Propagation delay
After GCK or EN_B
(H to L / ON to OFF)
SYMBOL
tor
tof
tpLH
tpLH
tpHL
CONDITION
VIH=VDD
VIL=GND
REXT=3KΩ
CL=13pF
VIH=VDD
VIL=GND
REXT=3KΩ
VLED=5.0V
RL=120Ω
CL=33pF
Input Capacitance (Ta = 25°C)
INPUT NODE
SIN
DCK
GCK
LAT_B
EN_B
RST_B
SELBK
SYMBOL
CONDITION
MIN.
TYP.
MAX.
UNIT
CSIN
CDCK
CGCK
CLAT_B
CEN_B
CRST_B
CSELBK
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
3
3
3
3
3
3
⎯
⎯
⎯
⎯
⎯
⎯
⎯
pF
pF
pF
pF
pF
pF
pF
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
3
Version: A.004
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Parameter Measurement
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Serial Shift-In Luminance Data (Shift Register Architecture)
Figure 3. Serial Shift-In Luminance Data Structure
This serial shift (shift register) architecture follows a FIFO (first-in first-out) formate.
The MSB (Most Significant Bit), both 8th bit and 6th bit at the 23rd channel, is the first data
bit that shift into the driver. And the LSB (Least Significant Bit) data, the 1st bit at the 1st
channel, is the last bit in the data sequence. Furthermore, the SELBK control signal is
set to determine in which bank the data are placed.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
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Timing Diagram
Figure 4. Timing diagram when 6bits are correction terms and 8bits are image terms
When 6 bits are correction terms and 8 bits are image terms (as shown in Fig 4), users
must set the controller signals according to below sequences:
(1) Set SELBK=L (Bank 0) and begin shift in 6 bits correction data
(2) Set LAT_B=H to update the correction data after all correction data are in place
(3) Set SELBK=H (Bank 1) and begin shift in 8 bits image data
(4) Set LAT_B=H to update image data after 8 bit image are all in place. DM163 will utilize
the 8 bits image data to determine the grayscale of each channel
(5) Repeat steps (3) and (4)
Figure 5. Timing diagram when both 6bits and 8bits are used as image terms
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
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When both 6 bits and 8 bits bank are used for images terms (As shown in Fig. 5), users should set
the controller signal in accordance to the following:
(1) Set SELBK=L (Bank 0) and begin shift in 6 bits correction data
(2) Set SELBK=H (Bank 1) and begin shift in 8 bits image data
(3) Set LAT_B=H to update image data after both 8 bit and 6 bit image data are all inplace.
(4) Repeat steps (1) to (3)
Timing Diagram
Figure 6. Detailed timing diagram of data transference
Figure 6 shows the detailed timing diagram of data transference. The synchronous
clock DCK is designed to trigger at the positive edge. And the LAT_B triggers at the
negative edge. To completely fill up both 6 bit and 8 bit shift register, a total of 336 DCK
count is required (144 DCK for 6bits mode and 192 DCK for 8bits mode). Example
depicted in figure 6 shows 6’b001111 data at 6bits bank and 8’b00001111 at 8bits bank
respectively. Therefore, the average output current is (15/256) x (15/64) x Iout.
Formula I (out, avg)= (BANK 1/256) x (BANK 0/64) x Iout, provides a useful way to
calculate the input data and the output current. Iout is the reference current value shown
in figure 12. Users could utilize the formula Iout =47*Vrext / Rext to get an approximate
value of Iout.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Particular Phenomenon
DM163 incorporates a different PWM counter, as described in Figure 2, hence its output
waveform demonstrate a very different characteristics compare to conventional PWM counter.
(1) Nonconsecutive counter
The non-consecutive PWM counter incorporate by DM163 demonstrated a waveform pattern
similar to Figure 7. Its waveform is spread-out into each PWM cycle, resulting lots of intermediate
pulses during each PWM cycle. In Fig 7, if all the intermediate pulses are added up, it would
equal to 50% luminance which is the same as the conventional method. By spreading out the
PWM pulses, this approach can help prevent LED from flickering in lower grayscale situation.
Figure 7. An Example of Nonconsecutive PWM Signal
(2) 8+6 bits Comparator
The comparator illustrated in Fig 2 is another one of the unique designs in DM163. The
comparator’s output will be “H” only when value at “+” is larger then the value at “-“ (in other
word, comparator will be “L” when value in“+” equals to value in “-“ or value in “+” is less than
value in “-“). Only when both 8 bit and 6 bit comparator are “H” will there be current in the output
channel.
Due to this unique comparator design, DM163 exhibit a very distinct output characters in
two certain scenario. In the first case, DM163 output will always be “OFF” when either one of the 8
bit or 6 bit bank is filled with 0. In 2nd scenario, when all bit value at both 8 bit and 6 bit bank are
loaded “H”, DM163 output will exhibit its highest luminance value (but not 100% luminance value).
Due to the nature of comparators design, PWM control signal will be zero in the condition of 8bits
counter=8’bFF or 6bits counter=6’b3F. Consequently, the PWM control signal will be 0 for
28+26+1 GCK rather than always high.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
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Application Diagram
Figure 10. Application Diagram
Note:
1. The RST_B should be connected to controller to initialize the IC.
2. VDDH_R/G/B should be connected to Vled_R/G/B respectively. The Vled_R/G/B are
power supply of Red/Green/Blue LEDs.
3. VSS_DR is the ground pin of LEDs. And it could be connected to VSS.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
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Application Diagram (Cont.)
Figure 11. Application Diagram of anode-common LED
Driver Output Current (VDD = 3.3V and 5.0V, Ta = 25°C)
Figure 12. REXT vs. Output Current
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
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Driver Output Current (Cont.)
Figure 13. Vout vs. Output Current
The curve shown in Fig 12 is the average result of a large number of samples. Due to
chip-to-chip variation in Vrext, users may observe a different Iout-Vout curve than above.
However, the curves of VDD=5v and VDD=3.3v should be close to each other when the same chip
is tested because DM163 utilizes a negative feedback circuit to keep the average voltage of Vrext
pins close to constant, regardless of the VDD. Therefore, the Iout-to-Rext curve should not be
seriously influenced by VDD variation.
The Fig 13 illustrates the relation between Vout and Iout. Iout is the constant value when Vout
exceeds the voltage of turning point. In other words, Iout is independent of the fluctuation of Vout
if IC is biased in this condition.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
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Package Outline Dimension
QFP44
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
Page 18
點晶科技股份有限公司
DM163
SILICON TOUCH TECHNOLOGY INC.
QFN40
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
Page 19
點晶科技股份有限公司
DM163
SILICON TOUCH TECHNOLOGY INC.
The products listed herein are designed for ordinary electronic applications, such
as electrical appliances, audio-visual equipment, communications devices and
so on. Hence, it is advisable that the devices should not be used in medical
instruments, surgical implants, aerospace machinery, nuclear power control
systems, disaster/crime-prevention equipment and the like. Misusing those
products may directly or indirectly endanger human life, or cause injury and
property loss.
Silicon Touch Technology, Inc. will not take any responsibilities regarding the
misusage of the products mentioned above. Anyone who purchases any
products described herein with the above-mentioned intention or with such
misused applications should accept full responsibility and indemnify. Silicon
Touch Technology, Inc. and its distributors and all their officers and employees
shall defend jointly and severally against any and all claims and litigation and all
damages, cost and expenses associated with such intention and manipulation.
8x3-CHANNEL CONSTANT CURRENT LED DRIVERS
Version: A.004
Page 20