TECHNICAL DATA Green Mode PWM Controller IK3401 Description The IK3401 is a green mode PWM controller. It is specially designed for DVDP, STB and LCD monitor application. To minimize standby power consumption, a green-mode function provides off-time modulation to continuously decrease the switching frequency at light-load conditions. Under zero-load conditions, the power supply enters burstmode. To avoid acoustic noise problem, the minimum PWM frequency set above 20KHz. This green-mode function enables the power supply to easily meet international power conservation requirements. To further reduce power consumption, IK3401 is manufactured by using the HV-CMOS process. This allows the lowest start-up current around 14uA, and the operating current is only 4mA. As a result, large start-up resistance can be used. The maximum power can be limited constantly, regardless of the line voltage change using power limit function. The switching frequency is programmable or internally fixed to be 65kHz. IK3401 integrates frequency modulation technique internally. The frequency jittering function helps reduce EMI emission of a power supply with minimum line filters. Also, its built-in synchronized slope compensation achieves stable peak-current-mode control. IK3401 provides many protection functions. In addition to cycle-by-cycle current limiting, the internal open-loop protection circuit ensures safety should an open loop or output short-circuit failure occurs. PWM output is disabled till VDD drops below the UVLO lower limit. Then, the controller starts up again. As long as VDD exceeds about 24V, the internal OVP circuit is triggered. For OVP and OTP, the protection mode can be chosen to be latch off or auto recovery. IK3401 is available in an 8-pin DIP or SOP package. Features · · · · · · · Green-mode PWM Control Low Start-Up Current (Typ. 14uA) Low Operating Current (Typ. 4mA) Programmable PWM frequency with Frequency Jittering Peak-current-mode Control Cycle-by-Cycle Current Limiting Synchronized Slope Compensation · · · · · · · · · Leading-Edge Blanking Constant Output Power Limit Totem Pole Output with Soft Driving VDD Over Voltage Protection (OVP) 150°C OTP with Hysteresis Internal Latch Circuit (OVP, OTP) Internal Open-loop Protection VDD Under-voltage Lockout (UVLO) GATE Output Maximum Voltage Clamp (18V) Applications · Notebook Power Adapters · DVD-P, STB, LCD Monitor Power · Open-Frame SMPS Rev 00 IK3401 Pin Configuration Pin 1 2 3 4 5 6 7 8 Symbol GND FB VIN RI NC SENSE VDD GATE Pin Description Ground Feedback Start-up Input Reference Setting Current Sense IC Power Supply Gate Drive Output Rev 00 IK3401 Block diagram Absolute Maximum Ratings (Ta = 25°C, unless otherwise specified) Symbol VDD VIN VFB VSENSE VRI PD RΘ J-A TJ TSTG TL HBM MM Parameter Supply Voltage Input Terminal Input Voltage to FB Pin Input Voltage to SENSE Pin Input Voltage to RI Pin Power Dissipation at TA < 50°C DIP SOP Thermal Resistance Junction-Air DIP SOP Operating Junction Temperature Storage Temperature Range Lead Temperature ESD Capability, HBM Model ESD Capability, MM Model Value 25 25 -0.3 to 7V -0.3 to 7V -0.3 to 7V 800 400 82.5 141 -40 to 125 -50 to 150 260 3.0 250 Unit V V V V V mW °C °C °C °C kV V Rev 00 IK3401 Electrical Characteristics (VDD = 15V, TA = 25°C, unless noted) VDD Section Symbol VOP VTH-ON VTH-OFF IDD-ST IDD-OP VDD-OVP TVDD-OVP Parameter Continuously Operating Voltage Turn-on Threshold Voltage Turn-off Voltage Start-up Current Operating Supply Current VDD Over Voltage Protection VDD OVP Debounce Time Test Condition Min. Typ. Max. 22 Unit V 15.5 16.5 17.5 V 9.5 10.5 14 4 11.5 30 5 V uA mA 23.2 24.2 25.2 V Gate Open 100 usec RI Section Symbol Parameter RINOR RI Operating Range Max. RI value for Protection Min. RI value for Protection RIMAX RIMIN Test Condition Min. Typ. 15.5 Max. Unit 36 kΩ 230 kΩ 10 kΩ Oscillator Section Symbol FOSC TJTR FOSC-G-MIN FDV FDT Parameter Normal PWM Frequency Center Frequency Jitter Range Jittering Period Min. RI value for Protection Frequency Variation vs VDD Deviation Frequency Variation vs Temp. Deviation Test Condition RI = 26kΩ RI = 26kΩ RI = 26kΩ Min. Typ. Max. Unit 62 65 68 kHz ±3.7 3.9 18 ±4.2 4.4 22 ±4.7 4.9 25 5 kHz ms kHz % 5 % Rev 00 IK3401 Feedback Input Section Symbol Parameter AV FB Input to Current Comparator Attenuation Input Impedance Output High Voltage FB open-loop trigger level FB open-loop Protection Delay Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage Burst Mode Test Frequency Zero Duty FB Current ZFB VFB-OPEN VFB-OLP tD-OLP VFB-N VFB-G FG-TEST IFB-ZDC Test Condition FB Pin open Min. Typ. Max. Unit 1/4.5 1/4 1/3.5 V/V 4 5.5 7 kΩ V 5 5.4 V/V RI = 26kΩ 50 56 62 ms RI = 26kΩ 1.9 2.1 2.3 V RI = 26kΩ VFB-N -0.6 VFB-N 0.5 VFB-N 0.4 V VFB-G+20mV FOSC-G-MIN +0.5 kHz 1.5 mA Max. Unit kΩ V Current Sense Section Symbol ZSENSE VSTHFL VSTHVA DCYSAW tPD tLED Parameter Input Impedance Current Limit Flatten Threshold Voltage Current Limit Valley Threshold Voltage Duty Cycle of SAW Limit Propagation Delay to GATE Output Leading Edge Blanking Time Test Condition Min. 0.85 Typ. 12 0.9 0.95 VSTHFL -VSTHVA 0.22 V Max. Duty Cycle 45 % RI=26 kΩ 150 200 ns 270 350 ns RI=26 kΩ 200 Rev 00 IK3401 Gate Section Symbol DCYMAX tr Parameter Maximum Duty Cycle Output Voltage Low Output Voltage High Rising Time tf Falling Time IO Peak Output Current Gate Output Clamping Voltage VGL VGH VCLAMP Test Condition VDD=15V, IO=50mA VDD=12V, IO=50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=15V, GATE=6V VDD=23V Min. 80 Typ. 85 Max. 90 Unit % 1.5 V 8 V 150 250 350 ns 30 50 90 ns 230 mA 18 19 V Max. Unit °C Over Temperature Protection (OTP) Symbol Temp-Off TempRestart Parameter Protection Junction Temperature*1 Restart Junction Temperature*2 Test Condition Min. Typ. 150 130 °C *1) When activated, the output is disabled and the latch is turned off. *2) This is the threshold temperature for enabling the output again and resetting the latch, after over temperature protection has been activated. Typical Characteristics Rev 00 IK3401 Rev 00 IK3401 OPERATION DESCRIPTION Start-Up Current The typical start-up current is only 14uA. This allows a high resistance, low-wattage start-up resistor to be used, to minimize power loss. A 1.5MOhm, 0.25W, start-up resistor and a 10uF/25V VDD hold-up capacitor would be sufficient for an AC/DC adapter with a universal input range. Operating Current The required operating current has been reduced to 4mA. This results in higher efficiency and reduces the VDD hold-up capacitance requirement. Green-Mode Operation. The proprietary green-mode function provides off-time modulation to continuously decrease the PWM frequency under light-load conditions. To avoid acoustic-noise problem, the minimum PWM frequency set above 22KHz. This green-mode function dramatically reduces power consumption under light-load and zeroload conditions. Power supplies using a IK3401 Controller can easily meet even the most restrictive international regulations regarding standby power consumption. Oscillator Operation A resistor connected from the RI pin to GND pin generates a constant current source for the IK3401 controller. This current is used to determinate the center PWM frequency. Using a 26KOhm resistor RI results in a corresponding 65KHz PWM frequency. The relationship between RI and switching frequency is: Leading Edge Blanking Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is build in. During this blanking period, the current-limit comparator is disabled, and it cannot switch off the gate drive. Under-Voltage Lockout (UVLO) The turn-on/turn-off thresholds are fixed internally at 16.5V/10.5V. To enable a IK3401 controller during start-up, the hold-up capacitor must first be charged to 16.5V through the start-up resistor. The hold-up capacitor will continue to supply VDD before energy can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 1035V during this start-up process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply VDD during start-up. Gate Output/Soft Driving The IK3401 BiCMOS output stage is a fast totem pole gate driver. Cross-conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode in order to protect the power MOSFET transistors from any harmful overvoltage gate signals. A soft driving waveform is implemented to minimize EMI. Slope Compensation The sensed voltage across the current sense resistor is used for peak-current-mode control and cycle-by-cycle current limiting. The The range of the PWM oscillation frequency build-in slope compensation function improves power supply stability and prevents peakIs designed as 47KHz~109KHz. current-mode control from causing subharmonic oscillations. Within every switching IK3401 also integrates frequency hopping cycle, the IK3401 controller produces a function internally. The frequency variation positively sloped, synchronized ramp signal. ranges from around 62KHz to 68KHz for a center frequency 65KHz. The frequency hopping function helps reduce EMI emission of a power supply with minimum line filters. Rev 00 TECHNICAL DATA Constant Output Power Limit When the SENSE voltage, across the sense resistor Rs, reaches the threshold voltage, around 0.85V, the output GATE drive will be turned off after a small delay tpd. This delay will introduce an additional current proportional to tpd*Vin/Lp. Since the delay is nearly constant regardless of the input voltage Vin . Higher input voltage will result in a larger additional current and hence the output power limit is also higher than under low input line voltage. To compensate this variation for wide AC input range, a sawtooth power-limiter is designed to solve the unequal power-limit problem. The power limiter is designed as positive ramp signal and is fed to the inverting input of the OCP comparator. This results in a lower current limit at high-line inouts than at low-line inputs. VDD Over-voltage Protection VDD over-voltage protection has been built in to prevent damage voltage conditions. When the voltage VDD exceeds the internal threshold due to abnormal conditions, PWM output wil be latched off. Over-voltage conditions are usually caused by open feedback loops. prevent the power supply from overheating due to over loading conditions. Protection Latch Circuit For the IK3401 family, the built-in latch function provides a versatile protection feature that does not require external components. To reset the latch circuit, it is necessary to disconnect the AC line voltage of the power supply. Over Temperature Protection IK3401 has internal function of over temperature protection. Noise Immunity Noise from the current sense or the control signal may cause significant puls width jitter, particulary in continuousconduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. The designer should avoiding long PCB traces and component leads. Compensation and filter components should be located near the IK3401. Finally, increasing the power-MOS gate resistance is advised. Limited Power Control The FB voltage will increase every time the output of the power supply is shorted or over-loaded. If the FB voltage remains higher than a built-in threshold for longer than td-olp, PWM output will then be turned off. As PWM output is turned off, the supply voltage VDD will also begin decreasing. When VDD goes below the turn-off threshold (eg, 10.5V) the controller will be totally shut down. VDD will be charged up to the turn-on threshold voltage of 16.5V through the start-up resistor until PWM output is restarted. This protection feature will continue to be activated as long as the over-loading condition persists. This will Rev 00 IK3401 REFERENCE APPLICATION Circuit BOM Rev. 00 IK3401 Package Outline Dimension N SUFFIX PLASTIC DIP (MS – 001BA) A Dimension, mm 5 8 B 1 4 F C -T- SEATING PLANE G M K 0.25 (0.010) M J H D MIN MAX A 8.51 10.16 B 6.1 7.11 5.33 C L N Symbol T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.2 0.36 N 0.38 D SUFFIX SOIC (MS - 012AA) Dimension, mm A 8 5 B H 1 G P 4 R x 45 C -TD K SEATING PLANE J F 0.25 (0.010) M T C M NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. M Symbol MIN MAX A 4.8 5 B 3.8 4 C 1.35 1.75 D 0.33 0.51 F 0.4 1.27 G 1.27 H 5.72 J 0° 8° K 0.1 0.25 M 0.19 0.25 P 5.8 6.2 R 0.25 0.5 Rev. 00