APT43M60B2 APT43M60L 600V, 45A, 0.15Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-Max® TO-264 APT43M60B2 APT43M60L D Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 45 Continuous Drain Current @ TC = 100°C 28 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1200 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 21 A 1 160 Thermal and Mechanical Characteristics Min Characteristic Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 780 RθJC Junction to Case Thermal Resistance 0.16 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range 150 °C Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight 300 0.22 oz 6.2 g 10 in·lbf 1.1 N·m Mounting Torque ( TO-264 Package), 4-40 or M3 screw MicrosemiWebsite-http://www.microsemi.com 04-2009 TL Torque -55 Rev D TJ,TSTG °C/W 0.11 050-8070 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter VBR(DSS) Drain-Source Breakdown Voltage ΔVBR(DSS)/ΔTJ Breakdown Voltage Temperature Coefficient RDS(on) Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ΔVGS(th)/ΔTJ IGSS Gate-Source Leakage Current Dynamic Characteristics Symbol Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance 3 VDS = 600V TJ = 25°C VGS = 0V TJ = 125°C Typ Max 0.57 0.13 4 -10 0.15 5 100 500 ±100 VGS = ±30V Unit V V/°C Ω V mV/°C µA nA TJ = 25°C unless otherwise specified Parameter gfs 600 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Min VGS = 10V, ID = 21A 3 IDSS Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA APT43M60B2_L Min Test Conditions VDS = 50V, ID = 21A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 42 8590 90 800 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 420 VGS = 0V, VDS = 0V to 400V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tr td(off) tf Current Rise Time Turn-Off Delay Time 220 215 45 90 48 55 145 44 VGS = 0 to 10V, ID = 21A, VDS = 300V Resistive Switching VDD = 400V, ID = 21A RG = 4.7Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge dv/dt Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min Typ D Max Unit 45 A G 160 S ISD = 21A, TJ = 25°C, VGS = 0V ISD = 21A 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 21A, di/dt ≤1000A/µs, VDD = 400V, TJ = 125°C 1 700 15.2 V ns µC 8 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 5.44mH, RG = 4.7Ω, IAS = 21A. 04-2009 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -8.32E-8/VDS^2 + 3.49E-8/VDS + 1.30E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) 050-8070 Rev D Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT43M60B2_L 70 160 V GS = 10V T = 125°C ID, DRIAN CURRENT (A) TJ = 25°C 80 60 40 50 6V 40 30 20 5.5V 10 TJ = 150°C TJ = 125°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 5V 4.5V 0 Figure 2, Output Characteristics 160 NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX. VGS = 10V @ 21A 250µSEC. PULSE TEST @ <0.5 % DUTY CYCLE 140 2.5 ID, DRAIN CURRENT (A) 2.0 1.5 1.0 0.5 120 100 TJ = -55°C 80 TJ = 25°C 60 TJ = 125°C 40 20 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 80 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 Ciss 10,000 70 TJ = -55°C C, CAPACITANCE (pF) 60 TJ = 25°C 50 TJ = 125°C 40 30 20 1000 Coss 100 Crss 10 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 10 20 30 40 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 100 200 300 400 500 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 120V 10 VDS = 300V 8 6 VDS = 480V 4 2 0 0 160 ID = 21A 14 0 10 50 50 100 150 200 250 300 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 140 120 100 TJ = 25°C 80 60 TJ = 150°C 40 20 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 04-2009 0 ISD, REVERSE DRAIN CURRENT (A) 0 Rev D RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 3.0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 050-8070 ID, DRAIN CURRENT (A) 100 20 gfs, TRANSCONDUCTANCE GS 60 120 0 = 7&8V V J TJ = -55°C 140 APT43M60B2_L 200 200 100 100 IDM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) IDM 10 13µs Rds(on) 100µs 1ms 1 10ms 0.1 13µs 100µs Rds(on) 1ms TJ = 150°C TC = 25°C 1 10ms Scaling for Different Case & Junction 100ms Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 DC line 100ms TJ = 125°C TC = 75°C 1 10 DC line 0.1 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area C 1 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 0.18 D = 0.9 0.14 0.12 0.7 0.10 0.5 0.08 Note: PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.16 0.06 t1 0.3 t2 t1 = Pulse Duration 0.04 t Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC SINGLE PULSE 0.1 0.02 0.05 0 10-5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration T-MAX® (B2) Package Outline 1.0 TO-264 (L) Package Outline e3 100% Sn Plated 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 15.49 (.610) 16.26 (.640) 19.51 (.768) 20.50 (.807) 3.10 (.122) 3.48 (.137) 5.38 (.212) 6.20 (.244) 5.79 (.228) 6.20 (.244) Drain Drain 20.80 (.819) 21.46 (.845) 04-2009 4.50 (.177) Max. 0.40 (.016) 0.79 (.031) 25.48 (1.003) 26.49 (1.043) 2.87 (.113) 3.12 (.123) 2.29 (.090) 2.69 (.106) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055) 19.81 (.780) 21.39 (.842) Gate Drain Rev D 050-8070 5.45 (.215) BSC 2-Plcs. These dimensions are equal to the TO-247 without the mounting hole. Dimensions in Millimeters and (Inches) Gate Drain Source Source 2.21 (.087) 2.59 (.102) 2.29 (.090) 2.69 (.106) 0.48 (.019) 0.84 (.033) 2.59 (.102) 3.00 (.118) 0.76 (.030) 1.30 (.051) 2.79 (.110) 3.18 (.125) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters and (Inches) Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.