UC5171 Octal Line Driver FEATURES DESCRIPTION • Eight Single-Ended Line Drivers in One Package • Digital Selection of High Mode EIA232E/CCITT V.28 only, and Low Mode EIA232E/V.28 & EIA423A/CCITT V.10/X.26 The UC5171 is a single-ended octal line driver designed to meet both standard modem control applications (EIA232E/V.28), and long line drive applications (EIA423A/V.10/X.26). The slew rate for all 8 drivers is controlled by a single external resistor. The slew rate and output levels in Low Mode are independent of the power variations. • Single External Resistor Controls Slew Rate • Wide Supply Voltage Range • Tri-State Outputs • Output Short-Circuit Protection • Low Power Consumption • 2kV ESD Protection on all Pins Mode selection is accomplished by the select pin Ms logic “low” for low output mode (EIA232E/V.28 & EIA423A/V.10) or pin Ms logic “high” for high mode (EIA232E/V.28). High mode should only be used to drive adapters that take power from the control lines, or applications using high threshold receivers. ABSOLUTE MAXIMUM RATINGS (Note 1) V+ (Pin 20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V V- (Pin 11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15V PLCC Power Dissipation, TA = 25°C (Note 2) . . . . . . . . . . . . . . . . . . 1000 mW DIP Power Dissipation, TA = 25°C (Note 2) . . . . . . . . . . . . . . . . . . . . 1250 mW Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.5V to +7V Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -12V to +12V Slew Rate Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2k to 10kΩ Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Note 1: All voltages are with respect to ground, pin 18. Note 2: Consult Packaging section of Databook for thermal limitations and considerations of package. FUNCTIONAL TABLE INPUTS OUTPUTS EN DATA EIA-232E(3) EIA-232E/EIA-423A 0 0 (V+)-3V 5V to 6V 0 1 (V-)+3V -5V to -6V 1 X High Z High Z Note 3: Minimum output swings. CONNECTION DIAGRAMS N PACKAGE (TOP VIEW) 7/95 Q PACKAGE (TOP VIEW) UC5171 DC ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications hold for | V+ | = | V - | = +10V, 0 < TA < +70°C, MS ≤ 0.8V, RSRA = +10k, TA =TJ. PARAMETERS SYMBOL TEST CONDITIONS MIN TYP MAX UNITS POWER SUPPLY REQUIREMENTS V+ Range 9 V- Range 15 -15 V+ Supply Current I+ RL = Infinite En = 0V V- Supply Current I- RL = Infinite En = 0V 25 -42 V -9 V 42 mA -23 mA INPUTS High Level Input Voltage VIH Low Level Input Voltage VIL 2.0 V 0.8 V 40 µA Input Clamp Voltage VIK II = -15 mA High Level Input Current IIH VIH = 2.4V Low Level Input Current IIL VIL = 0.4V VOH VIN = 0.8V RL = Inf. 5.0 5.3 6.0 V En = 0.8V RL = 3k RL = 450 5.0 4.5 5.3 5.2 6.0 6.0 V V VIN = 2.0V RL = Inf. -6.0 -5.3 -5.0 V RL = 3k -6.0 -5.3 -5.0 V RL = 450 -6.0 -5.2 -4.5 V 0.2 0.4 V 7.0 7.6 10 V -1.8 -1.1 0.25 -200 V µA -8.0 OUTPUTS High Level Output Voltage EIA232E (EIA423A) Low Level VOL Output Voltage EIA232E En = 0.8V (EIA423A) Output Balance (EIA423A) VBAL RL = 450 VOH + VOL = VBAL High Level VOH VIN = 0.8V, MS = 2.0V RL = Inf. En = 0.8V RL = 3k 7.0 7.6 10 V -10 -10 -7.7 -7.7 -7.0 -7.0 V V Output Voltage (EIA232E) Low Level Output Voltage VOL Off-State Output Current IOZ VIN = 2.0V, MS = 2.0V RL = Inf. En = 0.8V RL = 3k En = 2.0V, VO = ±6V, MS = 2.0V Short-Circuit Current IOS En = 0V (EIA232E) AC ELECTRICAL CHARACTERISTICS: PARAMETERS Output Slew Rate -100 100 µA VIN = 0V 25 50 mA VIN = 5V 25 40 mA at | V+ | = | V - | = +10V, 0 < TA < +70°C, MS ≤ 0.8V, TA =TJ. SYMBOL TEST CONDITIONS MIN TYP MAX UNITS tR RSRA = 2k 6.65 9.5 12.3 V/µs tF RL = 450, CL = 50pF 6.65 10 12.3 V/µs tR RSRA = 10k 1.33 1.9 2.45 V/µs tF RL = 450, CL = 50pF 1.33 2.2 2.45 V/µs Propagation Output to tHz RSRA = 10k 0.3 1.0 µs High Impedance tLz RL = 450, CL = 50pF 0.5 1.0 µs Propagation High Impedance to tzH RSRA = 10k 6.0 15 µs Output tzL RL = 450, CL = 50pF 7.0 15 µs Output Slew Rate 2 UC5171 AC PARAMETER TEST CIRCUIT AND WAVEFORMS AC CHARACTERISTICS Driver Slew Rate Driver tR & tF (10-90%) EIA-423A Mode APPLICATIONS INFORMATION where t is the transition time from 10% to 90% of the output swing in microseconds. For data rates below 1k bit/s, t may be up to 300 microseconds. Slew Rate Programming Slew rate for the UC5171 is set up by a single external resistor connected between the SRA pin and ground. Slew rate adjustments can be approximated by using the following formula: V⁄ µs = 20 (RSRA in kΩ ) RSRA Output Voltage Programming The UC5171 has two programmable output modes, either a low voltage mode which meets EIA-423A operational specifications, or the high output voltage mode which meets the EIA-232E specifications. The slew rate resistor can vary between 2k and 10kΩ which allows slew rates between 10 to 2.2V/µs, respectively. The relationship between slew rate and RSRA is shown in the typical characteristics. The high output mode provides greater output swings, minimum of 3V below the supply rails, for driving higher, attenuated lines. This mode is selected by connecting the modes select pin, (MS), to a TTL “high” level. The low output mode provides a controlled output swing and is accomplished by connecting the mode select pin, (MS), to a TTL “low level.” Waveshaping of the output lets the user control the level of interference (near-end crosstalk) that may be coupled to adjacent circuits in an interconnection. The recommended output characteristics for cable length and data rates can be found in EIA standard EIA-423A. Approximations of these standards are given by the following equations: EIA Standards The UC5171 meets or exceeds the EIA Standards for EIA-232E and EIA-423A modes of operation except under power down conditions. When powered down with the output attached to an active buss, the UC5171 has the potential to load the bus under transient conditions. Max. Data Rate=300/t (For data rates 1k to 100k bit/s) Max. Cable Length (feet)=100 x t (Max. length 4000 feet) 3 UC5171 APPLICATIONS UC5171 Specific Layout Notes Filter connectors or transzorbs should be used to reduce the RFI/EMI, protecting the system from static (ESD), and electrical overstress (EOS). A filter connector or capacitor will reduce the ESD pulse by 90% typically. A cable dragged across a carpet and connected to a system can easily be charged to over 25,000 volts. This is a metal-tometal contact when the cable is connected to the system (no resistance), currents exceed 80 amps with less than a nanosecond rise time. A transzorb provides two functions, the device capacitance inherently acts as a filter capacitor, and the device clamps the ESD and EOS pulses which would pass through the capacitor and destroy the devices. The recommended transzorb for the UC5171 is P6KEIOCA The UC5171 layout must have bulk bypassing close to the device. Peak slew current is greater than 500mA when all eight drivers slew at once in the same direction. Some applications mount the UC5171 on a bulkhead or isolated plane for RFI/FCC/VDE reasons. If bulk bypassing is not used, the -10V supply may go above -8.5 volts, causing the slew rate control circuit to become unstable. The UC5171 can have output oscillation at 100kHz if the +10V supply is applied before the -10V supply. This has been a problem in some terminal designs where the +10V was developed from the flyback, which can result in a 500ms difference in the application of the supplies at power up. General Layout Notes The drivers and receivers should be mounted close to the system common ground point, with the ground reference tied to the common point to reduce RFI/EMI. *Transzorb is a trademark of General Semiconductor Industries. UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX 603) 424-3460 4 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1999, Texas Instruments Incorporated