MORNSUN B2409XT-W2

B_(X)T-W2 Series
0.25W,FIXED INPUT, ISOLATED & UNREGULATED
SINGLE OUTPUT, SMD DC-DC CONVERTER
multi-country patent protection RoHS
FEATURES
PRODUCT PROGRAM
Single Voltage Output
SMD Package Style
No Heat sink Required
1KVDC Isolation
Temperature Range: -40°C to +85°C
Internal SMD construction
No External Component Required
Industry Standard Pinout
RoHS Compliance
APPLICATIONS
Input
Part
Number
Voltage (VDC)
Output
Efficiency
(%, Typ.)
Current (mA)
Voltage
(VDC)
Max
Min
B0503(X)T-W2
3.3
76
8
62
B0505(X)T-W2
5
50
5
64
Nominal
B0509(X)T-W2
5
Range
4.5-5.5
9
28
3
65
B0512(X)T-W2
12
21
2
67
B0515(X)T-W2
15
17
2
66
B1205(X)T-W2
5
50
5
65
B1209(X)T-W2
9
28
3
64
B1212(X)T-W2
12
21
2
63
12
10.8-13.2
specially
B1215(X)T-W2
15
17
2
64
designed for applications where a group of
B2405(X)T-W2
5
50
5
60
polar power supplies are isolated from the
B2409(X)T-W2
9
28
3
61
B2412(X)T-W2
12
21
2
63
B2415(X)T-W2
15
17
2
65
The
B_(X)T-W2
Series
are
input power supply in a distributed power
supply system on a circuit board.
These products apply to:
1) Where the voltage of the input power
24
21.6-26.4
Note: The B_XT-W2 series have no 3,6,7 pin. For example B0505XT-W2.
supply is fixed (voltage variation ≤ ±10%);
2) Where isolation is necessary between
input
and
output
(isolation
voltage
≤1000VDC);
3) Where the regulation of the output voltage
and the output ripple noise are not
ISOLATION SPECIFICATIONS
Item
Test Conditions
Min
Typ.
Max
Units
Isolation voltage
Tested for 1 minute and 1mA max
1000
VDC
Isolation resistance
Test at 500VDC
1000
MΩ
demanding.
Such as: purely digital circuits, ordinary low
OUTPUT SPECIFICATIONS
frequency analog circuits, and IGBT power
Item
device driving circuits.
Output power
Line regulation
Test Conditions
Min
Typ.
B0505(X )T-W2
Ra ted Power
P ackage Styl e
Output Vol tag e
Inpu t Vol tag e
P ro duct Se ri es
MORNSUN Science& Technology co.,Ltd.
Address: 2th floor 6th building, Huangzhou
Industrial District, Guangzhou, China
Tel: 86-20-38601850
Fax:86-20-38601272
Http://www.mornsun-power.com
MORNSUN reserves the copyright
Load regulation
15
20
10% to 100% load (5V output)
12.8
15
10% to 100% load (9V output)
8.3
10
10% to 100% load (12V output)
6.8
10
6.3
10
10% to 100% load (15V output)
Output voltage accuracy
%
See tolerance envelope graph
Temperature drift
100% full load
Output ripple &Noise*
20MHz Bandwidth
50
Full load, nominal input(24V input)
500
Full load, nominal input (others input)
110
Switching frequency
W
±1.2
For Vin change of 1%(Others output)
MODEL SELECTION
Units
±1.5
For Vin change of 1%(3.3V output)
10% to 100% load (3.3V output)
Max
0.25
0.03
%/°C
75
mVp-p
KHz
*Test ripple and noise by “parallel cable” method. See detailed operation instructions at Testing of Power Converter
section, application notes.
Note:
1. All specifications measured at TA=25°C, humidity<75%, nominal input voltage and rated output load unless
otherwise specified.
2. See below recommended circuits for more details.
Specifications subject to change without notice.
B_(X)T-W2
A/1-2008
Page 1 of 2
APPLICATION NOTE
COMMON SPECIFICATION
Item
Test Conditions
Min
Typ.
Max
Units
95
%
Storage humidity
Operating temperature
-40
85
Storage temperature
-55
125
Temp. rise at full load
15
Lead temperature
and reliably, During operation, the minimum output
°C
25
1.5mm from case for 10 seconds
this product should never be operated under
please connect a resistor with proper resistance at
Free air convection
Case material
load is not less than 10% of the full load, and that
no load! If the actual output power is very small,
260
Cooling
Requirement on output load
To ensure this module can operate efficiently
the output end in parallel to increase the load.
Plastic(UL94-V0)
Short circuit protection*
1
MTBF
3500
Weight
s
Recommended circuit
If you want to further decrease the input/output
K hours
ripple, an “LC” filtering network may be connected
g
to the input and output ends of the DC/DC
1.35
converter, see (Figure 1).
*Supply voltage must be discontinued at the end of short circuit duration.
L
TYPICAL CHARACTERISTICS
+Vo
Vin
Cout
DC DC
Cin
GND
0V
(Figure 1)
It should also be noted that the inductance and
the frequency of the “LC” filtering network should
be staggered with the DC/DC frequency to avoid
mutual interference. However, the capacitance of
the output filter capacitor must be proper. If the
Operating Temp.(oC)
capacitance is too big, a startup problem might
arise. It’s not recommended to connect any
RECOMMENDED REFLOW SOLDERING PROFILE
260 C
250
Temperature ( o C)
external capacitor in the application field.
o
1 0 S ec M ax
Output Voltage Regulation and Over-voltage
Protection Circuit
The simplest device for output voltage
22 0o C
200
150
regulation,
90 Sec Max
(>220 o C )
100
or output end in series (Figure2).
4.13
(0.163)
6.25
(0.246)
6.00
(0.236)
B_T-W2
0.60 0.05
(0.024 0.002)
7.50
(0.295)
11.20
(0.441)
A
0.3
(0.012)
0.50 (0.020)
1.35
(0.053)
B_(X)T-W2
GND
8 7 6 5
8
5
1 2 3 4
1 2
4
1.00
(0.039)
(Top view)
7.19
(0.283)
GND
0V
RECOMMENDED FOOTPRINT
Top view,grid:2.54*2.54mm(0.1*0.1inch)
2.00
(0.079)
6.76
(0.266)
1.85
(0.073)
+Vout
REG
DC DC
First Angle Projection
2.54
0.25
(0.100) (0.100)
2.54 0.10
(0.100 0.004)
Vin
。
5.00
MORNSUN reserves the copyright
FOOTPRINT DETAILS
Pin Function(T) Function(XT)
1
GND
GND
2
Vin
Vin
4
0V
0V
5
+Vo
+Vo
NC
No Pin
3,6,7
8
NC
NC
NC:No Connection
+Vout
REG
Vin
12.70 (0.500)
7.62
(0.300)
over-current
Time ( s ec . )
OUTLINE DIMENSIONS & FOOTPRINT DETAILS
(Side view)
and
overheat protection that is connected to the input
50
0
over-voltage
protection is a linear voltage regulator with
DC DC
0V
(Figure2)
Overload Protection
Under normal operating conditions, the output
circuit of these products has no protection against
over-current
and
short-circuits.
The simplest
method is to connect a self-recovery fuse in series
at the input end or add a circuit breaker to the
circuit.
No parallel connection or plug and play.
Note:
Unit:mm(inch)
Pin section:0.60*0.25mm(0.024*0.010inch)
Pin section tolerances: 0.10mm( 0.004inch)
General tolerances: 0.15mm( 0.006inch)
Specifications subject to change without notice.
B_(X)T-W2
A/1-2008
Page 2 of 2