NJRC NJU6315

NJU6315 Series
0.9V Operation Fundamental Quartz Crystal Oscillator IC
!GENERAL DESCRIPTION
The NJU6315 series is C-MOS quartz crystal oscillator IC
for fundamental (up to 50MHz) oscillation.
The operating voltage is from 0.9V to 3.3V, and the pad
layout is suitable for wire bonding mount of existing-sized
ceramic package.
The 5-stage divider generates only one frequency selected
of f0, f0/2,f0/4 f0/8, f0/16 and f0/32 by internal circuits is output.
The oscillation amplifier is realized very low stand-by
current using NAND circuit.
Furthermore, The 3-state output buffer is C-MOS
compatible.
!PACKAGE OUTLINE
!FEATURES
"Operating Voltage
0.9 to 3.3V
"Maximum Oscillation Frequency
50MHz
"Low Operating Current
"5-Stage Divider
Maximum Divider f0/32
"Oscillation Stop and Output Stand-by Function
"3-State Output Buffer
"Oscillation Capacitors Cg and Cg on-Die
"Package Outline
Thin-Die
"C-MOS Technology
!PAD LOCATION
!LINE-UP TABLE
!COORDINATES
Type No.
FOUT
A
f0
B*
f0/2
C*
f0/4
NJU6315
D*
f0/8
E* f0/16
F* f0/32
* Under Development
Internal Connect
Connected A Line
Connected B Line
Connected C Line
Connected D Line
Connected E Line
Connected F Line
NJU6315XC-L
Thin-Die
CONT
XTI
XTO
VSS
Cg/Cd
9/10pF
9/10pF
9/10pF
9/10pF
9/10pF
9/10pF
VDD
FOUT
No Pad Name
X
Y
1
CONT
-178
231
2
XTI
-178
77
3
XTO
-178
-77
4
VSS
-178
-231
5
FOUT
206
-231
6
VDD
206
231
Starting Point: Die Center
Unit[um]
Die Size: 0.7x0.75mm
Die Thickness (C-L): 140±10um
Wafer Thickness (W-L): 140±10um
Pad size: 90x90um
Die Substrate: VDD level
!EXAMPLE OF PART NUMBER
1)NJU6315AW-L
FOUT=f0, Wafer Thickness=140um
2)NJU6315CC-L
FOUT= f0/4, Die Thickness=140um
!BLOCK DIAGRAM
VDD
XTO
VSS
Rf
XTI
1/2
Cg
1/2
1/2
1/2
1/2
Cd
A
B
C
D
E
F
3-STATE
BUFFER
FOUT
CONT
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NJU6315 Series
!TERMINAL DESCRIPTION
SYMBOL FUNCTION
Oscillation and 3-state Output Buffer Control
CONT
FOUT
Output either one frequency selected of f0,
CONT
H or OPEN
f0/2,f0/4,f0/8, f0/16 and f0/32
Note1)
L
Oscillation Stop and High impedance Output
XTI
Quartz Crystal Connecting Terminals
XTO
VSS
VSS=0V
FOUT
Frequency Output
VDD
VDD=1.2V/1.5V
Note1) Refer to the line-up table. (f0/2,f0/4,f0/8, f0/16 and f0/32 type are under development.)
!ABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
SYMBOL
RATING
UNIT
Supply Voltage
VDD
-0.5 to +3.6
V
Input Voltage
VIN
VSS-0.5 to VDD+0.5
V
Output Voltage
VO
-0.5 to VDD+0.5
V
Input Current
IIN
mA
±10
Output Current
IO
mA
±25
Operating Temperature Range
Topr
-40 to +85
°C
Storage Temperature Range
Tstg
-55 to +125
°C
Note2) If the supply voltage(VDD) is less than 3.6V, the input voltage must not over the VDD level though 3.6V is
limit specified.
Note3) Decupling capacitor should be connected between VDD and VSS due to the stabilized operation for the
circuit.
Note4) Please handle with care because of sensitive to ESD.
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NJU6315 Series
!ELECTRICAL CHARACTERISTICS
PARAMETER
Operating Voltage
PARAMETER
Operating Current
Oscillation Stopping
Current
Input Voltage
Output Current
Input Current
3-state Off Leakage
Current
Feedback Resistance
Internal Capacitor
Oscillation Frequency
SYMBOL
VDD
SYMBOL
IDD
ISTB
VIH
VIL
IOH
IOL
IIN
IOZ
CONDITIONS
8MHz≤fosc≤40MHz
fosc≤50MHz
CONDITIONS
A version, f0=50MHz, CL=15pF
MIN
0.9
1.1
MIN
CONT=VSS, No load
VOH=1.08V
VOL=0.12V
CONT=0.8VDD
CONT=0.2VDD
TYP
MAX
3.3
3.3
(Ta=25°C)
UNIT
V
(VDD=1.2V, Ta=25°C)
TYP
MAX
UNIT
2.8
4.0
mA
1
0.84
0
2
2
3.0
0.5
CONT=VSS, FOUT= VDD or VSS
3
uA
1.2
0.36
4.5
0.7
V
V
mA
mA
uA
uA
±0.1
uA
Rf
255
kΩ
Cg/Cd
fosc=16MHz
9/10
pF
fMAX
Recommendation
Note5)
50
MHz
Output Signal Symmetry
SYM
CL=15pF, @VDD/2
45
50
55
%
Output Signal Rise Time
tr
CL=15pF,10% to 90%
3
6
ns
Output Signal Fall Time
tf
CL=15pF,90% to 10%
3
6
ns
Output Disable time
tPLZ
CL=15pF,RUP=10kΩ
250
ns
Output Enable Time
tPZL
CL=15pF,RUP=10kΩ
250
ns
Note5) The oscillation frequency range has used NJRC’s standard crystal for measurement. However it is not
guaranteed. (Refer to EXAMPLE OF CRYSTAL PARAMETERS FOR MEASUREMENT CIRCUITS)
PARAMETER
Operating Current
Oscillation Stopping
Current
Input Voltage
Output Current
Input Current
3-state Off Leakage
Current
Feedback Resistance
Internal Capacitor
Oscillation Frequency
SYMBOL
IDD
ISTB
VIH
VIL
IOH
IOL
IIN
IOZ
CONDITIONS
A version, f0=50MHz, CL=15pF
MIN
CONT=VSS, No load
VOH=1.35V
VOL=0.15V
CONT=0.8VDD
CONT=0.2VDD
CONT=VSS, FOUT= VDD or VSS
(VDD=1.5V, Ta=25°C)
TYP
MAX
UNIT
3.7
4.8
mA
2
1.05
0
2
2
3.0
0.6
5
uA
1.5
0.45
4.5
0.9
V
V
mA
mA
uA
uA
±0.1
uA
Rf
255
kΩ
Cg/Cd
fosc=16MHz
9/10
pF
fMAX
Recommendation
Note6)
50
MHz
Output Signal Symmetry
SYM
CL=15pF, @VDD/2
45
50
55
%
Output Signal Rise Time
tr
CL=15pF,10% to 90%
3
6
ns
Output Signal Fall Time
tf
CL=15pF,90% to 10%
3
6
ns
Output Disable time
tPLZ
CL=15pF,RUP=10kΩ
250
ns
Output Enable Time
tPZL
CL=15pF,RUP=10kΩ
250
ns
Note5) The oscillation frequency range has used NJRC’s standard crystal for measurement. However it is not
guaranteed. (Refer to EXAMPLE OF CRYSTAL PARAMETERS FOR MEASUREMENT CIRCUITS)
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NJU6315 Series
!EXAMPLE OF CRYSTAL PARAMETERS FOR MEASUREMENT CIRCUITS
L1
C1
R1
f[MHz]
50
R1[Ω]
19.23
L1[mH]
3.29
C1[fF]
3.08
C0[pF]
1.28
C0
!MEASUREMENT CIRCUITS
(1)Operating Current, Output Signal Symmetry, Output Signal Rise/Fall Time (CL=15pF)
1/2VDD
XTI
XTI
H
VDD
L
FOUT
XTO
0.1pF
VSS
90%
CL=15pF
50%
10%
tr
tf
(2)Check of Operation (CL=15pF)
Pulse
Generator
VDD
1000pF
FOUT
XTI
50Ω
0.1pF
VSS
CL=15pF
(3)Output Disable/Enable Time (CL=15pF,RUP=10kΩ)
RUP=10kΩ
VDD
XTI
Pulse
Generator
CONT
VSS
50Ω
CONT
FOUT
0.1pF
0.8VDD
0.2VDD
TPLZ
CL=15pF
FOUT
TPZL
VOL
VOH
[CAUTION]
The specifications on this data book are only
given for information , without any guarantee
as regards either mistakes or omissions.
The application circuits in this data book are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
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