NJW1112 8-IN 4-OUT STEREO AUDIO SELECTOR GENERAL DESCRIPTION The NJW1112 is an 8-input 4-output stereo audio selector. It includes four independent 8-input-1output stereo audio selectors and 0dB fixed gain buffers. The NJW1112 performs superior audio characteristics such as low distortion, low output noise and low crosstalk. In addition, the NJW1112 is available to expand to 16-input 4-output stereo audio selector without sound quality deterioration, because it is able to connect in parallel by Output switch function. All of internal status and variables are controlled by three-wired serial bus. Selectable two Chip address is available for using two chips on same serial bus line. It is suitable for AV amplifiers, AV receivers, Analog audio switchers, Video conferencing, Security systems and others. FEATURES • Operating Voltage • 8-Input, 4-Output Stereo Audio Selector • Operating Current • Low On Resistance Output Switch • Low Distortion • Low Output Noise • Low Crosstalk • Channel Separation • 3-Wired Serial Control • Bi-CMOS Technology • Package Outline PACKAGE OUTLINE NJW1112V ±4.5 to ±7.5V 14mA typ. On Resistance :15Ω typ. 0.0007% typ. -119dBV typ. 120dB typ. 116dB typ. SSOP32 BLOCK DIAGRAM V- DATA LATCH ADR CLOCK V+ V- OutA1 OutB1 OutA2 OutB2 OutA3 OutB3 OutA4 OutB4 + 10µF + + 32 31 30 29 28 10µF 10µF 10µF 10µF 10µF 10µF 10µF 10µF + + + + + + + + 100µF 100µF 27 26 25 24 23 8 9 10 22 21 20 19 18 17 15 16 GND VDDOUT Control Logic 1 2 Rin + InA1 Ver.0.2 3 Rin + InB1 4 Rin + InA2 5 Rin + InB2 6 Rin + InA3 7 Rin + InB3 Rin + InA4 Rin + InB4 Rin + InA5 11 Rin + InB5 12 Rin + InA6 13 Rin + InB6 14 Rin + InA7 Rin + InB7 Rin + InA8 Rin + InB8 –1– NJW1112 PIN CONFIGURATION 32 17 1 16 No. Symbol Function No. Symbol Function 1 InA1 Ach Input 1 17 OutB4 Bch Output 4 2 InB1 Bch Input 1 18 OutA4 Ach Output 4 3 InA2 Ach Input 2 19 OutB3 Bch Output 3 4 InB2 Bch Input 2 20 OutA3 Ach Output 3 5 InA3 Ach Input 3 21 OutB2 Bch Output 2 6 InB3 Bch Input 3 22 OutA2 Ach Output 2 7 InA4 Ach Input 4 23 OutB1 Bch Output 1 8 InB4 Bch Input 4 24 OutA1 Ach Output 1 9 InA5 Ach Input 5 25 V- V- Power Supply Terminal 10 InB5 Bch Input 5 26 GND Ground Terminal 11 InA6 Ach Input 6 27 V+ V+ Power Supply Terminal 12 InB6 Bch Input 6 28 ADR Chip address setting terminal 13 InA7 Ach Input 7 29 CLOCK CLOCK 14 InB7 Bch Input 7 30 LATCH LATCH 15 InA8 Ach Input 8 31 DATA DATA 16 InB8 Bch Input 8 32 VDDOUT Internal Digital Power Supply Output –2– Ver.0.2 NJW1112 ABSOLUTE MAXIMUM RATING (Ta=25°C) PARAMETER SYMBOL + Power Supply Voltage V Maximum Input Voltage VIM Power Dissipation PD RATING UNIT +8/-8 V + - V /V 800 V NOTE: EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting mW Operating Temperature Range Topr -40 to +85 °C Storage Temperature Range Tstg -40 to +125 °C RECOMMENDED OPERATING CONDITIONS (Ta=25°C) PARAMETER Operating Voltage SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT V+/V- - ±4.5 ±7.0 ±7.5 V TEST CONDITION MIN. TYP. MAX. UNIT ELECTRICAL CHARACTERISTICS ♦Power Supply (Ta=25°C, V+/V-=±7V) PARAMETER SYMBOL Supply Current 1 ICC V+, No Signal 7.0 14.0 21.0 mA Supply Current 2 IEE V-, No Signal 7.0 14.0 21.0 mA MIN. TYP. MAX. UNIT 11.1 12.9 (3.6) (4.4) -1.0 0 1.0 ♦AC CHARACTERISTICS (Ta=25°C, V+/V-=±7V, VIN=2Vrms,f=1kHz,RL=47kΩ) PARAMETER SYMBOL Maximum Output Voltage VOM Voltage Gain GV TEST CONDITION THD=1% - - dBV (Vrms) dB Total Harmonic Distortion 1 THD1 BW=400Hz-30kHz - 0.001 0.02 Total Harmonic Distortion 2 THD2 Vin=1Vrms, BW=400Hz-30kHz - 0.0007 - Total Harmonic Distortion 3 THD3 f=10kHz, BW=400Hz-30kHz - 0.002 - Mute Level ATT Selector=Mute, A-weighted - -120 - Output Noise VNO Rg=0Ω, A-Weighted - -119 -110 dBV (1.1) (3.2) (µVrms) Cross Talk 1 CT1 Rg=0Ω, A-Weighted - -120 - Cross Talk 2 CT2 Rg=0Ω, f=20kHz - -100 - Channel Separation 1 CS1 Rg=0Ω, A-Weighted - -116 -90 Channel Separation 2 CS2 Rg=0Ω, f=20kHz - -96 - Output impedance ROUT Output Switch = ON - 15 30 SYMBOL High Level Input Voltage VH Low Level Input Voltage VL Ver.0.2 TEST CONDITION ADR, LATCH, DATA, CLOCK Terminal ADR, LATCH, DATA, CLOCK Terminal dB dB dB Ω BW: Band Width ♦Logic Control Characteristics (Ta=25°C, V+/V-=±7V) PARAMETER % MIN. TYP. MAX. 2.5 - V 0 - 1.5 UNIT + V –3– NJW1112 TERMINAL DESCRIPTION PIN NO. SYMBOL FUNCTION TERMINAL DC VOLTAGE EQUIVALENT CIRCUIT V+ 1 to 16 InA1 to 8 InB1 to 8 Ach Input 1 to 8 Bch Input 1 to 8 0V 200Ω V-(sub) V+ V+ 50Ω 17 to 24 OutA1 to 4 OutB1 to 4 Ach Output 1 to 4 Bch Output 1 to 4 0V 50Ω V-(sub) 27 V+ V+ Power Supply Terminal V+ V-(sub) V+ 26 GND Ground Terminal 0V V-(sub) V+ 28 29 30 31 ADR CLOCK LATCH DATA Chip address setting terminal CLOCK LATCH DATA 4kΩ 0V 8kΩ V-(sub) –4– Ver.0.2 NJW1112 TERMINAL DESCRIPTION PIN NO. SYMBOL FUNCTION TERMINAL DC VOLTAGE EQUIVALENT CIRCUIT V+ 70kΩ 32 VDDOUT Internal Digital Power Supply Output 25kΩ 200Ω V-(sub)+5V V-(sub) 20kΩ V-(sub) Ver.0.2 –5– NJW1112 CONTROL DATA FORMAT t7 t4 t1 LATCH t8 t2 t3 CLOCK MSB D15 DATA (7) LSB D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 t5 t6 MSB First Note.) Set CLOCK in High to prevent incorrect operation during a standby period. SYMBOL t1 t2 t3 t4 t5 t6 t7 t8 PARAMETER CLOCK Clock Width CLOCK Pulse Width (High) CLOCK Pulse Width (Low) LATCH Rise Hold Time DATA Setup Time DATA Hold Time CLOCK Setup Time LATCH High Pulse Width MIN TYP MAX UNIT 4 2 2 4 1.6 1.6 1.6 1.6 - - µsec µsec µsec µsec µsec µsec µsec µsec CONTROL DATA NJW1112 control data is constructed with 16bits. MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 Setting DATA D6 D5 D4 D3 Select Address D2 D1 D0 Chip Address MSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 OutSW1 Selector1 0 0 0 0 * * * * Don’t Care OutSW2 Selector2 0 0 0 1 * * * * Don’t Care OutSW3 Selector3 0 0 1 0 * * * * OutSW4 Selector4 0 0 1 1 * * * * Don’t Care Don’t Care LSB * Chip address is set by chip address select terminal (ADR) status. Chip address ADR –6– D3 D2 D1 D0 Low 1 0 1 0 High 1 0 1 1 Ver.0.2 NJW1112 INITIAL CONDITION MSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 0 0 * * * * 0 0 0 0 0 0 0 0 0 0 0 1 * * * * 0 0 0 0 0 0 0 0 0 0 1 0 * * * * 0 0 0 0 0 0 0 0 0 0 1 1 * * * * LSB Note.) This product starts up by MUTE setting in power “ON”. Use it after removing MUTE of each setting. If any audio signal is inputted in input signal terminal before power “ON”, it may cause initial condition abnormality. In conditions of use such as the above, it prevents that abnormality by setting MUTE before power “OFF" CONTROL DATA : Selector for the stereo inputs from InA1/B1 to InA8/B8 : Output ON/OFF setting X Selector OutSW D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Don’t Care OutSW1 Selector1 0 0 0 0 * * * * Don’t Care OutSW2 Selector2 0 0 0 1 * * * * Don’t Care OutSW3 Selector3 0 0 1 0 * * * * Don’t Care OutSW4 Selector4 0 0 1 1 * * * * a) Selector Data Setting D11 D10 D9 D8 0 0 0 0 Mute 7 0 0 0 1 InA1/B1 0 0 1 0 InA2/B2 0 0 1 1 InA3/B3 0 1 0 0 InA4/B4 0 1 0 1 InA5/B5 0 1 1 0 InA6/B6 0 1 1 1 InA7/B7 1 0 0 0 InA8/B8 ( ) (7) b) OutSW Data D12 Setting ( ) 0 Output ON 7 1 Output OFF (7) Ver.0.2 Initial Setting Initial Setting –7– NJW1112 APPLICATION CIRCUIT 1 InA1 10 µF 10 µF InB1 10 µF 10 µF InB2 InA3 10 µF 10 µF InB3 VDDOUT 1 32 Rin + 31 DATA 30 LATCH 29 CLOCK 5 28 ADR 6 27 2 Rin + 3 Rin + 4 Rin + V- + 10µF Control Logic InA2 + Rin + V+ + Rin InA4 10 µF + 100µF 7 GND 26 100µF 10 µF InB4 InA5 10 µF + Rin + 8 Rin + V- 25 50kΩ 9 24 OutA1 + 10µF 10 µF InB5 Rin + 10 50kΩ 23 OutB1 + 10µF InA6 10 µF Rin + 11 50kΩ 22 OutA2 + 10µF 10 µF InB6 Rin + 12 50kΩ 21 OutB2 + 10µF InA7 10 µF Rin + 50kΩ 13 20 OutA3 + 10µF 10 µF InB7 Rin + 50kΩ 14 InA8 + OutB3 + 10µF Rin 10 µF 19 50kΩ 15 18 OutA4 + 10µF 10 µF InB8 Rin + 16 50kΩ 17 OutB4 + 10µF Rin NOTES (6) Separate the 3-wired serial control bus line from the input terminals (1pin to 16pin) for avoiding digital noise problem and cross talk. (6) Cross talk performance may be effected by PCB patterning and Input resistor “Rin” in relation to input impedance. Widen intervals of input lines (1pin to 16pin) and put guard patterns (ground patterns) among input lines for avoiding cross talk problem. Further, cross talk performance may be effected by input resistor “Rin”. In consideration of an actual operating condition, please decide Rin values after evaluating. (6) The output terminals of this device are designed as a line driver. Use them by load resistances more than 2kΩ because output waveforms may be in an unstable condition. –8– Ver.0.2 NJW1112 APPLICATION CIRCUIT 2 The NJW1112 is available to expand to 16-input 4-output stereo audio selector without sound quality deterioration, because it is able to connect in parallel by Output switch function. 10µF InA1 + VDDOUT 1 32 V- + 10µF In1 10µF InB1 In2 10µF InB2 10µF InA3 In3 10µF InB3 + 2 Rin + 3 Rin + 4 Rin + Control Logic 10µF InA2 Rin 31 DATA 30 LATCH 29 CLOCK 5 28 6 27 ADR=V+ Rin + V+ + Rin 10µF InA4 + 100µF GND 7 26 100µF In4 10µF InB4 10µF InA5 + Rin + 8 Rin + V- 25 50kΩ 9 24 + OutA1 10µF In5 10µF InB5 Rin + Out1 50kΩ 23 10 + OutB1 10µF 10µF InA6 Rin + 50kΩ 11 22 + 21 + OutA2 10µF In6 10µF InB6 Rin + 50kΩ 12 Out2 OutB2 10µF 10µF InA7 Rin + 50kΩ 13 20 + 19 + OutA3 10µF In7 10µF InB7 Rin + Out3 50kΩ 14 OutB3 10µF Rin 10µF InA8 + 50kΩ 15 18 + 17 + OutA4 10µF In8 10µF InB8 Rin + Out4 50kΩ 16 OutB4 10µF Rin 10µF InA1 + VDDOUT 1 32 V- + 10µF In9 10µF InB1 InA2 In10 10µF InB2 10µF InA3 In11 10µF InB3 + 2 Rin + 3 Rin + 4 Rin + 31 Control Logic 10µF Rin 30 29 5 28 6 27 ADR=GND Rin + V+ + Rin 10µF InA4 + 100µF 7 GND 26 100µF In12 10µF InB4 10µF InA5 + Rin + 8 Rin + V- 25 50kΩ 9 24 + 23 + 22 + 21 + 20 + 19 + 18 + 17 + 10µF In13 10µF InB5 Rin + 50kΩ 10 10µF 10µF InA6 Rin + 50kΩ 11 10µF In14 10µF InB6 Rin + 12 50kΩ 10µF 10µF InA7 Rin + 50kΩ 13 10µF In15 10µF InB7 Rin + 50kΩ 14 10µF Rin 10µF InA8 + 50kΩ 15 10µF In16 10µF InB8 Rin + 16 50kΩ 10µF Rin Ver.0.2 –9– NJW1112 APPLICATION CIRCUIT 3 The NJW1112 is available to expand to 8-input 8-output stereo audio selector. 10µF InA1 + VDDOUT 1 32 V- + 10µF In1 10µF InB1 InA2 In2 10µF InB2 10µF InA3 In3 10µF InB3 + 2 Rin + 3 Rin + 4 Rin + Control Logic 10µF Rin 31 DATA 30 LATCH 29 CLOCK 5 28 6 27 ADR=V+ Rin + V+ + Rin 10µF InA4 + 100µF GND 7 26 100µF In4 10µF InB4 10µF InA5 + Rin + 8 Rin + V- 25 50kΩ 9 24 + 23 + OutA1 10µF In5 10µF InB5 Rin + Out1 50kΩ 10 OutB1 10µF 10µF InA6 Rin + 50kΩ 11 22 + 21 + OutA2 10µF In6 10µF InB6 Rin + 50kΩ 12 Out2 OutB2 10µF 10µF InA7 50kΩ Rin + 13 20 + 19 + OutA3 10µF In7 10µF InB7 Rin + Out3 50kΩ 14 OutB3 10µF Rin 10µF InA8 + 50kΩ 15 18 + OutA4 10µF In8 10µF InB8 Rin + Out4 50kΩ 16 17 + OutB4 10µF Rin VDDOUT 1 32 V- + 10µF 2 4 Control Logic 3 31 30 29 5 28 6 27 ADR=GND V+ + 100µF 7 GND 26 100µF + 8 V- 25 50kΩ 9 24 + OutA1 10µF Out5 50kΩ 10 23 + OutB1 10µF 50kΩ 11 22 + 21 + OutA2 10µF 12 50kΩ Out6 OutB2 10µF 50kΩ 13 20 + 19 + OutA3 10µF Out7 50kΩ 14 OutB3 10µF 50kΩ 15 18 + 17 + OutA4 10µF 50kΩ 16 Out8 OutB4 10µF – 10 – Ver.0.2 NJW1112 TYPICAL CHARACTERISTICS ICC vs Supply Voltage IEE vs Supply Voltage No signal , Ta=-40,25,85oC No signal , Ta=-40,25,85oC 20 20 25oC, 85oC 10 5 10 5 0 0 4 5 6 7 8 4 5 V+/V- =±7V, THD=1%, I/O: INA1-1Aout , Ta= -40,25,85oC 25oC 4.5 8 V+/V- =±7V,THD=1%, I/O: INA1-1Aout , Ta=-40,25,85oC 6.0 5.0 -40oC Maximum Output Voltage [Vrms] 85oC 7 Maxim um Output Voltage vs Supply Voltage Maxim um Output Voltage vs Frequency 5.0 6 V+/V- [V] V+/V- [V] Maximum Output Voltage [Vrms] -40oC 15 IEE [mA] ICC [mA] 15 25oC, 85oC -40oC 4.0 3.5 85oC 4.0 3.0 25oC, -40oC 2.0 1.0 3.0 0.0 10 100 1000 10000 100000 4 5 Frequency [Hz] Gain vs Frequency V+/V- =±7V, f=1kHz , I/O: INA1-1Aout , Ta=-40,25,85oC V+/V- =±7V, Vin=2Vrms , I/O: INA1-1Aout , Ta=-40,25,85oC 85 C 25oC -40oC 1 4 Gain [dB] Maximum Output Voltage [Vrms] 8 2 o Ver.0.2 7 Maxium Output Voltage vs Load Resistance 5 3 0 -1 2 1 1000 6 V+/V- [V] -2 RL[Ω] 10000 10 100 1000 Frequency [Hz] 10000 100000 – 11 – NJW1112 TYPICAL CHARACTERISTICS THD+N vs Input Voltage THD+N vs Frequency V+/V- =±7V, I/O: INA1-1Aout , BW:10-22kHz ( f=100Hz ) 400-30kHz ( f = 1,10kHz ) , Ta=25oC V+/V- =±7V, I/O: INA1-1Aout, BW:10-80kHz, Vin=2Vrms , Ta=-40,25,85oC 1 1 0.1 0.1 10kHz 85oC THD+N [%] THD+N [%] o 100Hz 0.01 1kHz 25 C 0.01 -40oC 0.001 0.001 0.0001 0.0001 0.01 0.1 1 Input Voltage [Vrms] 10 10 100 1000 Frequency [Hz] 10000 100000 THD+N vs Am bient Tem perature V+/V- =±7V, I/O: INA1-1Aout , BW:400-30kHz ( f = 1 kHz ) 1 THD+N [%] 0.1 2Vrms 0.01 1Vrms 0.001 0.0001 -40 -20 0 25 50 85 100 Ambient Temperature [oC] 125 Cross Talk vs Frequency Channel Separation vs Frequency V+/V- =±7V, Vin=2Vrms, BW:10Hz-80kHz, I/O: INA1,3,4,5,6,7,8 / OutA1,Select channel:INA2, Ta=25o C V+/V- =±7V, Vin=2Vrms , BW:10Hz-80kHz, I/O: INB1,2,3,4,5,6,7,8 / OutA1, Select channel:INA2 Ta=25o C -40 Rg=5.1kΩ -40 Rg=3.3kΩ -60 Channel Separation[dB] Cross Talk[dB] Rg=5.1kΩ Rg=3.3kΩ Rg=620Ω -80 Rg=0Ω -100 Rg=620Ω -80 Rg=0Ω -100 -120 -120 10 100 1000 Frequency [Hz] – 12 – -60 10000 100000 10 100 1000 10000 100000 Frequency [Hz] Ver.0.2 NJW1112 [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.0.2 – 13 –