PI49FCT3807D 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 1-10 Clock Buffer for Networking Applications Product Features Description High Frequency >156 MHz The PI49FCT3807D is a 3.3V compatible, high-speed, low-noise 1-10 non-inverting clock buffer. The key goal in designing the PI6C3807D is to target networking applications that require lowskew, low-jitter, and high-frequency clock distribution. Providing output-to-output skew as low as 150ps, the PI49FCT3807D is an ideal clock distribution device for synchronous systems. Designing synchronous networking systems requires a tight level of skew from a large number of outputs. High-speed, low-noise, non-inverting 1-10 buffer Low-skew (<250ps) between any two output clocks Low duty cycle distortion <250ps Low propagation delay <2.5ns Multiple VDD, GND pins for noise reduction 3.3V supply voltage Available in SOIC, SSOP, and QSOP packages Block Diagram Pin Configuration CLK0 CLK1 BUF_IN CLK2 CLK3 CLK9 1 BUF_IN 1 20 VDD GND 2 19 CLK9 CLK0 3 18 CLK8 VDD 4 17 GND CLK1 5 16 CLK7 GND 6 15 VDD CLK2 7 14 CLK6 VDD 8 13 GND CLK3 9 12 CLK5 GND 10 11 CLK4 20-Pin H,Q,S PS8493 08/09/00 PI49FCT3807D 1-10 Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ........................................................... 65°C to +150°C VDD Voltage ........................................................................... 0.5V to +4.6V Output Voltage ................................................................ 0.5V to VDD+0.5V Input Voltage ......................................................................... 0.5V to +7.0V DC Output Current ............................................................. 60mA to +60mA Power Dissipation ............................................................................. 500mW Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Range VDD Voltage ................................................................................. 3.3V ± 0.3V Commercial Temperature ......................................................... 0°C to +70°C Industrial Temperature ............................................................. 40V to +85V Input Frequency .................................................................... DC to 156 MHz Capacitive Loading ................................................................... 10pF to 50pF DC Electrical Characteristics (Over the Operating Range) M in. Typ.(2) M ax. Guaranteed Logic HIGH Level (Input Pins) 2.0 5.5 Input LOW Voltage Guaranteed Logic LOW Level (Input Pins) 0.5 0.8 IIH Input HIGH Current VDD = Max. VIN = VDD 1 IIL Input LOW Current VDD = Max. VIN = GND 1 VIK Clamp Diode Voltage VDD = Min., IIN = 18mA 0.7 1.2 VOH Output HIGH Voltage VDD = Min., VIN = VIH or VIL IOH = 0.1mA VDD 0.2 IOH = 12mA 2.4(3) 3.0 VOL Output LOW Voltage VDD = Min., VIN = VIH or VIL IOL = 0.1mA 0.2 IOL = 12mA 0.3 0.5 1.5V(4) 45 75 180 VDD = 3.0V, VIN = VIH or VIL, VOUT = 1.5V(4) 50 92 200 Parame te rs De s cription VIH Input HIGH Voltage VIL Te s t Conditions (1) IOH Output HIGH Current VDD = 3.0V, VIN = VIH or VIL, VOUT = IOL Output LOW Current Units V µA V mA Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading. 3. VOH = VCC 0.6V at rated current. 4. This parameter is determined by device characterization but is not production tested. 5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 2 PS8493 08/09/00 PI49FCT3807D 1-10 Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Parame te rs Te s t Conditions (1) De s cription M in. Typ.(2) M ax. IDDQ Quiescent Power Supply Current VDD = Max. VIN = GND or VDD 0.1 30 ∆IDD Supply Current per Inputs @ TTL HIGH VDD = Max. VIN = VDD 0.6V(3) 47 300 50 MHz 43 67 MHz 56 80 MHz 66 100 MHz 81 125 MHz 97 156 MHz 121 IDD VDD = 3.6V, No Load Dynamic Supply Current Units µA mA Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VDD = 3.3V, +25°C ambient. 3. Per TTL driven input (VIN = VDD 0.6V); all other inputs at VDD or GND. Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) Description Test Conditions Typ Max. CIN Input Capacitance VIN = 0V 3.0 4 C OUT Output Capacitance VOUT = 0V 6 Units pF Note: 1. This parameter is determined by device characterization but is not production tested. Product Pin Description Pin Name BUF_IN CLK [0:9] GND VDD Description Input Outputs Ground Power Test Circuits for All Outputs VDD VOUT VIN Pulse Generator Definitions: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance, should be equal to Zout of the Pulse Generator. D.U.T. CL 3 PS8493 08/09/00 PI49FCT3807D 1-10 Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics (VCC = 3.3V ± 0.3V, TA = 85°C) Parame te rs De s cription Te s t Conditions (1) M in. Typ. M ax. Units tR/tF CLKn Rise/Fall Time 0.8V~2.0V CL = 15pF, 125 MHz 0.7 1.0 tPLH tPHL Propagation Delay BUF_IN to CLKn CL = 15pF, 125 MHz 1.0 2.2 2.5 tSK(o)(3) Skew between two outputs of the same package (same transition) CL = 15pF, 125 MHz 110 250 tSK(p)(3) Skew between opposite transitions (tPHL- tPLH) of the same output CL = 15pF, 125 MHz 200 250 tSK(t)(3) Skew between two outputs of different package (4) CL = 15pF, 125 MHz 0.55 ns ps ns Notes: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew measured at worse cast temperature (max. temp). 4. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 4 PS8493 08/09/00 PI49FCT3807D 1-10 Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 SWITCHING WAVEFORMS Pulse Skew tSK(P) Propagation Delay 3V 3V Input Input 1.5V 0V 0V tPLH 1.5V tPHL tPLH tPHL VOH VOH 2.0V Output Output 1.5V 1.5V 0.8V VOL VOL tR tF tSK(p) = Output Skew tSK(O) tPHL tPLH Package Skew tSK(T) 3V Input 3V 1.5V Input 1.5V 0V 0V tPHLx tPLHx tPLH1 VOH CLKx VOH 1.5V Package 1 1.5V Output VOL tSK(o) tPHL1 VOL tSK(o) tSK(t) VOH CLKy VOH 1.5V Package 2 1.5V Output VOL tPLHy tSK(t) VOL tPHLy tPLH2 tSK(o) = tPLHy tPLHx or tPHLy tPHLx tSK(t) = 5 tPHL2 tPLH2 tPLH1 or tPHL2 tPHL1 PS8493 08/09/00 PI49FCT3807D 1-10 Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 20-Pin SOIC (S20) Package 20-Pin SSOP (H20) Package 20 20 .2914 7.40 .2992 7.60 .197 .220 .010 .029 0.254 x 45˚ 0.737 1 1 .496 12.60 .511 12.99 .0091 .0125 0-8˚ .004 .009 .272 .295 6.90 7.50 0.23 0.32 .0926 2.35 .1043 2.65 SEATING PLANE .0040 .0118 .013 .020 0.33 0.51 SEATING PLANE .394 .419 10.00 10.65 .0256 BSC 0.65 .0098 Max. 0.25 0.09 0.25 0.55 .022 0.95 .037 .078 2.00 Max 0.41 .016 1.27 .050 .020 0.508 REF .030 0.762 .050 BSC 1.27 5.00 5.60 .291 .322 7.40 8.20 .002 Min 0.050 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 0.10 0.30 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS 20-Pin QSOP (Q20) Package 20 .150 .157 3.81 3.99 .015 x 45˚ 0.38 1 .007 0.178 .010 0.254 .337 8.56 .344 8.74 .058 REF 1.47 .016 0.41 .050 1.27 .053 1.35 .069 1.75 SEATING PLANE .025 BSC 0.635 Ordering Information .228 .244 5.79 6.19 .004 0.101 .010 0.254 .008 0.203 .012 0.305 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Orde ring Code Package Type PI49FCT3807DS 20- pin 300 mil wide SOIC PI49FCT3807DQ 20- pin 150 mil wide QSO P PI49FCT3807DH 20- pin 209 mil wide SSO P Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 6 PS8493 08/09/00