PI49FCT3807D

PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Features
Description
• Maximum Frequency up to 156 MHz
The PI49FCT3807D is a 3.3V high-speed, low-noise
1-10 non-inverting clock buffer. The key goal in designing the
PI49FCT3807D is to target networking applications that require
low-skew, low-jitter, and high-frequency clock distribution.
• High-speed, low-noise, non-inverting 1-10 buffer
• Low-skew (<250ps) between any two output clocks
• Low duty cycle distortion <250ps
Providing output-to-output skew as low as 250ps, the PI49FCT3807D
is an ideal clock distribution device for synchronous systems. Designing synchronous networking systems requires a tight level of
skew from a large number of outputs.
• Low propagation delay <2.5ns
• Multiple VDD, GND pins for noise reduction
• 3.3V supply voltage with 5V input tolerant
• Packages (Pb-free & Green Available):
-20-pin 300-mil wide SOIC (S)
-20-pin 209-mil wide SSOP (H)
-20-pin 150-mil wide QSOP (Q)
Block Diagram
Pin Configuration
CLK0
CLK1
BUF_IN
CLK2
CLK3
CLK9
BUF_IN
1
20
VDD
GND
2
19
CLK9
CLK0
3
18
CLK8
VDD
4
17
GND
CLK1
5
16
CLK7
GND
6
15
VDD
CLK2
7
14
CLK6
VDD
8
13
GND
CLK3
9
12
CLK5
GND
10
11
CLK4
Pin Description
Pin Name
BUF_IN
CLK [0:9]
GND
VDD
08-0002
1
Description
Input
Outputs
Ground
Power
PS8493D
01/08/08
PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature...........................................................–65°C to +150°C
VDD Voltage ..........................................................................–0.5V to +4.6V
Output Voltage............................................................... –0.5V to VDD+0.5V
Input Voltage .........................................................................–0.5V to +5.5V
Note:
Stresses greater than those listed under MAXIMUM
RAT INGS may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Range
VDD Voltage ............................................................................... 3.3V ± 0.3V
Industrial Temperature ......................................................–40°C to +105°C
Input Frequency.................................................................... DC to 156 MHz
DC Electrical Characteristics (Over the Operating Range)
Parameters Description
Test Conditions(1)
Min.
Typ. (2)
Max.
VIH
Input HIGH Voltage
Guaranteed Logic HIGH level (Input Pins)
2.0
5.5
VIL
Input LOW Voltage
Guaranteed Logic LOW level (Input Pins)
-0.5
0.8
IIH
Input HIGH Current
VDD = Max
VIN = 5.5V
1
IIL
Input LOW Current
VDD = Max
VIN = GND
1
VIK
Clamp Diode Voltage
VDD = Min. IIN = -18mA
VOH
Output High Voltage
VDD = Min. VIN = VIH or VIL
VOL
Output LOW Voltage
VDD = Min. VIN = VIH or VIL
IODH
IODL
Output HIGH Current
Output LOW Current
-0.7
IOH = 0.1mA
VDD-0.2
IOH = -12mA
2.4(3)
VDD = 3.3V, VIN = VIH or VIL, VOUT =
(4, 5)
VDD = 3.3V, VIN = VIH or VIL, VOUT = 1.5V
μA
V
0.2
IOL = 12mA
1.5V(4, 5)
V
-1.2
3.0
IOL = 0.1mA
Units
0.3
0.5
-45
-75
-180
50
80
200
mA
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VDD = 3.3V, +25°C ambient and maximum loading.
3. VOH = VDD – 0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
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PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Power Supply Characteristics
Parameters
IDDQ
Test Conditions(1)
Description
Quiescent Power Supply Current
∆IDD
Typ. (2)
Max.
VDD = Max.
VIN = GND or VDD
0.1
30
Supply Current per Inputs @ TTL HIGH VDD = Max.
0.6V(3)
47
300
50 MHz
43
55
67 MHz
56
70
80 MHz
66
85
100 MHz
81
105
125 MHz
97
125
156 MHz
121
155
VIN = VDD -
VDD = 3.6V,
No Load
Dynamic Supply Current
ID
Min.
Units
μA
mA
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at VDD = 3.3V, +25°C ambient.
3. Per TTL driven input (VIN = VDD – 0.6V); all other inputs at VDD or GND.
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(1)
Description
Test Conditions
Typ
Max.
CIN
Input Capacitance
VIN = 0V
3.0
4
COUT
Output Capacitance
VOUT = 0V
—
6
Units
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
Test Circuits for All Outputs
VDD
VOUT
VIN
Pulse
Generator
D.U.T.
CL
15pF
Definitions:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance, should be equal to Zout of the
Pulse Generator.
08-0002
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PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Switching Characteristics (VDD = 3.3V ± 0.3V, TA = 85°C)
Parameters
Test Conditions(1)
Description
tR/tF
CLKn Rise/Fall Time 0.8V ~ 2.0V
tPLH
tPHL
Propagation Delay BUF_IN to CLKn
tSK(o)(3)
Skew between two outputs of the same
package (same transition)
tSK(p)(3)
Skew bewteen opposite transitions
(tPHL-tPLH) of the same output
tSK(o)(3)
Skew between two outputs of different
package(4)
Min.
1.0
CL = 15pF, 125 MHz
Typ
Max.
0.8
1.0
2.2
2.5
110
250
200
250
Units
ns
ps
550
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worse cast temperature (max. temp).
4. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
Switching Characteristics (VDD = 3.3V ± 0.3V, TA = 105°C)
Parameters
Test Conditions(1)
Description
tR/tF
CLKn Rise/Fall Time 0.8V ~ 2.0V
tPLH
tPHL
Propagation Delay BUF_IN to CLKn
tSK(o)(3)
Skew between two outputs of the same
package (same transition)
tSK(p)(3)
Skew bewteen opposite transitions
(tPHL-tPLH) of the same output
tSK(o)(3)
Skew between two outputs of different
package(4)
Min.
1.0
CL = 15pF, 125 MHz
Typ
Max.
0.8
1.0
2.8
3.0
110
250
200
250
Units
ns
ps
550
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worse cast temperature (max. temp).
4. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
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PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Switching Waveforms
Pulse Skew – tSK(P)
Propagation Delay
3V
3V
Input
Input
1.5V
0V
0V
tPLH
tPHL
tPLH
1.5V
tPHL
VOH
VOH
2.0V
Output
Output
1.5V
1.5V
0.8V
VOL
VOL
tR
tF
Output Skew – tSK(O)
Package Skew – tSK(T)
3V
Input
3V
1.5V
Input
0V
tPLHx
1.5V
0V
tPHLx
tPLH1
VOH
CLKx
VOH
1.5V
Package 1
Output
VOL
tSK(o)
1.5V
VOL
tSK(o)
tSK(t)
VOH
CLKy
Package 2
Output
VOL
1.5V
VOL
tPHLy
tPLH2
08-0002
tSK(t)
VOH
1.5V
tPLHy
tPHL1
5
tPHL2
PS8493D
01/08/08
PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Packaging Mechanical: 20-Pin SOIC (S)
20
.2914 7.40
.2992 7.60
.010
.029
0.254
x 45˚
0.737
1
.496 12.60
.511 12.99
0-8˚
0.23
0.32
.007
.010
0.178
0.254
0.41 .016
1.27 .050
.020 0.508
REF
.030 0.762
.0926 2.35
.1043 2.65
.394
.419
10.00
10.65
SEATING
PLANE
.050
BSC
1.27
.0091
.0125
.0040
.0118
.013
.020
0.33
0.51
0.10
0.30
X.XX DENOTES CONTROLLING
X.XX DIMENSIONS IN MILLIMETERS
Packaging Mechanical: 20-Pin QSOP (Q)
20
.008
0.20
MIN.
.150
.157
.008
.013
0.20
0.33
3.81
3.99
Guage Plane
.010
0.254
1
Detail A
.337 8.56
.344 8.74
.058 REF
1.47
.041
1.04
REF
.015 x 45˚
0.38
.053 1.35
.069 1.75
Detail A
SEATING
PLANE
.016
.050
.025
BSC
0.635
0˚-6˚
.016
.035
0.41
0.89
.004 0.101
.010 0.254
0.41
1.27
.228
.244
5.79
6.19
.008 0.203
.012 0.305
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
08-0002
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01/08/08
PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Packaging Mechanical: 20-Pin SSOP (H)
20
.197
.220
5.00
5.60
1
.004
.009
.272
.295
6.90
7.50
0.55 .022
0.95 .037
.078
2.00 Max
.291
.322
7.40
8.20
SEATING
PLANE
.0256
BSC
0.65
0.09
0.25
.002
Min
0.050
.0098
Max.
0.25
Ordering Information
Ordering Code
Package Code
Package Type
PI49FCT3807DS
S
20-pin 300-mil wide SOIC
PI49FCT3807DSE
S
Pb-free & Green, 20-pin 300-mil wide SOIC
PI49FCT3807DQ
Q
20-pin 150-mil wide QSOP
PI49FCT3807DQE
Q
Pb-free & Green, 20-pin 150-mil wide QSOP
PI49FCT3807DH
H
20-pin 20-mil wide SSOP
PI49FCT3807DHE
H
Pb-free & Green, 20-pin 209-mil wide SSOP
Notes:
1. Thermal Characteristics can be found on the web at www.pericom.com/packaging/
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
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