SQ33D Series 1.8 V CMOS Clock Oscillators January 2006 • Pletronics’ SQ33D Series is a quartz crystal controlled precision square wave generator with a CMOS output. • The SQ33D series will directly interface TTL devices also. • Greatly reduces RFI and EMI system sensitivity • Minimizes RFI radiation, eases meeting FCC Class B emissions standards. • Capable of driving up to 15pF capacitive loads • Tube packaging is available. • • • • • • • • • 70 to 165 MHz Half Size Thru-Hole DIP package Enable/Disable Function Disable function includes low standby power mode 3rd Overtone Crystals used Improved circuit to minimize oscillator issues such as multi-mode output signal. Low Jitter Has internal bypass capacitor on the Vcc lead 5x7 mm LCC ceramic oscillator inside Pletronics Inc. certifies this device is in accordance with the RoHS (2002/95/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 2.0 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e1 or e2 Absolute Maximum Ratings: Parameter Unit VCC Supply Voltage -0.5V to +5.0V Vi Input Voltage -0.5V to VCC + 0.5V Vo Output Voltage -0.5V to VCC + 0.5V Thermal Characteristics The maximum die or junction temperature is 155oC The thermal resistance junction to board is 110oC/Watt depending on the solder pads, ground plane and construction of the PCB. Product informatin is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty. Production processsing does not necesarily include testing of all parameters. Copyright © 2005, Pletronics Inc. SQ33D Series 1.8 V CMOS Clock Oscillators January 2006 Part Number: SQ33 45 D ES X - 85.0M -XX Marking Internal code or blank Output Load Capacitance Blank = 15pF maximum none Frequency in MHz fff.fff M Supply Voltage VCC X = 1.8V + _ 5% X, C or D Enhanced Specifications (apply in the order shown) E = Temperature range -40 to 85oC S = Symmetry 45%/55% at 50% of VCC E S Series Model Frequency Stability 45 = + _ 50 ppm 44 = + _ 25 ppm 20 = + _ 20 ppm Series Model 5 4 2 SQ3 Part Marking: PLE SQ3xsss fff.fff M yywwaLF Where: x sss fff.fff yywwa LF = Frequency stability = Enhanced specification and voltage = frequency in MHz = Date code = Lead Free Pletronics may ship the following combinations without notice (this is an enhanced specified device) 44 (25 ppm) stability parts when 45 (50 ppm) was ordered 20 (20 ppm) stability parts when 45 (50 ppm) or 44 (25 ppm) was ordered. E temperature range parts when extended was not ordered. S symmetry parts when 40/60% symmetry was ordered. Pletronics may ship parts that are not marked for extended temperature range but were tested for extended temperature range, a Certificate of Conformance will accompany these parts. www.pletronics.com 425-776-1880 2 SQ33D Series 1.8 V CMOS Clock Oscillators January 2006 Electrical Specification for 2.50V + _10% over the specified temperature range Item Min Max Unit 70 165 MHz -50 +50 ppm “44" -25 +25 “20" -20 +20 Frequency Range Frequency Accuracy “45" Output Waveform Condition For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures CMOS (See load circuit) Output High Level 0.4 - V Below VCC Output Low Level - 0.4 V (See load circuit) Output Symmetry 40 60 % at 50% point of VCC 45 55 % for “S” option parts - 0.6 pS RMS 12 KHz to 20 MHz from the output frequency - 2.5 pS RMS 10 Hz to 1 MHz from the output frequency 30 - Kohm V disable - 30 % of VCC applied to pad 1 V enable 70 - % of VCC applied to pad 1 -10 +10 uA Pad 1 low, device disabled -10 +10 uA Standby Current ICC - 10 uA Pad 1 low, device disabled Enable time - 2 mS Time for output to resume operation Disable time - 200 nS Time for output to reach a high Z state Start up time - 5 mS Time for output to reach specified frequency Operating Temperature Range 0 +70 o Standard Temperature Range - 40 +85 o Extended Temperature Range - 55 +125 o Jitter Enable/Disable Internal Pull-up Output leakage VOUT = VCC VOUT = 0V Storage Temperature Range www.pletronics.com 425-776-1880 C C (See load circuit) Standard to VCC “E” Option C 3 SQ33D Series 1.8 V CMOS Clock Oscillators January 2006 Electrical Specification for 2.50V + _10% over the specified temperature range Item Min Typ Max Unit Condition VOUT High (VOH) 0.4 0.3 - V Below VCC, IOH = +8 mA VOUT Low (VOL) - 0.3 0.4 V IOL = - 8 mA Output TRISE and TFALL - 1.5 2.5 nS CLOAD = 15 pF 20% to 80% of VCC (See load circuit) VCC Supply Current (ICC) - 21 33 mA >125 MHz - 17 27 mA >95 MHz and <=125 MHz - 11 19 mA <=95 MHz CLOAD = 15 pF 20% to 80% of VCC (See load circuit) Specifications with Pad 1 E/D open circuit Load Circuit and Test Waveform Symmetry Vhigh 90% * Vcc 50% * Vcc 10% * Vcc Vlow Ground Trise www.pletronics.com 425-776-1880 Tfall 4 SQ33D Series 1.8 V CMOS Clock Oscillators January 2006 Reliability: Environmental Compliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002, Condition A Vibration MIL-STD-883 Method 2007, Condition A Solderability MIL-STD-883 Method 2003 Thermal Shock MIL-STD-883 Method 1011, Condition A ESD Rating Model Minimum Voltage Conditions Human Body Model 1500 MIL-STD-883 Method 3115 Charged Device Model 1000 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial PCB Mounting (typical for lead free processing) Hand soldering is recommended. Wave solder at 255oC to 280oC with maximum wave exposure of 15 seconds Reflow solder maximum exposure of 245oC for 15 seconds Soldering done in a nitrogen atmosphere enhances the solder joint quality. www.pletronics.com 425-776-1880 5 SQ33D Series 1.8 V CMOS Clock Oscillators January 2006 Mechanical: Inches PLE Cover: Kovar Electroless Nickel Plated 1 μinch (25 μm) typical Resistance welded to base Base: Kovar Glass to metal sealed leads Pin 4 Connected to case Label: White Kapton with Black Letters –or-Blue Epoxy heat cure ink with laser marked lettering Pad Not to scale mm A 0.487 + _ 0.005 12.37 + _ 0.13 B 0.487 + _ 0.005 12.37 + _ 0.13 C 0.225 + _ 0.011 5.72 + _ 0.28 D1 0.250 6.35 E1 0.020 0.51 F1 0.031 0.79 G1 0.094 2.37 1 H 0.300 7.62 I1 0.200 7.62 J1 0.094 2.37 1 Nominal dimension Function Note 1 Output Enable/Disable When this pad is not connected the oscillator shall operate. When this pad is logic low the output will be inhibited (high impedance state.) Recommend connecting this pad to VCC if the oscillator is to be always on. 4 Ground (GND) 5 Output 8 Supply Voltage (VCC) Recommend connecting appropriate power supply bypass capacitors as close as possible. Layout and application information For Optimum Jitter Performance, Pletronics recommends: • a ground plane under the device • no large transient signals (both current and voltage) should be routed under the device • do not layout near a large magnetic field such as a high frequency switching power supply • do not place near piezoelectric buzzers or mechanical fans. www.pletronics.com 425-776-1880 6 SQ33D Series 1.8 V CMOS Clock Oscillators January 2006 IMPORTANT NOTICE Pletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and other changes to this product at anytime. PLE reserves the right to discontinue any product or service without notice. Customers are responsible for obtaining the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to PLE’s terms and conditions of sale supplied at the time of order acknowledgment. PLE warrants performance of this product to the specifications applicable at the time of sale in accordance with PLE’s standard warranty. Testing and other quality control techniques are used to the extent PLE deems necessary to support this warranty. Except where mandated by specific contractual documents, testing of all parameters of each product is not necessarily performed. PLE assumes no liability for application assistance or customer product design. Customers are responsible for their products and applications using PLE components. To minimize the risks associated with the customer products and applications, customers should provide adequate design and operating safeguards. PLE does not warrant or represent that any license, either express or implied, is granted under any PLE patent right, copyright, artwork or other intellectual property right relating to any combination, machine or process which PLE product or services are used. Information published by PLE regarding third-party products or services does not constitute a license from PLE to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from PLE under the patents or other intellectual property of PLE. Reproduction of information in PLE data sheets or web site is permissible only if the reproduction is without alteration and is accompanied by associated warranties, conditions, limitations and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. PLE is not responsible or liable for such altered documents. Resale of PLE products or services with statements different from or beyond the parameters stated by PLE for that product or service voids all express and implied warranties for the associated PLE product or service and is an unfair or deceptive business practice. PLE is not responsible for any such statements. Contacting Pletronics Inc. Pletronics Inc. 19013 36th Ave. W, Suite H Lynnwood, Washington 98036-5761 USA Tel: 425-776-1880 Fax: 425-776-2760 E-mail: [email protected] URL: www.pletronics.com Copyright © 2005, Pletronics Inc. www.pletronics.com 425-776-1880 7