APT58M80J 800V, 58A, 0.11Ω Max N-Channel MOSFET S S Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. D G SO 2 T- 27 "UL Recognized" file # E145592 ISOTOP ® D APT58M80J Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 58 Continuous Drain Current @ TC = 100°C 36 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 3725 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 43 A 1 325 Thermal and Mechanical Characteristics Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 960 RθJC Junction to Case Thermal Resistance 0.13 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range VIsolation RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) WT Torque Package Weight Terminals and Mounting Screws. Microsemi Website - http://www.microsemi.com -55 150 °C/W °C V 2500 1.03 oz 29.2 g 10 in·lbf 1.1 N·m 1-2007 TJ,TSTG 0.15 Rev A Min Characteristic 050-8111 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA 800 ∆VBR(DSS)/∆TJ Breakdown Voltage Temperature Coefficient RDS(on) Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Symbol Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance TJ = 125°C 0.87 0.09 4 -10 0.11 5 100 500 ±100 Min VGS = 0V, VDS = 25V f = 1MHz Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Unit V V/°C Ω V mV/°C µA nA Typ 80 17550 300 1745 Max Unit S pF 825 VGS = 0V, VDS = 0V to 533V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tf VGS = 0V Test Conditions VDS = 50V, ID = 43A 4 td(off) TJ = 25°C Max TJ = 25°C unless otherwise specified Co(cr) tr VDS = 800V Typ VGS = ±30V Parameter gfs 3 VGS = VDS, ID = 5mA Threshold Voltage Temperature Coefficient IDSS Reference to 25°C, ID = 250µA VGS = 10V, ID = 43A 3 APT58M80J Current Rise Time Turn-Off Delay Time 410 570 95 290 100 145 435 125 VGS = 0 to 10V, ID = 43A, VDS = 400V Resistive Switching VDD = 533V, ID = 43A RG = 2.2Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Diode Forward Voltage ISD = 43A, TJ = 25°C, VGS = 0V trr Reverse Recovery Time ISD = 43A, VDD = 100V 3 Qrr Reverse Recovery Charge Peak Recovery dv/dt Typ Max Unit 58 A G VSD dv/dt Min D 325 S diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 43A, di/dt ≤1000A/µs, VDD = 533V, TJ = 125°C 1.0 1100 42 V ns µC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 4.03mH, RG = 2.2Ω, IAS = 43A. 050-8111 Rev A 1-2007 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = 5.57E-8/VDS^2 + 7.15E-8/VDS + 2.75E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 250 V GS = 10V TJ = -55°C TJ = 25°C 150 100 TJ = 125°C 50 TJ = 150°C 5.5V 60 50 5V 40 30 20 0 4.5V 4V 0 VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @ <0.5 % DUTY CYCLE 300 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE NORMALIZED TO VGS = 10V @ 43A 2.0 1.5 1.0 30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics 350 0.5 250 200 TJ = -55°C 150 TJ = 25°C 100 TJ = 125°C 50 0 25 50 75 100 125 150 0 -55 -25 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 100 0 8 7 6 5 4 3 2 1 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 30,000 90 TJ = 25°C 70 TJ = 125°C 60 Ciss 10,000 TJ = -55°C 80 C, CAPACITANCE (pF) gfs, TRANSCONDUCTANCE = 6, & 6.5V GS 70 Figure 1, Output Characteristics 2.5 = 10, & 15V GS V 10 30 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 3.0 V J 80 ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) T = 125°C 90 200 0 APT58M80J 100 50 40 30 1,000 Coss 100 Crss 20 10 800 600 400 200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage VDS = 160V 10 VDS = 400V 8 6 VDS = 640V 4 2 100 200 300 400 500 600 700 800 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 300 250 200 TJ = 25°C 150 TJ = 150°C 1-2007 12 0 350 ID = 43A 14 0 10 70 100 50 0 1.5 1.2 0.9 0.6 0.3 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 0 Rev A VGS, GATE-TO-SOURCE VOLTAGE (V) 16 60 50 40 30 20 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 10 050-8111 0 ISD, REVERSE DRAIN CURRENT (A) 0 I 10 13µs 100µs 1ms Rds(on) 10ms 1 100ms DM Rds(on) 13µs 100µs 10 0.1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 1ms 10ms 100ms DC line TJ = 150°C TC = 25°C 1 Scaling for Different Case & Junction Temperatures: ID = ID(T = 25 C)*(TJ - TC)/125 DC line C ° 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area TJ (°C) TC (°C) 0.0271 0.102 Dissipated Power (Watts) 0.0767 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction. ZEXT TJ = 125°C TC = 75°C 1 I 100 DM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 0.1 APT58M80J 400 400 1.04 Figure 11, Transient Thermal Impedance Model D = 0.9 0.12 0.10 0.7 0.08 0.5 0.06 Note: 0.3 0.04 t1 t2 0.02 0 PDM Z JC, THERMAL IMPEDANCE (°C/W) θ 0.14 t1 = Pulse Duration t 0.1 0.05 10-5 Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC SINGLE PULSE 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 1.0 SOT-227 (ISOTOP®) Package Outline 11.8 (.463) 12.2 (.480) 31.5 (1.240) 31.7 (1.248) 7.8 (.307) 8.2 (.322) r = 4.0 (.157) (2 places) W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 25.2 (0.992) 0.75 (.030) 12.6 (.496) 25.4 (1.000) 0.85 (.033) 12.8 (.504) 4.0 (.157) 4.2 (.165) (2 places) 1-2007 14.9 (.587) 15.1 (.594) Rev A 3.3 (.129) 3.6 (.143) 38.0 (1.496) 38.2 (1.504) 050-8111 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places) 1.95 (.077) 2.14 (.084) * Source 30.1 (1.185) 30.3 (1.193) Drain * Emitter terminals are shorted internally. Current handling capability is equal for either Source terminal. * Source Gate Dimensions in Millimeters and (Inches) ISOTOP® is a registered trademark of ST Microelectronics NV. Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.