PT2462 Remote Control Transmitter DESCRIPTION PT2462 is remote control transmitter utilizing CMOS Technology specially designed for infrared applications. It is compatible with LC7462M and is capable of controlling 32 function keys and 3 double keys. PT2462 is available in 20 pins, SOP or DIP Package and provides 8 bits of Custom Code. APPLICATIONS • • • • • • • Multi-media DVD player Moniputer Audio equipment Televisions (TVs) Video cassette recorders (VCRs) Audio cassette decks Air conditioners FEATURES • • • • • • • CMOS technology Low power consumption Least external components 32 ⊕ 3 function keys Wide range of operating voltage: VDD=1.8 ~ 5.5V Double key operation (No order of priority given) On-chip oscillator can be constructed using an externally connected ceramic resonator • Using SEL pin, PT2462 provides 2 custom code options. BLOCK DIAGRAM Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan PT2462 APPLICATION CIRCUIT V1.6 2 of 13 PT2462 ORDER INFORMATION Valid Order Number PT2462 PT2462-S Notes: 1. PT2462 Custom Code ID: (000~FFF) 2. 167: Custom Code 8167 0 0 Package Type 20 Pins, DIP, 300mil 20 Pins, SOP, 300mil 0 C3 1 Top Code PT2462-D-167 PT2462-167 1 0 0 PIN CONFIGURATION V1.6 3 of 13 PT2462 PIN DESCRIPTION V1.6 Pin Name KI0 ~ KI3 OUT VDD I/O I O - TEST I OSC1 OSC2 I O VSS - IND KO7 ~ KO0 O O SEL I Description Key Input Pins Output Pins for Transit LED Drive Power Supply LSI Test Pin This pin is normally set to high state or floating Oscillator Pin No. 1 Oscillator Pin No. 2 Power Supply VSS=GND LED Indicator Output Pin Key Scan Timing Signal Output Pins Select Pin Option 1 -- 2 Custom code selections by SEL “H” or “L” Option 2 -- 1 Custom code selection by not connecting SEL. Pin No 1~4 5 6 7 8 9 10 11 12 ~ 19 20 4 of 13 PT2462 FUNCTION DESCRIPTION OSCILLATION CIRCUIT A self-biased type amplifier is housed by a CMOS Inverter Method. Thus, an oscillation circuit can be constructed by connecting a ceramic resonator. Please refer to flowing figure for the oscillation circuit diagram. Unless the keys are being operated, the oscillation is normally stopped. Thus, power consumption is considerably reduced. KEY INPUT A total of 32 keys can be connected by Key Inputs-- KI0 ~ KI3 and Timing Signals -- KO0 ~ KO7. Double Key Operation is possible for only Key No. 20 in combination with the other keys connected to the KO5 line, namely: Key No. 21, 22 or 23. Thus, only the following key combinations may be used for the double key operation: • Key No. 20 and 21 • Key No. 20 and 22 • Key No. 20 and 23 There is no order of priority given in key input. This means that keys designated for the double keying operation may be pressed in any sequence. When two keys (designated for the double key operation) are pressed simultaneously, a series of pulse is outputted according to each key input. Pressing other keys that are NOT intended for the double key operation do NOT generate any output. The Key Matrix is given in the following diagram. V1.6 5 of 13 PT2462 DOUBLE KEY OPERATION Double Key Operation is useful for tape deck recording operation. The following table shows the Key Data corresponding to the double keys pressed. Also refer to the Key Input Section. Key No. 20 & 21 20 & 22 20 & 23 D0 1 0 1 D1 0 1 1 D2 1 1 1 D3 0 0 0 D4 1 1 1 D5 1 1 1 D6 0 0 0 D7 0 0 0 * Key Data -- D6 and D7 may be preset to “0”, “1” by mask option. When any of the double key combinations (Key No. 20 & 21, Key No. 20 & 22, and Key No. 20 & 23) are pressed. • D5 is set to “1” • No Key Input Sequence is needed to perform the Double Key Operation DATA FRAME A PT2462 Data Frame consists of 32-bit, namely: 8-bit Custom Code (C0 ~ C7), 8-bit Key Data (D0 ~ D8) and their respective Inverse Codes. Please refer to the diagram below. V1.6 6 of 13 PT2462 CUSTOM CODE The Custom Code consists of 8-bit, namely C0 ~ C7. Eight (8) Bits-- C0 ~ C7 are internally fixed by the mask ROM. Thus, it is impossible to externally set these bits. Please refer to the diagram below. C0 C1 C2 C3 C4 C5 C6 C7 However, PTC has made available two (2) Custom Code Options that may be externally selected by using the SEL (Select) Pin. These options are enumerated below: CUSTOM CODE OPTIONS Option No. 1 (PT2462 Default Option) There are two (2) Custom Code Selections that could be set internally. Using the SEL Pin, the two custom code choices are either: • Select SEL “H” or, • Select SEL “L” Please refer to the diagram below when SW Position 1 is ON. Option No. 2 (Customer Option) There is only one Custom Code Selection that could be set internally. In this case, the SEL Pin is not connected. Please refer to the above figure when the SW position 2 is ON. V1.6 7 of 13 PT2462 KEY DATA The key data has 7 bits (D0 ~ D7) and has the following key data codes. Key No. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * D6 and D7 may be preset to “0”, “1”. V1.6 8 of 13 PT2462 TRANSMISSION CODE The PT2462 transmission code consists of a leader code, 8 bits custom codes and 8 bits key data codes. The inverse code of both the custom and key data codes are also sent simultaneously; thus, allowing an extremely low error rate in the system configuration. Please refer to the following diagram. The leader code consists of a 9 ms carrier waveform followed by a 4.5ms OFF waveform. It is used as the leader for the following codes (Custom, Data and their respective inverse codes.) Thus, when the reception is configured by a microcomputer, the time relationship between the reception detection and other processes can be managed efficiently. The code uses the PPM (Pulse Position Modulation) Method, with “1” and “0” differentiated by the time between pulses. TRANSMISSION WAVEFORM V1.6 9 of 13 PT2462 ABSOLUTE MAXIMUM RATINGS (Ta=25℃) Parameter Maximum supply voltage Input voltage Output voltage Output current Allowable power dissipation Operating temperature Storage temperature Symbol VDD MAX VIN VOUT IOUT Pd max Topr Tstg Pin Name VDD Each Input pin Rating Vss-0.3 to 10 VSS-0.3 to VDD+0.3 Vss-0.3 to VDD+0.3 -35 150 -40 to +85 -65 to +150 OUT Ta< 85℃ Unit V V V mA mW ℃ ℃ ALLOWABLE OPERATING CONDITIONS (Ta=25℃) Parameter Supply voltage Symbol VDD High level input voltage VIH Low level input voltage VIL Oscillation frequency fosc Pin Name VDD KI0 to KI3 C0 TO C5 KI0 to KI3 C0 to C5 Condition fosc=455KHz Min. 1.8 Typ. 3.0 Max. 5.5 Unit V 0.7VDD VDD V VSS 0.3VDD V 500 KHz 400 455 ELECTRICAL CHARACTERISTICS (Ta=25℃, VDD=3.0V) Parameter Symbol Pin Name Operating supply current IDD VDD Quiescent supply current IDS VDD IOH1 OUT IOH2 OUT VOH VOL KO0 to KO7 OUT IOFF KO0 to KO7 IIH IIL VIF RIN C0 to C5 C0 to C5 KI0 to KI3 KI0 to KI3 High level output current High level output voltage Low level output voltage Output OFF-state leakage current High level input current Low level input current Input floating voltage Input pull-down resistance V1.6 Conditions Key ON, Output: no load All keys OFF, OSC stops VDD=1.8V, VOH=1.0 V VDD=3.0V, VOH=1.0V IOH=-1mA IOL=1mA VIN=VDD VIN=VSS Min. Typ. Max. Unit 1 mA 1 µA -8 mA -25 mA 2.4 0.2 V V 1 µA 1 µA µA V KΩ -1 75 0.1VDD 100 125 10 of 13 PT2462 PACKAGE INFORMATION 24 PINS, SOP, 300 MIL Symbols A A1 B C D E e H h L Min. 2.35 0.10 0.33 0.23 15.20 7.40 Nom. Max. 2.65 0.30 0.51 0.32 15.60 7.60 10.00 0.25 0.40 10.65 0.75 1.27 α 0° 8° 1.27 bsc. Notes: 1. Dimensioning and tolerancing per ANSI Y 14.5-1982. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold Flash, protrusion or gate burrs shall not exceed 0.15mm (0.006 in)per side. 3. Dimension “E” does not include interlead flash protrusions. Interlead flash or protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. The chamfer on the body is optional. It is not present, a visual index feature must be located within the crosshatched area. 5. “L” is the length of the terminal for soldering to a substrate. 6. “N” is the number of terminal position. (N=24) 7. The lead width “B” as measured 0.36 mm (0.014 in) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.24 in). 8. Controlling dimension: MILLIMETER. 9. Refer to JEDEC MS-013, Variation AD. JEDEC is the trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION. V1.6 11 of 13 PT2462 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.6 12 of 13