SANYO LA6558

Ordering number : EN6504A
LA6558
Monolithic Lenear IC
6-CH Driver for Mini Disk
and Compact Disk Applications
Overview
The LA6558 is a 6-channel driver developed for MD and CD players.
Features
• Power amplifier 6-channel built-in
• IO max 700mA
• Level shift circuit built-in (BTL AMP)
• One mute circuit (output ON/OFF) built-in
• 3.3V power supply built-in (IO max=300mA)
• 5V power supply built-in (IO max=5mA)
• Overheat protection circuit (thermal shutdown) built-in
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Power supply voltage
Symbol
Conditions
Ratings
Unit
VCC max
14
V
Maximum output current
IO max
0.7
A
Maximum input voltage
VINB
13
V
13
V
Mute pin voltage
VMUTE
Allowable operation
Pd max
Each CH for CH1 to CH6
Mounted on a board
2.00
Independent IC
1.20
W
Operating temperature
Topr
-30 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
22107 TI IM B8-5119 No.6504-1/10
LA6558
Recommended Operating Conditions at Ta = 25°C
Parameter
Power supply voltage
Symbol
Conditions
Ratings
VCC
Unit
6 to 13
V
Electrical Characteristics at S-VCC = P-VCC = 8V, VREF = 1.65V, Ta = 25°C, unless especially specified.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
All Blocks
No-load current drain ON
ICC-ON
All AMPs output ON *1
30
50
mA
No-load current drain OFF
ICC-OFF
All AMPs output OFF *1
10
20
mA
VREF input voltage range
VREF-IN
0.5
VCC-1.5
V
-50
+50
mV
0
VCC
V
BTL AMP Block
Output offset voltage
VOFF
Voltage difference between output AMPs,
each CH
Input voltage range
VIN
Output voltage
VO
Voltage between each VO+ and VOwhen RL=8Ω *2
Closed-circuit voltage gain
VG
Input/output gain Input resistance 11kΩ
Slew rate
SR
Multiply 2 between outputs. *3
MUTE ON voltage
VMUTE-ON
Each MUTE *4
MUTE OFF voltage
VMUTE-OFF
Each MUTE *4
4
4.5
V
12
dB
1
V/µs
0.5
2
V
V
Loading Block
Voltage between outputs F
VOF
VIN+=2V, VIN-=0V
2.5
2.9
3.3
Voltage between outputs R
VOR
VIN+=0V, VIN-=2V
-3.3
-2.9
-2.5
5.2
5.7
Output voltage range F
VOMF
VIN+=5V, VIN-=0
Output voltage range R
VOMR
VIN+=0V, VIN-=5V
Output offset voltage
VOFF
Voltage difference between outputs
when brake is applied.
Input current
I-IN
-5.7
-50
At VIN=3.3V
V
V
V
-5.2
V
+50
mV
500
µA
3.3VREG Block
Output voltage
VO-REG1
Line regulation
∆V-LIN1
Load regulation
∆V-LOAD1
IO=100mA
3.15
3.45
V
VCC=6 to 12V at IO=100mA
-100
+100
mV
IO=0 to 200mA
-100
+100
mV
IO=3mA
4.75
5.25
V
3.3
5VREG Block
Output voltage
VO-REG2
Line regulation
∆V-LIN1
Load regulation
∆V-LOAD
5
IO=3mA, VCC=6 to 12V
100
mV
IO=1 to 3mA
100
mV
O-RESET Block (Operating for Vref)
H reset output voltage
VORH
10kΩ between VCC-RESET
L reset output voltage
VORL
10kΩ between VCC and RESET
6.5
V
0.5
V
O-RESET threshold voltage
VRT
0.5
0.7
0.9
V
O-RESET hysteresis voltage
Vhys
50
100
200
mV
*1. P-VCC and S-VCC total current dissipation under no load.
*2. Voltage difference between both ends of the load(8Ω). Output in the saturated condition.
*3. These values are design guarantee values, and are not tested.
*4. Output is ON with IN-MUTE: [H] and OFF (HI impedance) with IN-MUTE: [L].
No.6504-2/10
LA6558
Package Dimensions
unit : mm (typ)
3196A
16
1
15
0.25
8.6
30
10.16
27.0
(3.25)
0.51min
3.0 3.95max
0.95
0.48
(1.04)
SANYO : DIP30SD(400mil)
1.78
Pd max - Ta
Allowable power dissipation, Pd max - W
3
Mounted on a board
2
Independent IC
2.00
1.20
1.04
1
0.62
0
-40 -30 -20
0
20
40
60
Ambient temperature, Ta - °C
80
100
ILA00165
No.6504-3/10
LA6558
Block Diagram
×2
×2
Level Shift
1
Level Shift
VO3-
×2
30
VO6+
×2
29
VO6-
VO5-
3
28
VO2+
VO5+
4
27
VO2-
VO4-
5
26
VO1+
VO4+
6
25
VO1-
24
P-GND2
23
P-VCC(IN)
22
3.3VREG(OUT)
21
S-VCC(IN)
20
VIN1
19
VIN2
18
VIN6+
17
VIN6-
16
5VREG
S-GND
8
Level Shift
7
Level Shift
P-GND1
Level Shift
2
Level Shift
VO3+
Power System
GND
Power System GND
+
-
Signal System GND
Power System VCC
VREF
9
IN-MUTE
10
Reference Voltage
3.3VREG
Signal System VCC
MUTE
RESET OUTPUT
L and BTL-AMP
OFF with VREF
at 0.7V or less.
RESET
O-RESET
11
22kΩ
200Ω
+
22kΩ
22kΩ
200Ω
VIN4
12
200Ω
+
+
22kΩ
200Ω
VIN5
13
VIN3+
14
VIN3-
15
×3/8
+
×3/8
×3/8
×3/8
Overheat Protection
Circuit
(Thermal Shutdown)
5VREG
No.6504-4/10
LA6558
Pin Functions
Pin No.
Pin Name
1
VO3-
Output for CH3 (-)
Description (functions)
2
VO3+
Output for CH3 (+)
3
VO5-
Output for CH5 (-), inverted relative to input
4
VO5+
Output for CH5 (+), not inverted relative to input
5
VO4-
Output for CH4 (-), inverted relative to input
6
VO4+
7
P-GND1
Power system GND (CH3, 4, 5)
Output for CH4 (+), not inverted relative to input
8
S-GND
Signal system GND
9
10
VREF
IN-MUTE
Output ON/OFF for BTL AMP (CH1, 2, 4, and 5) and 3.3 V, 5 VREG. ([H]: Output ON, [L]: Output OFF)
11
O-RESET
Reset output (Open collector)
12
VIN4
Input for CH4
13
VIN5
Input for CH5
14
VIN3+
Input for CH3 (+)
15
VIN3-
Input for CH3 (-)
16
5VREG
5V Power output
17
VIN6-
Input for CH6 (-)
18
VIN6+
Input for CH6 (+)
19
VIN2
Input for CH2
20
VIN1
21
S-VCC
Signal system VCC
22
3.3VREG
3.3V Power output
23
P-VCC
24
P-GND2
Reference voltage input pin
Input for CH1
Power system power supply
Power system GND(CH1, 2, 6)
25
VO1-
26
VO1+
Output for CH1 (-), inverted relative to input
Output for CH1 (+), not inverted relative to input
27
VO2-
Output for CH2 (-), inverted relative to input
28
VO2+
Output for CH2 (+), not inverted relative to input
29
VO6-
Output for CH6 (-)
30
VO6+
Output for CH6 (+)
*1. Connect P-GND and S-GND externally and set both to the lowest potential (sub-straight).
*2. Connect S-VCC and P-VCC externally for use as power supplies.
No.6504-5/10
LA6558
Pin Description
Pin Name
Pin Name
Pin No
Input
VIN1
VIN2
20
VIN4
VIN5
12
(BTL AMP)
Description
Equivalent Circuit Diagram
Each input pin
VIN
19
13
Vref
Output
(BTL AMP)
Mute
VO1+
VO1-
26
VO2+
VO2-
28
VO4+
VO4-
6
VO5+
VO5-
4
IN-MUTE
10
Each output
25
27
5
3
OUT
Output ON/OFF.
IN-MUTE: H output ON
VCC
IN-MUTE: L output OFF
IN-MUTE
100kΩ
100kΩ
S-GND
Reset
O-RESET
11
Open collector
Continued on next page.
No.6504-6/10
LA6558
Continued from preceding page.
Pin Name
Pin Name
Pin No
Input
VIN3VIN3+
15
VIN6VIN6+
17
(Loading
block)
Description
Equivalent Circuit Diagram
Each input pin
14
18
100kΩ
50kΩ
Output
(Loading
block)
VO3+
VO3-
2
VO6+
VO6-
30
Each output
1
29
10kΩ
10kΩ
10kΩ
5VREG
5VREG
16
Output for 5VREG
39kΩ
13kΩ
3.3VREG
3.3VREG
22
Output for 3.3VREG
8.87kΩ
5.46kΩ
No.6504-7/10
LA6558
Sample Application Circuit
1
LOADING
MOTOR
VO3-
VO6+
30
M
2
VO3+
VO6-
29
3
VO5-
VO2+
28
FOCUS
COIL
4
VO5+
5
VO4-
M
CHANGER
MOTOR
M
SPINDLE
MOTOR
M
SLED
MOTOR
VO2- 27
VO1+
26
TRACKING
COIL
VO1-
25
P-GND2
24
P-VCC
23
VCC
3.3VREG
22
3.3V
IN-MUTE
S-VCC
21
11
O-RESET
VIN1
20
SLED MOTOR
12
VIN4
VIN2
19
SPINDLE MOTOR
FWD
13
VIN5
VIN6+
18
FWD
14
VIN3+
VIN6-
17
6
VO4+
7
P-GND1
8
S-GND
9
VREF
10
VCC
MUTE
RESET
CHANGE
REV
LOADING
FOCUS COIL
TRACKING COIL
REV
15
VIN3-
5VREG
16
VREF
Note: When connecting a load to CH3 and CH6, set the output capacitor to 0.56µF or more and select the capacitor
according to the setting. The capacitor to be used should be less in capacity fluctuation due to temperature.
No.6504-8/10
LA6558
Relation of MUTE and Power (P-VCC)
CH1(BTL AMP)
CH2(BTL AMP)
MUTE
P-VCC
CH6(LOADING)
CH4(BTL AMP)
CH5(BTL AMP)
CH3(LOADING)
* Connect S-VCC and P-VCC externally.
* Connect P-GND and S-GND externally.
Various MUTE functions and output, 3.3V REG operation condition
CH1, 2, 4, 5
CH3, 6
3.3VREG
(BTL-AMP)
(LOADING)
5VREG
With IN-MUTE: L
OFF
-
OFF
With thermal shutdown operating
OFF
OFF
OFF
With VREF lowering (0.7V or less)
OFF
-
-
* (-) indicates no-operation for functions to which MUTE, thermal shutdown, and VREF lowering correspond.
* IN-MUTE operates for BTL-AMP (CH1, 2, 4, and 5) and 3.3VREF and 5 VREF.
* VREF lowering is effective for BTL-AMP only.
Operative for ((MUTE operation)) to BTL-AMP(CH1, 2, 4, 5) and 3.3VREF, 5VREF
IN-MUTE condition
BTL-AMP
3.3VREG
(CH1, 2, 4, 5)
5VREG
H
ON
L
OFF
Operative for ((VREF lowering)) to BTL-AMP
BTL-AMP
VREF condition
(CH1, 2, 4, 5)
VREF > 0.7(V)
ON
VREF < 0.7(V)
OFF
LOADING Block
VIN*+
(FWD)
L
H
VIN*(REV)
Loading output
L
Brake
H
Reversed (VO=-1.5×REV) *1
L
Forward (VO= 1.5×FWD) *1
H
(VO=1.5×(VFO-VRE))
* When the brake is applied, each “+” and “-” output voltage becomes VCC/2.
*1 FWD: VIN6+, VIN3+, REV: VIN6-, VIN3-.
* L voltage is L<VF(≈0.6V).
* Gain of loading (CH3, 6) is 3.5dB(TYP).
No.6504-9/10
LA6558
Reset function
IN-MUTE
L
H
VREF
O-RESET
VREF < 0.7V
L
VREF > 0.7V
L
VREF < 0.7V
L
VREF > 0.7V
H
* O-RESET is an open collector output (NPN).
* O-RESET: L indicates that the NPN output is ON while O-RESET: H indicates that this output is OFF.
Relation of input and output (BTL-AMP)
22kΩ
200Ω
VIN
Level
shift
+
VREF
+
VO +
+
VO -
+
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
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controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
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without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
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with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
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intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of February, 2007. Specifications and information herein are subject
to change without notice.
PS No.6504-10/10